1// SPDX-License-Identifier: GPL-2.0 2// 3// Copyright (C) 2014 Freescale Semiconductor, Inc. 4 5/dts-v1/; 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/input.h> 9#include "imx6sx.dtsi" 10 11/ { 12 model = "Freescale i.MX6 SoloX SDB Board"; 13 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx"; 14 15 chosen { 16 stdout-path = &uart1; 17 }; 18 19 memory@80000000 { 20 device_type = "memory"; 21 reg = <0x80000000 0x40000000>; 22 }; 23 24 backlight_display: backlight-display { 25 compatible = "pwm-backlight"; 26 pwms = <&pwm3 0 5000000>; 27 brightness-levels = <0 4 8 16 32 64 128 255>; 28 default-brightness-level = <6>; 29 }; 30 31 gpio-keys { 32 compatible = "gpio-keys"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pinctrl_gpio_keys>; 35 36 volume-up { 37 label = "Volume Up"; 38 gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; 39 linux,code = <KEY_VOLUMEUP>; 40 wakeup-source; 41 }; 42 43 volume-down { 44 label = "Volume Down"; 45 gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; 46 linux,code = <KEY_VOLUMEDOWN>; 47 wakeup-source; 48 }; 49 }; 50 51 vcc_sd3: regulator-vcc-sd3 { 52 compatible = "regulator-fixed"; 53 pinctrl-names = "default"; 54 pinctrl-0 = <&pinctrl_vcc_sd3>; 55 regulator-name = "VCC_SD3"; 56 regulator-min-microvolt = <3000000>; 57 regulator-max-microvolt = <3000000>; 58 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; 59 enable-active-high; 60 }; 61 62 reg_usb_otg1_vbus: regulator-usb-otg1-vbus { 63 compatible = "regulator-fixed"; 64 pinctrl-names = "default"; 65 pinctrl-0 = <&pinctrl_usb_otg1>; 66 regulator-name = "usb_otg1_vbus"; 67 regulator-min-microvolt = <5000000>; 68 regulator-max-microvolt = <5000000>; 69 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; 70 enable-active-high; 71 }; 72 73 reg_usb_otg2_vbus: regulator-usb-otg2-vbus { 74 compatible = "regulator-fixed"; 75 pinctrl-names = "default"; 76 pinctrl-0 = <&pinctrl_usb_otg2>; 77 regulator-name = "usb_otg2_vbus"; 78 regulator-min-microvolt = <5000000>; 79 regulator-max-microvolt = <5000000>; 80 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; 81 enable-active-high; 82 }; 83 84 reg_psu_5v: regulator-psu-5v { 85 compatible = "regulator-fixed"; 86 regulator-name = "PSU-5V0"; 87 regulator-min-microvolt = <5000000>; 88 regulator-max-microvolt = <5000000>; 89 }; 90 91 reg_lcd_3v3: regulator-lcd-3v3 { 92 compatible = "regulator-fixed"; 93 regulator-name = "lcd-3v3"; 94 gpio = <&gpio3 27 0>; 95 enable-active-high; 96 }; 97 98 reg_peri_3v3: regulator-peri-3v3 { 99 compatible = "regulator-fixed"; 100 pinctrl-names = "default"; 101 pinctrl-0 = <&pinctrl_peri_3v3>; 102 regulator-name = "peri_3v3"; 103 regulator-min-microvolt = <3300000>; 104 regulator-max-microvolt = <3300000>; 105 gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>; 106 enable-active-high; 107 regulator-always-on; 108 }; 109 110 reg_enet_3v3: regulator-enet-3v3 { 111 compatible = "regulator-fixed"; 112 pinctrl-names = "default"; 113 pinctrl-0 = <&pinctrl_enet_3v3>; 114 regulator-name = "enet_3v3"; 115 regulator-min-microvolt = <3300000>; 116 regulator-max-microvolt = <3300000>; 117 gpio = <&gpio2 6 GPIO_ACTIVE_LOW>; 118 regulator-boot-on; 119 regulator-always-on; 120 }; 121 122 reg_pcie_gpio: regulator-pcie-gpio { 123 compatible = "regulator-fixed"; 124 pinctrl-names = "default"; 125 pinctrl-0 = <&pinctrl_pcie_reg>; 126 regulator-name = "MPCIE_3V3"; 127 regulator-min-microvolt = <3300000>; 128 regulator-max-microvolt = <3300000>; 129 gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>; 130 enable-active-high; 131 }; 132 133 reg_lcd_5v: regulator-lcd-5v { 134 compatible = "regulator-fixed"; 135 regulator-name = "lcd-5v0"; 136 regulator-min-microvolt = <5000000>; 137 regulator-max-microvolt = <5000000>; 138 }; 139 140 reg_can_en: regulator-can-en { 141 compatible = "regulator-fixed"; 142 regulator-name = "can-en"; 143 regulator-min-microvolt = <3300000>; 144 regulator-max-microvolt = <3300000>; 145 }; 146 147 reg_can_stby: regulator-can-stby { 148 compatible = "regulator-fixed"; 149 regulator-name = "can-stby"; 150 regulator-min-microvolt = <3300000>; 151 regulator-max-microvolt = <3300000>; 152 }; 153 154 sound { 155 compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962"; 156 model = "wm8962-audio"; 157 ssi-controller = <&ssi2>; 158 audio-codec = <&codec>; 159 audio-routing = 160 "Headphone Jack", "HPOUTL", 161 "Headphone Jack", "HPOUTR", 162 "Ext Spk", "SPKOUTL", 163 "Ext Spk", "SPKOUTR", 164 "AMIC", "MICBIAS", 165 "IN3R", "AMIC"; 166 mux-int-port = <2>; 167 mux-ext-port = <6>; 168 }; 169 170 panel { 171 compatible = "sii,43wvf1g"; 172 backlight = <&backlight_display>; 173 dvdd-supply = <®_lcd_3v3>; 174 avdd-supply = <®_lcd_5v>; 175 176 port { 177 panel_in: endpoint { 178 remote-endpoint = <&display_out>; 179 }; 180 }; 181 }; 182 183 sound-spdif { 184 compatible = "fsl,imx-audio-spdif", 185 "fsl,imx6sx-sdb-spdif"; 186 model = "imx-spdif"; 187 spdif-controller = <&spdif>; 188 spdif-out; 189 }; 190 191}; 192 193&audmux { 194 pinctrl-names = "default"; 195 pinctrl-0 = <&pinctrl_audmux>; 196 status = "okay"; 197}; 198 199&fec1 { 200 pinctrl-names = "default"; 201 pinctrl-0 = <&pinctrl_enet1>; 202 phy-supply = <®_enet_3v3>; 203 phy-mode = "rgmii-id"; 204 phy-handle = <ðphy1>; 205 phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; 206 status = "okay"; 207 208 mdio { 209 #address-cells = <1>; 210 #size-cells = <0>; 211 212 ethphy1: ethernet-phy@1 { 213 reg = <1>; 214 }; 215 216 ethphy2: ethernet-phy@2 { 217 reg = <2>; 218 }; 219 }; 220}; 221 222&fec2 { 223 pinctrl-names = "default"; 224 pinctrl-0 = <&pinctrl_enet2>; 225 phy-mode = "rgmii-id"; 226 phy-handle = <ðphy2>; 227 status = "okay"; 228}; 229 230&flexcan1 { 231 pinctrl-names = "default"; 232 pinctrl-0 = <&pinctrl_flexcan1>; 233 xceiver-supply = <®_can_stby>; 234 status = "okay"; 235}; 236 237&flexcan2 { 238 pinctrl-names = "default"; 239 pinctrl-0 = <&pinctrl_flexcan2>; 240 xceiver-supply = <®_can_stby>; 241 status = "okay"; 242}; 243 244&i2c3 { 245 clock-frequency = <100000>; 246 pinctrl-names = "default"; 247 pinctrl-0 = <&pinctrl_i2c3>; 248 status = "okay"; 249}; 250 251&i2c4 { 252 clock-frequency = <100000>; 253 pinctrl-names = "default"; 254 pinctrl-0 = <&pinctrl_i2c4>; 255 status = "okay"; 256 257 codec: wm8962@1a { 258 compatible = "wlf,wm8962"; 259 reg = <0x1a>; 260 clocks = <&clks IMX6SX_CLK_AUDIO>; 261 DCVDD-supply = <&vgen4_reg>; 262 DBVDD-supply = <&vgen4_reg>; 263 AVDD-supply = <&vgen4_reg>; 264 CPVDD-supply = <&vgen4_reg>; 265 MICVDD-supply = <&vgen3_reg>; 266 PLLVDD-supply = <&vgen4_reg>; 267 SPKVDD1-supply = <®_psu_5v>; 268 SPKVDD2-supply = <®_psu_5v>; 269 }; 270}; 271 272&pcie { 273 pinctrl-names = "default"; 274 pinctrl-0 = <&pinctrl_pcie>; 275 reset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>; 276 vpcie-supply = <®_pcie_gpio>; 277 status = "okay"; 278}; 279 280&lcdif1 { 281 pinctrl-names = "default"; 282 pinctrl-0 = <&pinctrl_lcd>; 283 status = "okay"; 284 285 port { 286 display_out: endpoint { 287 remote-endpoint = <&panel_in>; 288 }; 289 }; 290}; 291 292&pwm3 { 293 #pwm-cells = <2>; 294 pinctrl-names = "default"; 295 pinctrl-0 = <&pinctrl_pwm3>; 296 status = "okay"; 297}; 298 299&snvs_poweroff { 300 status = "okay"; 301}; 302 303&sai1 { 304 pinctrl-names = "default"; 305 pinctrl-0 = <&pinctrl_sai1>; 306 status = "disabled"; 307}; 308 309&spdif { 310 pinctrl-names = "default"; 311 pinctrl-0 = <&pinctrl_spdif>; 312 assigned-clocks = <&clks IMX6SX_CLK_SPDIF_PODF>; 313 assigned-clock-rates = <24576000>; 314 status = "okay"; 315}; 316 317&ssi2 { 318 status = "okay"; 319}; 320 321&uart1 { 322 pinctrl-names = "default"; 323 pinctrl-0 = <&pinctrl_uart1>; 324 status = "okay"; 325}; 326 327&uart5 { /* for bluetooth */ 328 pinctrl-names = "default"; 329 pinctrl-0 = <&pinctrl_uart5>; 330 uart-has-rtscts; 331 status = "okay"; 332}; 333 334&usbotg1 { 335 vbus-supply = <®_usb_otg1_vbus>; 336 pinctrl-names = "default"; 337 pinctrl-0 = <&pinctrl_usb_otg1_id>; 338 status = "okay"; 339}; 340 341&usbotg2 { 342 vbus-supply = <®_usb_otg2_vbus>; 343 dr_mode = "host"; 344 status = "okay"; 345}; 346 347&usbphy1 { 348 fsl,tx-d-cal = <106>; 349}; 350 351&usbphy2 { 352 fsl,tx-d-cal = <106>; 353}; 354 355&usdhc2 { 356 pinctrl-names = "default"; 357 pinctrl-0 = <&pinctrl_usdhc2>; 358 non-removable; 359 no-1-8-v; 360 keep-power-in-suspend; 361 wakeup-source; 362 status = "okay"; 363}; 364 365&usdhc3 { 366 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 367 pinctrl-0 = <&pinctrl_usdhc3>; 368 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 369 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 370 bus-width = <8>; 371 cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 372 wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>; 373 keep-power-in-suspend; 374 wakeup-source; 375 vmmc-supply = <&vcc_sd3>; 376 status = "okay"; 377}; 378 379&usdhc4 { 380 pinctrl-names = "default"; 381 pinctrl-0 = <&pinctrl_usdhc4>; 382 cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>; 383 wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>; 384 status = "okay"; 385}; 386 387&wdog1 { 388 pinctrl-names = "default"; 389 pinctrl-0 = <&pinctrl_wdog>; 390 fsl,ext-reset-output; 391}; 392 393&iomuxc { 394 imx6x-sdb { 395 pinctrl_audmux: audmuxgrp { 396 fsl,pins = < 397 MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130b0 398 MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS 0x130b0 399 MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD 0x120b0 400 MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x130b0 401 MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0 402 >; 403 }; 404 405 pinctrl_enet1: enet1grp { 406 fsl,pins = < 407 MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1 408 MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1 409 MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1 410 MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1 411 MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1 412 MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1 413 MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1 414 MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1 415 MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081 416 MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081 417 MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081 418 MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081 419 MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081 420 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081 421 MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91 422 /* phy reset */ 423 MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 0x10b0 424 >; 425 }; 426 427 pinctrl_enet_3v3: enet3v3grp { 428 fsl,pins = < 429 MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000 430 >; 431 }; 432 433 pinctrl_enet2: enet2grp { 434 fsl,pins = < 435 MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9 436 MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1 437 MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1 438 MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1 439 MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1 440 MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1 441 MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081 442 MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081 443 MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081 444 MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081 445 MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081 446 MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081 447 >; 448 }; 449 450 pinctrl_flexcan1: flexcan1grp { 451 fsl,pins = < 452 MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b020 453 MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b020 454 >; 455 }; 456 457 pinctrl_flexcan2: flexcan2grp { 458 fsl,pins = < 459 MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b020 460 MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b020 461 >; 462 }; 463 464 pinctrl_gpio_keys: gpio_keysgrp { 465 fsl,pins = < 466 MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059 467 MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059 468 >; 469 }; 470 471 pinctrl_i2c1: i2c1grp { 472 fsl,pins = < 473 MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1 474 MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1 475 >; 476 }; 477 478 pinctrl_i2c3: i2c3grp { 479 fsl,pins = < 480 MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1 481 MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1 482 >; 483 }; 484 485 pinctrl_i2c4: i2c4grp { 486 fsl,pins = < 487 MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1 488 MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1 489 >; 490 }; 491 492 pinctrl_lcd: lcdgrp { 493 fsl,pins = < 494 MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0 495 MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0 496 MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0 497 MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0 498 MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0 499 MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0 500 MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0 501 MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0 502 MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0 503 MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0 504 MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0 505 MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0 506 MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0 507 MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0 508 MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0 509 MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0 510 MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0 511 MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0 512 MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0 513 MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0 514 MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0 515 MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0 516 MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0 517 MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0 518 MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0 519 MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0 520 MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0 521 MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0 522 MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0 523 >; 524 }; 525 526 pinctrl_mqs: mqsgrp { 527 fsl,pins = < 528 MX6SX_PAD_SD2_CLK__MQS_RIGHT 0x120b0 529 MX6SX_PAD_SD2_CMD__MQS_LEFT 0x120b0 530 >; 531 }; 532 533 pinctrl_pcie: pciegrp { 534 fsl,pins = < 535 MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0 536 >; 537 }; 538 539 pinctrl_pcie_reg: pciereggrp { 540 fsl,pins = < 541 MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x10b0 542 >; 543 }; 544 545 pinctrl_peri_3v3: peri3v3grp { 546 fsl,pins = < 547 MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000 548 >; 549 }; 550 551 pinctrl_pwm3: pwm3grp-1 { 552 fsl,pins = < 553 MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0 554 >; 555 }; 556 557 pinctrl_qspi2: qspi2grp { 558 fsl,pins = < 559 MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 0x70f1 560 MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1 0x70f1 561 MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2 0x70f1 562 MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3 0x70f1 563 MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK 0x70f1 564 MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B 0x70f1 565 MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0 0x70f1 566 MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1 0x70f1 567 MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2 0x70f1 568 MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3 0x70f1 569 MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK 0x70f1 570 MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B 0x70f1 571 >; 572 }; 573 574 pinctrl_vcc_sd3: vccsd3grp { 575 fsl,pins = < 576 MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059 577 >; 578 }; 579 580 pinctrl_sai1: sai1grp { 581 fsl,pins = < 582 MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK 0x130b0 583 MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC 0x130b0 584 MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0 0x120b0 585 MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 0x130b0 586 MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0 587 >; 588 }; 589 590 pinctrl_spdif: spdifgrp { 591 fsl,pins = < 592 MX6SX_PAD_SD4_DATA4__SPDIF_OUT 0x1b0b0 593 >; 594 }; 595 596 pinctrl_uart1: uart1grp { 597 fsl,pins = < 598 MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1 599 MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1 600 >; 601 }; 602 603 pinctrl_uart5: uart5grp { 604 fsl,pins = < 605 MX6SX_PAD_KEY_ROW3__UART5_DCE_RX 0x1b0b1 606 MX6SX_PAD_KEY_COL3__UART5_DCE_TX 0x1b0b1 607 MX6SX_PAD_KEY_ROW2__UART5_DCE_CTS 0x1b0b1 608 MX6SX_PAD_KEY_COL2__UART5_DCE_RTS 0x1b0b1 609 >; 610 }; 611 612 pinctrl_usb_otg1: usbotg1grp { 613 fsl,pins = < 614 MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0 615 >; 616 }; 617 618 pinctrl_usb_otg1_id: usbotg1idgrp { 619 fsl,pins = < 620 MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059 621 >; 622 }; 623 624 pinctrl_usb_otg2: usbot2ggrp { 625 fsl,pins = < 626 MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 0x10b0 627 >; 628 }; 629 630 pinctrl_usdhc2: usdhc2grp { 631 fsl,pins = < 632 MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059 633 MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059 634 MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059 635 MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059 636 MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059 637 MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059 638 >; 639 }; 640 641 pinctrl_usdhc3: usdhc3grp { 642 fsl,pins = < 643 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059 644 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059 645 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059 646 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059 647 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059 648 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059 649 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059 650 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059 651 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059 652 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059 653 MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */ 654 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */ 655 >; 656 }; 657 658 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { 659 fsl,pins = < 660 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9 661 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9 662 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9 663 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9 664 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9 665 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9 666 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9 667 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9 668 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9 669 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9 670 >; 671 }; 672 673 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { 674 fsl,pins = < 675 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9 676 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9 677 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9 678 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9 679 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9 680 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9 681 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9 682 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9 683 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9 684 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9 685 >; 686 }; 687 688 pinctrl_usdhc4: usdhc4grp { 689 fsl,pins = < 690 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059 691 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059 692 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059 693 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059 694 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059 695 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059 696 MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */ 697 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */ 698 >; 699 }; 700 701 pinctrl_wdog: wdoggrp { 702 fsl,pins = < 703 MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0 704 >; 705 }; 706 }; 707}; 708