1 /*-
2 * Generic routines for LSI Fusion adapters.
3 * FreeBSD Version.
4 *
5 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-3-Clause
6 *
7 * Copyright (c) 2000, 2001 by Greg Ansley
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice immediately at the beginning of the file, without modification,
14 * this list of conditions, and the following disclaimer.
15 * 2. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
22 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30 /*-
31 * Copyright (c) 2002, 2006 by Matthew Jacob
32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions are
36 * met:
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
40 * substantially similar to the "NO WARRANTY" disclaimer below
41 * ("Disclaimer") and any redistribution must be conditioned upon including
42 * a substantially similar Disclaimer requirement for further binary
43 * redistribution.
44 * 3. Neither the names of the above listed copyright holders nor the names
45 * of any contributors may be used to endorse or promote products derived
46 * from this software without specific prior written permission.
47 *
48 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
49 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
51 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
52 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
53 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
54 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
55 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
56 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
57 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
58 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
59 *
60 * Support from Chris Ellsworth in order to make SAS adapters work
61 * is gratefully acknowledged.
62 *
63 *
64 * Support from LSI-Logic has also gone a great deal toward making this a
65 * workable subsystem and is gratefully acknowledged.
66 */
67 /*-
68 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
69 * Copyright (c) 2005, WHEEL Sp. z o.o.
70 * Copyright (c) 2004, 2005 Justin T. Gibbs
71 * All rights reserved.
72 *
73 * Redistribution and use in source and binary forms, with or without
74 * modification, are permitted provided that the following conditions are
75 * met:
76 * 1. Redistributions of source code must retain the above copyright
77 * notice, this list of conditions and the following disclaimer.
78 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
79 * substantially similar to the "NO WARRANTY" disclaimer below
80 * ("Disclaimer") and any redistribution must be conditioned upon including
81 * a substantially similar Disclaimer requirement for further binary
82 * redistribution.
83 * 3. Neither the names of the above listed copyright holders nor the names
84 * of any contributors may be used to endorse or promote products derived
85 * from this software without specific prior written permission.
86 *
87 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
88 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
89 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
90 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
91 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
92 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
93 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
94 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
95 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
96 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
97 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
98 */
99
100 #include <sys/cdefs.h>
101 __FBSDID("$FreeBSD$");
102
103 #include <dev/mpt/mpt.h>
104 #include <dev/mpt/mpt_cam.h> /* XXX For static handler registration */
105 #include <dev/mpt/mpt_raid.h> /* XXX For static handler registration */
106
107 #include <dev/mpt/mpilib/mpi.h>
108 #include <dev/mpt/mpilib/mpi_ioc.h>
109 #include <dev/mpt/mpilib/mpi_fc.h>
110 #include <dev/mpt/mpilib/mpi_targ.h>
111
112 #include <sys/sysctl.h>
113
114 #define MPT_MAX_TRYS 3
115 #define MPT_MAX_WAIT 300000
116
117 static int maxwait_ack = 0;
118 static int maxwait_int = 0;
119 static int maxwait_state = 0;
120
121 static TAILQ_HEAD(, mpt_softc) mpt_tailq = TAILQ_HEAD_INITIALIZER(mpt_tailq);
122 mpt_reply_handler_t *mpt_reply_handlers[MPT_NUM_REPLY_HANDLERS];
123
124 static mpt_reply_handler_t mpt_default_reply_handler;
125 static mpt_reply_handler_t mpt_config_reply_handler;
126 static mpt_reply_handler_t mpt_handshake_reply_handler;
127 static mpt_reply_handler_t mpt_event_reply_handler;
128 static void mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req,
129 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context);
130 static int mpt_send_event_request(struct mpt_softc *mpt, int onoff);
131 static int mpt_soft_reset(struct mpt_softc *mpt);
132 static void mpt_hard_reset(struct mpt_softc *mpt);
133 static int mpt_dma_buf_alloc(struct mpt_softc *mpt);
134 static void mpt_dma_buf_free(struct mpt_softc *mpt);
135 static int mpt_configure_ioc(struct mpt_softc *mpt, int, int);
136 static int mpt_enable_ioc(struct mpt_softc *mpt, int);
137
138 /************************* Personality Module Support *************************/
139 /*
140 * We include one extra entry that is guaranteed to be NULL
141 * to simplify our itterator.
142 */
143 static struct mpt_personality *mpt_personalities[MPT_MAX_PERSONALITIES + 1];
144 static __inline struct mpt_personality*
145 mpt_pers_find(struct mpt_softc *, u_int);
146 static __inline struct mpt_personality*
147 mpt_pers_find_reverse(struct mpt_softc *, u_int);
148
149 static __inline struct mpt_personality *
mpt_pers_find(struct mpt_softc * mpt,u_int start_at)150 mpt_pers_find(struct mpt_softc *mpt, u_int start_at)
151 {
152 KASSERT(start_at <= MPT_MAX_PERSONALITIES,
153 ("mpt_pers_find: starting position out of range"));
154
155 while (start_at < MPT_MAX_PERSONALITIES
156 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) {
157 start_at++;
158 }
159 return (mpt_personalities[start_at]);
160 }
161
162 /*
163 * Used infrequently, so no need to optimize like a forward
164 * traversal where we use the MAX+1 is guaranteed to be NULL
165 * trick.
166 */
167 static __inline struct mpt_personality *
mpt_pers_find_reverse(struct mpt_softc * mpt,u_int start_at)168 mpt_pers_find_reverse(struct mpt_softc *mpt, u_int start_at)
169 {
170 while (start_at < MPT_MAX_PERSONALITIES
171 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) {
172 start_at--;
173 }
174 if (start_at < MPT_MAX_PERSONALITIES)
175 return (mpt_personalities[start_at]);
176 return (NULL);
177 }
178
179 #define MPT_PERS_FOREACH(mpt, pers) \
180 for (pers = mpt_pers_find(mpt, /*start_at*/0); \
181 pers != NULL; \
182 pers = mpt_pers_find(mpt, /*start_at*/pers->id+1))
183
184 #define MPT_PERS_FOREACH_REVERSE(mpt, pers) \
185 for (pers = mpt_pers_find_reverse(mpt, MPT_MAX_PERSONALITIES-1);\
186 pers != NULL; \
187 pers = mpt_pers_find_reverse(mpt, /*start_at*/pers->id-1))
188
189 static mpt_load_handler_t mpt_stdload;
190 static mpt_probe_handler_t mpt_stdprobe;
191 static mpt_attach_handler_t mpt_stdattach;
192 static mpt_enable_handler_t mpt_stdenable;
193 static mpt_ready_handler_t mpt_stdready;
194 static mpt_event_handler_t mpt_stdevent;
195 static mpt_reset_handler_t mpt_stdreset;
196 static mpt_shutdown_handler_t mpt_stdshutdown;
197 static mpt_detach_handler_t mpt_stddetach;
198 static mpt_unload_handler_t mpt_stdunload;
199 static struct mpt_personality mpt_default_personality =
200 {
201 .load = mpt_stdload,
202 .probe = mpt_stdprobe,
203 .attach = mpt_stdattach,
204 .enable = mpt_stdenable,
205 .ready = mpt_stdready,
206 .event = mpt_stdevent,
207 .reset = mpt_stdreset,
208 .shutdown = mpt_stdshutdown,
209 .detach = mpt_stddetach,
210 .unload = mpt_stdunload
211 };
212
213 static mpt_load_handler_t mpt_core_load;
214 static mpt_attach_handler_t mpt_core_attach;
215 static mpt_enable_handler_t mpt_core_enable;
216 static mpt_reset_handler_t mpt_core_ioc_reset;
217 static mpt_event_handler_t mpt_core_event;
218 static mpt_shutdown_handler_t mpt_core_shutdown;
219 static mpt_shutdown_handler_t mpt_core_detach;
220 static mpt_unload_handler_t mpt_core_unload;
221 static struct mpt_personality mpt_core_personality =
222 {
223 .name = "mpt_core",
224 .load = mpt_core_load,
225 // .attach = mpt_core_attach,
226 // .enable = mpt_core_enable,
227 .event = mpt_core_event,
228 .reset = mpt_core_ioc_reset,
229 .shutdown = mpt_core_shutdown,
230 .detach = mpt_core_detach,
231 .unload = mpt_core_unload,
232 };
233
234 /*
235 * Manual declaration so that DECLARE_MPT_PERSONALITY doesn't need
236 * ordering information. We want the core to always register FIRST.
237 * other modules are set to SI_ORDER_SECOND.
238 */
239 static moduledata_t mpt_core_mod = {
240 "mpt_core", mpt_modevent, &mpt_core_personality
241 };
242 DECLARE_MODULE(mpt_core, mpt_core_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST);
243 MODULE_VERSION(mpt_core, 1);
244
245 #define MPT_PERS_ATTACHED(pers, mpt) ((mpt)->mpt_pers_mask & (0x1 << pers->id))
246
247 int
mpt_modevent(module_t mod,int type,void * data)248 mpt_modevent(module_t mod, int type, void *data)
249 {
250 struct mpt_personality *pers;
251 int error;
252
253 pers = (struct mpt_personality *)data;
254
255 error = 0;
256 switch (type) {
257 case MOD_LOAD:
258 {
259 mpt_load_handler_t **def_handler;
260 mpt_load_handler_t **pers_handler;
261 int i;
262
263 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) {
264 if (mpt_personalities[i] == NULL)
265 break;
266 }
267 if (i >= MPT_MAX_PERSONALITIES) {
268 error = ENOMEM;
269 break;
270 }
271 pers->id = i;
272 mpt_personalities[i] = pers;
273
274 /* Install standard/noop handlers for any NULL entries. */
275 def_handler = MPT_PERS_FIRST_HANDLER(&mpt_default_personality);
276 pers_handler = MPT_PERS_FIRST_HANDLER(pers);
277 while (pers_handler <= MPT_PERS_LAST_HANDLER(pers)) {
278 if (*pers_handler == NULL)
279 *pers_handler = *def_handler;
280 pers_handler++;
281 def_handler++;
282 }
283
284 error = (pers->load(pers));
285 if (error != 0)
286 mpt_personalities[i] = NULL;
287 break;
288 }
289 case MOD_SHUTDOWN:
290 break;
291 case MOD_QUIESCE:
292 break;
293 case MOD_UNLOAD:
294 error = pers->unload(pers);
295 mpt_personalities[pers->id] = NULL;
296 break;
297 default:
298 error = EINVAL;
299 break;
300 }
301 return (error);
302 }
303
304 static int
mpt_stdload(struct mpt_personality * pers)305 mpt_stdload(struct mpt_personality *pers)
306 {
307
308 /* Load is always successful. */
309 return (0);
310 }
311
312 static int
mpt_stdprobe(struct mpt_softc * mpt)313 mpt_stdprobe(struct mpt_softc *mpt)
314 {
315
316 /* Probe is always successful. */
317 return (0);
318 }
319
320 static int
mpt_stdattach(struct mpt_softc * mpt)321 mpt_stdattach(struct mpt_softc *mpt)
322 {
323
324 /* Attach is always successful. */
325 return (0);
326 }
327
328 static int
mpt_stdenable(struct mpt_softc * mpt)329 mpt_stdenable(struct mpt_softc *mpt)
330 {
331
332 /* Enable is always successful. */
333 return (0);
334 }
335
336 static void
mpt_stdready(struct mpt_softc * mpt)337 mpt_stdready(struct mpt_softc *mpt)
338 {
339
340 }
341
342 static int
mpt_stdevent(struct mpt_softc * mpt,request_t * req,MSG_EVENT_NOTIFY_REPLY * msg)343 mpt_stdevent(struct mpt_softc *mpt, request_t *req, MSG_EVENT_NOTIFY_REPLY *msg)
344 {
345
346 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_stdevent: 0x%x\n", msg->Event & 0xFF);
347 /* Event was not for us. */
348 return (0);
349 }
350
351 static void
mpt_stdreset(struct mpt_softc * mpt,int type)352 mpt_stdreset(struct mpt_softc *mpt, int type)
353 {
354
355 }
356
357 static void
mpt_stdshutdown(struct mpt_softc * mpt)358 mpt_stdshutdown(struct mpt_softc *mpt)
359 {
360
361 }
362
363 static void
mpt_stddetach(struct mpt_softc * mpt)364 mpt_stddetach(struct mpt_softc *mpt)
365 {
366
367 }
368
369 static int
mpt_stdunload(struct mpt_personality * pers)370 mpt_stdunload(struct mpt_personality *pers)
371 {
372
373 /* Unload is always successful. */
374 return (0);
375 }
376
377 /*
378 * Post driver attachment, we may want to perform some global actions.
379 * Here is the hook to do so.
380 */
381
382 static void
mpt_postattach(void * unused)383 mpt_postattach(void *unused)
384 {
385 struct mpt_softc *mpt;
386 struct mpt_personality *pers;
387
388 TAILQ_FOREACH(mpt, &mpt_tailq, links) {
389 MPT_PERS_FOREACH(mpt, pers)
390 pers->ready(mpt);
391 }
392 }
393 SYSINIT(mptdev, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE, mpt_postattach, NULL);
394
395 /******************************* Bus DMA Support ******************************/
396 void
mpt_map_rquest(void * arg,bus_dma_segment_t * segs,int nseg,int error)397 mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
398 {
399 struct mpt_map_info *map_info;
400
401 map_info = (struct mpt_map_info *)arg;
402 map_info->error = error;
403 map_info->phys = segs->ds_addr;
404 }
405
406 /**************************** Reply/Event Handling ****************************/
407 int
mpt_register_handler(struct mpt_softc * mpt,mpt_handler_type type,mpt_handler_t handler,uint32_t * phandler_id)408 mpt_register_handler(struct mpt_softc *mpt, mpt_handler_type type,
409 mpt_handler_t handler, uint32_t *phandler_id)
410 {
411
412 switch (type) {
413 case MPT_HANDLER_REPLY:
414 {
415 u_int cbi;
416 u_int free_cbi;
417
418 if (phandler_id == NULL)
419 return (EINVAL);
420
421 free_cbi = MPT_HANDLER_ID_NONE;
422 for (cbi = 0; cbi < MPT_NUM_REPLY_HANDLERS; cbi++) {
423 /*
424 * If the same handler is registered multiple
425 * times, don't error out. Just return the
426 * index of the original registration.
427 */
428 if (mpt_reply_handlers[cbi] == handler.reply_handler) {
429 *phandler_id = MPT_CBI_TO_HID(cbi);
430 return (0);
431 }
432
433 /*
434 * Fill from the front in the hope that
435 * all registered handlers consume only a
436 * single cache line.
437 *
438 * We don't break on the first empty slot so
439 * that the full table is checked to see if
440 * this handler was previously registered.
441 */
442 if (free_cbi == MPT_HANDLER_ID_NONE &&
443 (mpt_reply_handlers[cbi]
444 == mpt_default_reply_handler))
445 free_cbi = cbi;
446 }
447 if (free_cbi == MPT_HANDLER_ID_NONE) {
448 return (ENOMEM);
449 }
450 mpt_reply_handlers[free_cbi] = handler.reply_handler;
451 *phandler_id = MPT_CBI_TO_HID(free_cbi);
452 break;
453 }
454 default:
455 mpt_prt(mpt, "mpt_register_handler unknown type %d\n", type);
456 return (EINVAL);
457 }
458 return (0);
459 }
460
461 int
mpt_deregister_handler(struct mpt_softc * mpt,mpt_handler_type type,mpt_handler_t handler,uint32_t handler_id)462 mpt_deregister_handler(struct mpt_softc *mpt, mpt_handler_type type,
463 mpt_handler_t handler, uint32_t handler_id)
464 {
465
466 switch (type) {
467 case MPT_HANDLER_REPLY:
468 {
469 u_int cbi;
470
471 cbi = MPT_CBI(handler_id);
472 if (cbi >= MPT_NUM_REPLY_HANDLERS
473 || mpt_reply_handlers[cbi] != handler.reply_handler)
474 return (ENOENT);
475 mpt_reply_handlers[cbi] = mpt_default_reply_handler;
476 break;
477 }
478 default:
479 mpt_prt(mpt, "mpt_deregister_handler unknown type %d\n", type);
480 return (EINVAL);
481 }
482 return (0);
483 }
484
485 static int
mpt_default_reply_handler(struct mpt_softc * mpt,request_t * req,uint32_t reply_desc,MSG_DEFAULT_REPLY * reply_frame)486 mpt_default_reply_handler(struct mpt_softc *mpt, request_t *req,
487 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame)
488 {
489
490 mpt_prt(mpt,
491 "Default Handler Called: req=%p:%u reply_descriptor=%x frame=%p\n",
492 req, req->serno, reply_desc, reply_frame);
493
494 if (reply_frame != NULL)
495 mpt_dump_reply_frame(mpt, reply_frame);
496
497 mpt_prt(mpt, "Reply Frame Ignored\n");
498
499 return (/*free_reply*/TRUE);
500 }
501
502 static int
mpt_config_reply_handler(struct mpt_softc * mpt,request_t * req,uint32_t reply_desc,MSG_DEFAULT_REPLY * reply_frame)503 mpt_config_reply_handler(struct mpt_softc *mpt, request_t *req,
504 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame)
505 {
506
507 if (req != NULL) {
508 if (reply_frame != NULL) {
509 MSG_CONFIG *cfgp;
510 MSG_CONFIG_REPLY *reply;
511
512 cfgp = (MSG_CONFIG *)req->req_vbuf;
513 reply = (MSG_CONFIG_REPLY *)reply_frame;
514 req->IOCStatus = le16toh(reply_frame->IOCStatus);
515 bcopy(&reply->Header, &cfgp->Header,
516 sizeof(cfgp->Header));
517 cfgp->ExtPageLength = reply->ExtPageLength;
518 cfgp->ExtPageType = reply->ExtPageType;
519 }
520 req->state &= ~REQ_STATE_QUEUED;
521 req->state |= REQ_STATE_DONE;
522 TAILQ_REMOVE(&mpt->request_pending_list, req, links);
523 if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) {
524 wakeup(req);
525 } else if ((req->state & REQ_STATE_TIMEDOUT) != 0) {
526 /*
527 * Whew- we can free this request (late completion)
528 */
529 mpt_free_request(mpt, req);
530 }
531 }
532
533 return (TRUE);
534 }
535
536 static int
mpt_handshake_reply_handler(struct mpt_softc * mpt,request_t * req,uint32_t reply_desc,MSG_DEFAULT_REPLY * reply_frame)537 mpt_handshake_reply_handler(struct mpt_softc *mpt, request_t *req,
538 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame)
539 {
540
541 /* Nothing to be done. */
542 return (TRUE);
543 }
544
545 static int
mpt_event_reply_handler(struct mpt_softc * mpt,request_t * req,uint32_t reply_desc,MSG_DEFAULT_REPLY * reply_frame)546 mpt_event_reply_handler(struct mpt_softc *mpt, request_t *req,
547 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame)
548 {
549 int free_reply;
550
551 KASSERT(reply_frame != NULL, ("null reply in mpt_event_reply_handler"));
552 KASSERT(req != NULL, ("null request in mpt_event_reply_handler"));
553
554 free_reply = TRUE;
555 switch (reply_frame->Function) {
556 case MPI_FUNCTION_EVENT_NOTIFICATION:
557 {
558 MSG_EVENT_NOTIFY_REPLY *msg;
559 struct mpt_personality *pers;
560 u_int handled;
561
562 handled = 0;
563 msg = (MSG_EVENT_NOTIFY_REPLY *)reply_frame;
564 msg->EventDataLength = le16toh(msg->EventDataLength);
565 msg->IOCStatus = le16toh(msg->IOCStatus);
566 msg->IOCLogInfo = le32toh(msg->IOCLogInfo);
567 msg->Event = le32toh(msg->Event);
568 MPT_PERS_FOREACH(mpt, pers)
569 handled += pers->event(mpt, req, msg);
570
571 if (handled == 0 && mpt->mpt_pers_mask == 0) {
572 mpt_lprt(mpt, MPT_PRT_INFO,
573 "No Handlers For Any Event Notify Frames. "
574 "Event %#x (ACK %sequired).\n",
575 msg->Event, msg->AckRequired? "r" : "not r");
576 } else if (handled == 0) {
577 mpt_lprt(mpt,
578 msg->AckRequired? MPT_PRT_WARN : MPT_PRT_INFO,
579 "Unhandled Event Notify Frame. Event %#x "
580 "(ACK %sequired).\n",
581 msg->Event, msg->AckRequired? "r" : "not r");
582 }
583
584 if (msg->AckRequired) {
585 request_t *ack_req;
586 uint32_t context;
587
588 context = req->index | MPT_REPLY_HANDLER_EVENTS;
589 ack_req = mpt_get_request(mpt, FALSE);
590 if (ack_req == NULL) {
591 struct mpt_evtf_record *evtf;
592
593 evtf = (struct mpt_evtf_record *)reply_frame;
594 evtf->context = context;
595 LIST_INSERT_HEAD(&mpt->ack_frames, evtf, links);
596 free_reply = FALSE;
597 break;
598 }
599 mpt_send_event_ack(mpt, ack_req, msg, context);
600 /*
601 * Don't check for CONTINUATION_REPLY here
602 */
603 return (free_reply);
604 }
605 break;
606 }
607 case MPI_FUNCTION_PORT_ENABLE:
608 mpt_lprt(mpt, MPT_PRT_DEBUG , "enable port reply\n");
609 break;
610 case MPI_FUNCTION_EVENT_ACK:
611 break;
612 default:
613 mpt_prt(mpt, "unknown event function: %x\n",
614 reply_frame->Function);
615 break;
616 }
617
618 /*
619 * I'm not sure that this continuation stuff works as it should.
620 *
621 * I've had FC async events occur that free the frame up because
622 * the continuation bit isn't set, and then additional async events
623 * then occur using the same context. As you might imagine, this
624 * leads to Very Bad Thing.
625 *
626 * Let's just be safe for now and not free them up until we figure
627 * out what's actually happening here.
628 */
629 #if 0
630 if ((reply_frame->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) == 0) {
631 TAILQ_REMOVE(&mpt->request_pending_list, req, links);
632 mpt_free_request(mpt, req);
633 mpt_prt(mpt, "event_reply %x for req %p:%u NOT a continuation",
634 reply_frame->Function, req, req->serno);
635 if (reply_frame->Function == MPI_FUNCTION_EVENT_NOTIFICATION) {
636 MSG_EVENT_NOTIFY_REPLY *msg =
637 (MSG_EVENT_NOTIFY_REPLY *)reply_frame;
638 mpt_prtc(mpt, " Event=0x%x AckReq=%d",
639 msg->Event, msg->AckRequired);
640 }
641 } else {
642 mpt_prt(mpt, "event_reply %x for %p:%u IS a continuation",
643 reply_frame->Function, req, req->serno);
644 if (reply_frame->Function == MPI_FUNCTION_EVENT_NOTIFICATION) {
645 MSG_EVENT_NOTIFY_REPLY *msg =
646 (MSG_EVENT_NOTIFY_REPLY *)reply_frame;
647 mpt_prtc(mpt, " Event=0x%x AckReq=%d",
648 msg->Event, msg->AckRequired);
649 }
650 mpt_prtc(mpt, "\n");
651 }
652 #endif
653 return (free_reply);
654 }
655
656 /*
657 * Process an asynchronous event from the IOC.
658 */
659 static int
mpt_core_event(struct mpt_softc * mpt,request_t * req,MSG_EVENT_NOTIFY_REPLY * msg)660 mpt_core_event(struct mpt_softc *mpt, request_t *req,
661 MSG_EVENT_NOTIFY_REPLY *msg)
662 {
663
664 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_core_event: 0x%x\n",
665 msg->Event & 0xFF);
666 switch(msg->Event & 0xFF) {
667 case MPI_EVENT_NONE:
668 break;
669 case MPI_EVENT_LOG_DATA:
670 {
671 int i;
672
673 /* Some error occurred that LSI wants logged */
674 mpt_prt(mpt, "EvtLogData: IOCLogInfo: 0x%08x\n",
675 msg->IOCLogInfo);
676 mpt_prt(mpt, "\tEvtLogData: Event Data:");
677 for (i = 0; i < msg->EventDataLength; i++)
678 mpt_prtc(mpt, " %08x", msg->Data[i]);
679 mpt_prtc(mpt, "\n");
680 break;
681 }
682 case MPI_EVENT_EVENT_CHANGE:
683 /*
684 * This is just an acknowledgement
685 * of our mpt_send_event_request.
686 */
687 break;
688 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
689 break;
690 default:
691 return (0);
692 break;
693 }
694 return (1);
695 }
696
697 static void
mpt_send_event_ack(struct mpt_softc * mpt,request_t * ack_req,MSG_EVENT_NOTIFY_REPLY * msg,uint32_t context)698 mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req,
699 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context)
700 {
701 MSG_EVENT_ACK *ackp;
702
703 ackp = (MSG_EVENT_ACK *)ack_req->req_vbuf;
704 memset(ackp, 0, sizeof (*ackp));
705 ackp->Function = MPI_FUNCTION_EVENT_ACK;
706 ackp->Event = htole32(msg->Event);
707 ackp->EventContext = htole32(msg->EventContext);
708 ackp->MsgContext = htole32(context);
709 mpt_check_doorbell(mpt);
710 mpt_send_cmd(mpt, ack_req);
711 }
712
713 /***************************** Interrupt Handling *****************************/
714 void
mpt_intr(void * arg)715 mpt_intr(void *arg)
716 {
717 struct mpt_softc *mpt;
718 uint32_t reply_desc;
719 int ntrips = 0;
720
721 mpt = (struct mpt_softc *)arg;
722 mpt_lprt(mpt, MPT_PRT_DEBUG2, "enter mpt_intr\n");
723 MPT_LOCK_ASSERT(mpt);
724
725 while ((reply_desc = mpt_pop_reply_queue(mpt)) != MPT_REPLY_EMPTY) {
726 request_t *req;
727 MSG_DEFAULT_REPLY *reply_frame;
728 uint32_t reply_baddr;
729 uint32_t ctxt_idx;
730 u_int cb_index;
731 u_int req_index;
732 u_int offset;
733 int free_rf;
734
735 req = NULL;
736 reply_frame = NULL;
737 reply_baddr = 0;
738 offset = 0;
739 if ((reply_desc & MPI_ADDRESS_REPLY_A_BIT) != 0) {
740 /*
741 * Ensure that the reply frame is coherent.
742 */
743 reply_baddr = MPT_REPLY_BADDR(reply_desc);
744 offset = reply_baddr - (mpt->reply_phys & 0xFFFFFFFF);
745 bus_dmamap_sync_range(mpt->reply_dmat,
746 mpt->reply_dmap, offset, MPT_REPLY_SIZE,
747 BUS_DMASYNC_POSTREAD);
748 reply_frame = MPT_REPLY_OTOV(mpt, offset);
749 ctxt_idx = le32toh(reply_frame->MsgContext);
750 } else {
751 uint32_t type;
752
753 type = MPI_GET_CONTEXT_REPLY_TYPE(reply_desc);
754 ctxt_idx = reply_desc;
755 mpt_lprt(mpt, MPT_PRT_DEBUG1, "Context Reply: 0x%08x\n",
756 reply_desc);
757
758 switch (type) {
759 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
760 ctxt_idx &= MPI_CONTEXT_REPLY_CONTEXT_MASK;
761 break;
762 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
763 ctxt_idx = GET_IO_INDEX(reply_desc);
764 if (mpt->tgt_cmd_ptrs == NULL) {
765 mpt_prt(mpt,
766 "mpt_intr: no target cmd ptrs\n");
767 reply_desc = MPT_REPLY_EMPTY;
768 break;
769 }
770 if (ctxt_idx >= mpt->tgt_cmds_allocated) {
771 mpt_prt(mpt,
772 "mpt_intr: bad tgt cmd ctxt %u\n",
773 ctxt_idx);
774 reply_desc = MPT_REPLY_EMPTY;
775 ntrips = 1000;
776 break;
777 }
778 req = mpt->tgt_cmd_ptrs[ctxt_idx];
779 if (req == NULL) {
780 mpt_prt(mpt, "no request backpointer "
781 "at index %u", ctxt_idx);
782 reply_desc = MPT_REPLY_EMPTY;
783 ntrips = 1000;
784 break;
785 }
786 /*
787 * Reformulate ctxt_idx to be just as if
788 * it were another type of context reply
789 * so the code below will find the request
790 * via indexing into the pool.
791 */
792 ctxt_idx =
793 req->index | mpt->scsi_tgt_handler_id;
794 req = NULL;
795 break;
796 case MPI_CONTEXT_REPLY_TYPE_LAN:
797 mpt_prt(mpt, "LAN CONTEXT REPLY: 0x%08x\n",
798 reply_desc);
799 reply_desc = MPT_REPLY_EMPTY;
800 break;
801 default:
802 mpt_prt(mpt, "Context Reply 0x%08x?\n", type);
803 reply_desc = MPT_REPLY_EMPTY;
804 break;
805 }
806 if (reply_desc == MPT_REPLY_EMPTY) {
807 if (ntrips++ > 1000) {
808 break;
809 }
810 continue;
811 }
812 }
813
814 cb_index = MPT_CONTEXT_TO_CBI(ctxt_idx);
815 req_index = MPT_CONTEXT_TO_REQI(ctxt_idx);
816 if (req_index < MPT_MAX_REQUESTS(mpt)) {
817 req = &mpt->request_pool[req_index];
818 } else {
819 mpt_prt(mpt, "WARN: mpt_intr index == %d (reply_desc =="
820 " 0x%x)\n", req_index, reply_desc);
821 }
822
823 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap,
824 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
825 free_rf = mpt_reply_handlers[cb_index](mpt, req,
826 reply_desc, reply_frame);
827
828 if (reply_frame != NULL && free_rf) {
829 bus_dmamap_sync_range(mpt->reply_dmat,
830 mpt->reply_dmap, offset, MPT_REPLY_SIZE,
831 BUS_DMASYNC_PREREAD);
832 mpt_free_reply(mpt, reply_baddr);
833 }
834
835 /*
836 * If we got ourselves disabled, don't get stuck in a loop
837 */
838 if (mpt->disabled) {
839 mpt_disable_ints(mpt);
840 break;
841 }
842 if (ntrips++ > 1000) {
843 break;
844 }
845 }
846 mpt_lprt(mpt, MPT_PRT_DEBUG2, "exit mpt_intr\n");
847 }
848
849 /******************************* Error Recovery *******************************/
850 void
mpt_complete_request_chain(struct mpt_softc * mpt,struct req_queue * chain,u_int iocstatus)851 mpt_complete_request_chain(struct mpt_softc *mpt, struct req_queue *chain,
852 u_int iocstatus)
853 {
854 MSG_DEFAULT_REPLY ioc_status_frame;
855 request_t *req;
856
857 memset(&ioc_status_frame, 0, sizeof(ioc_status_frame));
858 ioc_status_frame.MsgLength = roundup2(sizeof(ioc_status_frame), 4);
859 ioc_status_frame.IOCStatus = iocstatus;
860 while((req = TAILQ_FIRST(chain)) != NULL) {
861 MSG_REQUEST_HEADER *msg_hdr;
862 u_int cb_index;
863
864 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap,
865 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
866 msg_hdr = (MSG_REQUEST_HEADER *)req->req_vbuf;
867 ioc_status_frame.Function = msg_hdr->Function;
868 ioc_status_frame.MsgContext = msg_hdr->MsgContext;
869 cb_index = MPT_CONTEXT_TO_CBI(le32toh(msg_hdr->MsgContext));
870 mpt_reply_handlers[cb_index](mpt, req, msg_hdr->MsgContext,
871 &ioc_status_frame);
872 if (mpt_req_on_pending_list(mpt, req) != 0)
873 TAILQ_REMOVE(chain, req, links);
874 }
875 }
876
877 /********************************* Diagnostics ********************************/
878 /*
879 * Perform a diagnostic dump of a reply frame.
880 */
881 void
mpt_dump_reply_frame(struct mpt_softc * mpt,MSG_DEFAULT_REPLY * reply_frame)882 mpt_dump_reply_frame(struct mpt_softc *mpt, MSG_DEFAULT_REPLY *reply_frame)
883 {
884
885 mpt_prt(mpt, "Address Reply:\n");
886 mpt_print_reply(reply_frame);
887 }
888
889 /******************************* Doorbell Access ******************************/
890 static __inline uint32_t mpt_rd_db(struct mpt_softc *mpt);
891 static __inline uint32_t mpt_rd_intr(struct mpt_softc *mpt);
892
893 static __inline uint32_t
mpt_rd_db(struct mpt_softc * mpt)894 mpt_rd_db(struct mpt_softc *mpt)
895 {
896
897 return mpt_read(mpt, MPT_OFFSET_DOORBELL);
898 }
899
900 static __inline uint32_t
mpt_rd_intr(struct mpt_softc * mpt)901 mpt_rd_intr(struct mpt_softc *mpt)
902 {
903
904 return mpt_read(mpt, MPT_OFFSET_INTR_STATUS);
905 }
906
907 /* Busy wait for a door bell to be read by IOC */
908 static int
mpt_wait_db_ack(struct mpt_softc * mpt)909 mpt_wait_db_ack(struct mpt_softc *mpt)
910 {
911 int i;
912
913 for (i=0; i < MPT_MAX_WAIT; i++) {
914 if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) {
915 maxwait_ack = i > maxwait_ack ? i : maxwait_ack;
916 return (MPT_OK);
917 }
918 DELAY(200);
919 }
920 return (MPT_FAIL);
921 }
922
923 /* Busy wait for a door bell interrupt */
924 static int
mpt_wait_db_int(struct mpt_softc * mpt)925 mpt_wait_db_int(struct mpt_softc *mpt)
926 {
927 int i;
928
929 for (i = 0; i < MPT_MAX_WAIT; i++) {
930 if (MPT_DB_INTR(mpt_rd_intr(mpt))) {
931 maxwait_int = i > maxwait_int ? i : maxwait_int;
932 return MPT_OK;
933 }
934 DELAY(100);
935 }
936 return (MPT_FAIL);
937 }
938
939 /* Wait for IOC to transition to a give state */
940 void
mpt_check_doorbell(struct mpt_softc * mpt)941 mpt_check_doorbell(struct mpt_softc *mpt)
942 {
943 uint32_t db = mpt_rd_db(mpt);
944
945 if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) {
946 mpt_prt(mpt, "Device not running\n");
947 mpt_print_db(db);
948 }
949 }
950
951 /* Wait for IOC to transition to a give state */
952 static int
mpt_wait_state(struct mpt_softc * mpt,enum DB_STATE_BITS state)953 mpt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state)
954 {
955 int i;
956
957 for (i = 0; i < MPT_MAX_WAIT; i++) {
958 uint32_t db = mpt_rd_db(mpt);
959 if (MPT_STATE(db) == state) {
960 maxwait_state = i > maxwait_state ? i : maxwait_state;
961 return (MPT_OK);
962 }
963 DELAY(100);
964 }
965 return (MPT_FAIL);
966 }
967
968
969 /************************* Initialization/Configuration ************************/
970 static int mpt_download_fw(struct mpt_softc *mpt);
971
972 /* Issue the reset COMMAND to the IOC */
973 static int
mpt_soft_reset(struct mpt_softc * mpt)974 mpt_soft_reset(struct mpt_softc *mpt)
975 {
976
977 mpt_lprt(mpt, MPT_PRT_DEBUG, "soft reset\n");
978
979 /* Have to use hard reset if we are not in Running state */
980 if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) {
981 mpt_prt(mpt, "soft reset failed: device not running\n");
982 return (MPT_FAIL);
983 }
984
985 /* If door bell is in use we don't have a chance of getting
986 * a word in since the IOC probably crashed in message
987 * processing. So don't waste our time.
988 */
989 if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) {
990 mpt_prt(mpt, "soft reset failed: doorbell wedged\n");
991 return (MPT_FAIL);
992 }
993
994 /* Send the reset request to the IOC */
995 mpt_write(mpt, MPT_OFFSET_DOORBELL,
996 MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT);
997 if (mpt_wait_db_ack(mpt) != MPT_OK) {
998 mpt_prt(mpt, "soft reset failed: ack timeout\n");
999 return (MPT_FAIL);
1000 }
1001
1002 /* Wait for the IOC to reload and come out of reset state */
1003 if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) {
1004 mpt_prt(mpt, "soft reset failed: device did not restart\n");
1005 return (MPT_FAIL);
1006 }
1007
1008 return MPT_OK;
1009 }
1010
1011 static int
mpt_enable_diag_mode(struct mpt_softc * mpt)1012 mpt_enable_diag_mode(struct mpt_softc *mpt)
1013 {
1014 int try;
1015
1016 try = 20;
1017 while (--try) {
1018
1019 if ((mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC) & MPI_DIAG_DRWE) != 0)
1020 break;
1021
1022 /* Enable diagnostic registers */
1023 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF);
1024 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_1ST_KEY_VALUE);
1025 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_2ND_KEY_VALUE);
1026 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_3RD_KEY_VALUE);
1027 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_4TH_KEY_VALUE);
1028 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_5TH_KEY_VALUE);
1029
1030 DELAY(100000);
1031 }
1032 if (try == 0)
1033 return (EIO);
1034 return (0);
1035 }
1036
1037 static void
mpt_disable_diag_mode(struct mpt_softc * mpt)1038 mpt_disable_diag_mode(struct mpt_softc *mpt)
1039 {
1040
1041 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFFFFFFFF);
1042 }
1043
1044 /* This is a magic diagnostic reset that resets all the ARM
1045 * processors in the chip.
1046 */
1047 static void
mpt_hard_reset(struct mpt_softc * mpt)1048 mpt_hard_reset(struct mpt_softc *mpt)
1049 {
1050 int error;
1051 int wait;
1052 uint32_t diagreg;
1053
1054 mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n");
1055
1056 if (mpt->is_1078) {
1057 mpt_write(mpt, MPT_OFFSET_RESET_1078, 0x07);
1058 DELAY(1000);
1059 return;
1060 }
1061
1062 error = mpt_enable_diag_mode(mpt);
1063 if (error) {
1064 mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n");
1065 mpt_prt(mpt, "Trying to reset anyway.\n");
1066 }
1067
1068 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC);
1069
1070 /*
1071 * This appears to be a workaround required for some
1072 * firmware or hardware revs.
1073 */
1074 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_DISABLE_ARM);
1075 DELAY(1000);
1076
1077 /* Diag. port is now active so we can now hit the reset bit */
1078 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_RESET_ADAPTER);
1079
1080 /*
1081 * Ensure that the reset has finished. We delay 1ms
1082 * prior to reading the register to make sure the chip
1083 * has sufficiently completed its reset to handle register
1084 * accesses.
1085 */
1086 wait = 5000;
1087 do {
1088 DELAY(1000);
1089 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC);
1090 } while (--wait && (diagreg & MPI_DIAG_RESET_ADAPTER) == 0);
1091
1092 if (wait == 0) {
1093 mpt_prt(mpt, "WARNING - Failed hard reset! "
1094 "Trying to initialize anyway.\n");
1095 }
1096
1097 /*
1098 * If we have firmware to download, it must be loaded before
1099 * the controller will become operational. Do so now.
1100 */
1101 if (mpt->fw_image != NULL) {
1102
1103 error = mpt_download_fw(mpt);
1104
1105 if (error) {
1106 mpt_prt(mpt, "WARNING - Firmware Download Failed!\n");
1107 mpt_prt(mpt, "Trying to initialize anyway.\n");
1108 }
1109 }
1110
1111 /*
1112 * Reseting the controller should have disabled write
1113 * access to the diagnostic registers, but disable
1114 * manually to be sure.
1115 */
1116 mpt_disable_diag_mode(mpt);
1117 }
1118
1119 static void
mpt_core_ioc_reset(struct mpt_softc * mpt,int type)1120 mpt_core_ioc_reset(struct mpt_softc *mpt, int type)
1121 {
1122
1123 /*
1124 * Complete all pending requests with a status
1125 * appropriate for an IOC reset.
1126 */
1127 mpt_complete_request_chain(mpt, &mpt->request_pending_list,
1128 MPI_IOCSTATUS_INVALID_STATE);
1129 }
1130
1131 /*
1132 * Reset the IOC when needed. Try software command first then if needed
1133 * poke at the magic diagnostic reset. Note that a hard reset resets
1134 * *both* IOCs on dual function chips (FC929 && LSI1030) as well as
1135 * fouls up the PCI configuration registers.
1136 */
1137 int
mpt_reset(struct mpt_softc * mpt,int reinit)1138 mpt_reset(struct mpt_softc *mpt, int reinit)
1139 {
1140 struct mpt_personality *pers;
1141 int ret;
1142 int retry_cnt = 0;
1143
1144 /*
1145 * Try a soft reset. If that fails, get out the big hammer.
1146 */
1147 again:
1148 if ((ret = mpt_soft_reset(mpt)) != MPT_OK) {
1149 int cnt;
1150 for (cnt = 0; cnt < 5; cnt++) {
1151 /* Failed; do a hard reset */
1152 mpt_hard_reset(mpt);
1153
1154 /*
1155 * Wait for the IOC to reload
1156 * and come out of reset state
1157 */
1158 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY);
1159 if (ret == MPT_OK) {
1160 break;
1161 }
1162 /*
1163 * Okay- try to check again...
1164 */
1165 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY);
1166 if (ret == MPT_OK) {
1167 break;
1168 }
1169 mpt_prt(mpt, "mpt_reset: failed hard reset (%d:%d)\n",
1170 retry_cnt, cnt);
1171 }
1172 }
1173
1174 if (retry_cnt == 0) {
1175 /*
1176 * Invoke reset handlers. We bump the reset count so
1177 * that mpt_wait_req() understands that regardless of
1178 * the specified wait condition, it should stop its wait.
1179 */
1180 mpt->reset_cnt++;
1181 MPT_PERS_FOREACH(mpt, pers)
1182 pers->reset(mpt, ret);
1183 }
1184
1185 if (reinit) {
1186 ret = mpt_enable_ioc(mpt, 1);
1187 if (ret == MPT_OK) {
1188 mpt_enable_ints(mpt);
1189 }
1190 }
1191 if (ret != MPT_OK && retry_cnt++ < 2) {
1192 goto again;
1193 }
1194 return ret;
1195 }
1196
1197 /* Return a command buffer to the free queue */
1198 void
mpt_free_request(struct mpt_softc * mpt,request_t * req)1199 mpt_free_request(struct mpt_softc *mpt, request_t *req)
1200 {
1201 request_t *nxt;
1202 struct mpt_evtf_record *record;
1203 uint32_t offset, reply_baddr;
1204
1205 if (req == NULL || req != &mpt->request_pool[req->index]) {
1206 panic("mpt_free_request: bad req ptr");
1207 }
1208 if ((nxt = req->chain) != NULL) {
1209 req->chain = NULL;
1210 mpt_free_request(mpt, nxt); /* NB: recursion */
1211 }
1212 KASSERT(req->state != REQ_STATE_FREE, ("freeing free request"));
1213 KASSERT(!(req->state & REQ_STATE_LOCKED), ("freeing locked request"));
1214 MPT_LOCK_ASSERT(mpt);
1215 KASSERT(mpt_req_on_free_list(mpt, req) == 0,
1216 ("mpt_free_request: req %p:%u func %x already on freelist",
1217 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function));
1218 KASSERT(mpt_req_on_pending_list(mpt, req) == 0,
1219 ("mpt_free_request: req %p:%u func %x on pending list",
1220 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function));
1221 #ifdef INVARIANTS
1222 mpt_req_not_spcl(mpt, req, "mpt_free_request", __LINE__);
1223 #endif
1224
1225 req->ccb = NULL;
1226 if (LIST_EMPTY(&mpt->ack_frames)) {
1227 /*
1228 * Insert free ones at the tail
1229 */
1230 req->serno = 0;
1231 req->state = REQ_STATE_FREE;
1232 #ifdef INVARIANTS
1233 memset(req->req_vbuf, 0xff, sizeof (MSG_REQUEST_HEADER));
1234 #endif
1235 TAILQ_INSERT_TAIL(&mpt->request_free_list, req, links);
1236 if (mpt->getreqwaiter != 0) {
1237 mpt->getreqwaiter = 0;
1238 wakeup(&mpt->request_free_list);
1239 }
1240 return;
1241 }
1242
1243 /*
1244 * Process an ack frame deferred due to resource shortage.
1245 */
1246 record = LIST_FIRST(&mpt->ack_frames);
1247 LIST_REMOVE(record, links);
1248 req->state = REQ_STATE_ALLOCATED;
1249 mpt_assign_serno(mpt, req);
1250 mpt_send_event_ack(mpt, req, &record->reply, record->context);
1251 offset = (uint32_t)((uint8_t *)record - mpt->reply);
1252 reply_baddr = offset + (mpt->reply_phys & 0xFFFFFFFF);
1253 bus_dmamap_sync_range(mpt->reply_dmat, mpt->reply_dmap, offset,
1254 MPT_REPLY_SIZE, BUS_DMASYNC_PREREAD);
1255 mpt_free_reply(mpt, reply_baddr);
1256 }
1257
1258 /* Get a command buffer from the free queue */
1259 request_t *
mpt_get_request(struct mpt_softc * mpt,int sleep_ok)1260 mpt_get_request(struct mpt_softc *mpt, int sleep_ok)
1261 {
1262 request_t *req;
1263
1264 retry:
1265 MPT_LOCK_ASSERT(mpt);
1266 req = TAILQ_FIRST(&mpt->request_free_list);
1267 if (req != NULL) {
1268 KASSERT(req == &mpt->request_pool[req->index],
1269 ("mpt_get_request: corrupted request free list"));
1270 KASSERT(req->state == REQ_STATE_FREE,
1271 ("req %p:%u not free on free list %x index %d function %x",
1272 req, req->serno, req->state, req->index,
1273 ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function));
1274 TAILQ_REMOVE(&mpt->request_free_list, req, links);
1275 req->state = REQ_STATE_ALLOCATED;
1276 req->chain = NULL;
1277 mpt_assign_serno(mpt, req);
1278 } else if (sleep_ok != 0) {
1279 mpt->getreqwaiter = 1;
1280 mpt_sleep(mpt, &mpt->request_free_list, PUSER, "mptgreq", 0);
1281 goto retry;
1282 }
1283 return (req);
1284 }
1285
1286 /* Pass the command to the IOC */
1287 void
mpt_send_cmd(struct mpt_softc * mpt,request_t * req)1288 mpt_send_cmd(struct mpt_softc *mpt, request_t *req)
1289 {
1290
1291 if (mpt->verbose > MPT_PRT_DEBUG2) {
1292 mpt_dump_request(mpt, req);
1293 }
1294 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap,
1295 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1296 req->state |= REQ_STATE_QUEUED;
1297 KASSERT(mpt_req_on_free_list(mpt, req) == 0,
1298 ("req %p:%u func %x on freelist list in mpt_send_cmd",
1299 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function));
1300 KASSERT(mpt_req_on_pending_list(mpt, req) == 0,
1301 ("req %p:%u func %x already on pending list in mpt_send_cmd",
1302 req, req->serno, ((MSG_REQUEST_HEADER *)req->req_vbuf)->Function));
1303 TAILQ_INSERT_HEAD(&mpt->request_pending_list, req, links);
1304 mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (uint32_t) req->req_pbuf);
1305 }
1306
1307 /*
1308 * Wait for a request to complete.
1309 *
1310 * Inputs:
1311 * mpt softc of controller executing request
1312 * req request to wait for
1313 * sleep_ok nonzero implies may sleep in this context
1314 * time_ms timeout in ms. 0 implies no timeout.
1315 *
1316 * Return Values:
1317 * 0 Request completed
1318 * non-0 Timeout fired before request completion.
1319 */
1320 int
mpt_wait_req(struct mpt_softc * mpt,request_t * req,mpt_req_state_t state,mpt_req_state_t mask,int sleep_ok,int time_ms)1321 mpt_wait_req(struct mpt_softc *mpt, request_t *req,
1322 mpt_req_state_t state, mpt_req_state_t mask,
1323 int sleep_ok, int time_ms)
1324 {
1325 int timeout;
1326 u_int saved_cnt;
1327 sbintime_t sbt;
1328
1329 /*
1330 * time_ms is in ms, 0 indicates infinite wait.
1331 * Convert to sbintime_t or 500us units depending on
1332 * our sleep mode.
1333 */
1334 if (sleep_ok != 0) {
1335 sbt = SBT_1MS * time_ms;
1336 /* Set timeout as well so final timeout check works. */
1337 timeout = time_ms;
1338 } else {
1339 sbt = 0; /* Squelch bogus gcc warning. */
1340 timeout = time_ms * 2;
1341 }
1342 req->state |= REQ_STATE_NEED_WAKEUP;
1343 mask &= ~REQ_STATE_NEED_WAKEUP;
1344 saved_cnt = mpt->reset_cnt;
1345 while ((req->state & mask) != state && mpt->reset_cnt == saved_cnt) {
1346 if (sleep_ok != 0) {
1347 if (mpt_sleep(mpt, req, PUSER, "mptreq", sbt) ==
1348 EWOULDBLOCK) {
1349 timeout = 0;
1350 break;
1351 }
1352 } else {
1353 if (time_ms != 0 && --timeout == 0) {
1354 break;
1355 }
1356 DELAY(500);
1357 mpt_intr(mpt);
1358 }
1359 }
1360 req->state &= ~REQ_STATE_NEED_WAKEUP;
1361 if (mpt->reset_cnt != saved_cnt) {
1362 return (EIO);
1363 }
1364 if (time_ms && timeout <= 0) {
1365 MSG_REQUEST_HEADER *msg_hdr = req->req_vbuf;
1366 req->state |= REQ_STATE_TIMEDOUT;
1367 mpt_prt(mpt, "mpt_wait_req(%x) timed out\n", msg_hdr->Function);
1368 return (ETIMEDOUT);
1369 }
1370 return (0);
1371 }
1372
1373 /*
1374 * Send a command to the IOC via the handshake register.
1375 *
1376 * Only done at initialization time and for certain unusual
1377 * commands such as device/bus reset as specified by LSI.
1378 */
1379 int
mpt_send_handshake_cmd(struct mpt_softc * mpt,size_t len,void * cmd)1380 mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd)
1381 {
1382 int i;
1383 uint32_t data, *data32;
1384
1385 /* Check condition of the IOC */
1386 data = mpt_rd_db(mpt);
1387 if ((MPT_STATE(data) != MPT_DB_STATE_READY
1388 && MPT_STATE(data) != MPT_DB_STATE_RUNNING
1389 && MPT_STATE(data) != MPT_DB_STATE_FAULT)
1390 || MPT_DB_IS_IN_USE(data)) {
1391 mpt_prt(mpt, "handshake aborted - invalid doorbell state\n");
1392 mpt_print_db(data);
1393 return (EBUSY);
1394 }
1395
1396 /* We move things in 32 bit chunks */
1397 len = (len + 3) >> 2;
1398 data32 = cmd;
1399
1400 /* Clear any left over pending doorbell interrupts */
1401 if (MPT_DB_INTR(mpt_rd_intr(mpt)))
1402 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1403
1404 /*
1405 * Tell the handshake reg. we are going to send a command
1406 * and how long it is going to be.
1407 */
1408 data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) |
1409 (len << MPI_DOORBELL_ADD_DWORDS_SHIFT);
1410 mpt_write(mpt, MPT_OFFSET_DOORBELL, data);
1411
1412 /* Wait for the chip to notice */
1413 if (mpt_wait_db_int(mpt) != MPT_OK) {
1414 mpt_prt(mpt, "mpt_send_handshake_cmd: db ignored\n");
1415 return (ETIMEDOUT);
1416 }
1417
1418 /* Clear the interrupt */
1419 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1420
1421 if (mpt_wait_db_ack(mpt) != MPT_OK) {
1422 mpt_prt(mpt, "mpt_send_handshake_cmd: db ack timed out\n");
1423 return (ETIMEDOUT);
1424 }
1425
1426 /* Send the command */
1427 for (i = 0; i < len; i++) {
1428 mpt_write_stream(mpt, MPT_OFFSET_DOORBELL, *data32++);
1429 if (mpt_wait_db_ack(mpt) != MPT_OK) {
1430 mpt_prt(mpt,
1431 "mpt_send_handshake_cmd: timeout @ index %d\n", i);
1432 return (ETIMEDOUT);
1433 }
1434 }
1435 return MPT_OK;
1436 }
1437
1438 /* Get the response from the handshake register */
1439 int
mpt_recv_handshake_reply(struct mpt_softc * mpt,size_t reply_len,void * reply)1440 mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply)
1441 {
1442 int left, reply_left;
1443 u_int16_t *data16;
1444 uint32_t data;
1445 MSG_DEFAULT_REPLY *hdr;
1446
1447 /* We move things out in 16 bit chunks */
1448 reply_len >>= 1;
1449 data16 = (u_int16_t *)reply;
1450
1451 hdr = (MSG_DEFAULT_REPLY *)reply;
1452
1453 /* Get first word */
1454 if (mpt_wait_db_int(mpt) != MPT_OK) {
1455 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout1\n");
1456 return ETIMEDOUT;
1457 }
1458 data = mpt_read(mpt, MPT_OFFSET_DOORBELL);
1459 *data16++ = le16toh(data & MPT_DB_DATA_MASK);
1460 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1461
1462 /* Get second word */
1463 if (mpt_wait_db_int(mpt) != MPT_OK) {
1464 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout2\n");
1465 return ETIMEDOUT;
1466 }
1467 data = mpt_read(mpt, MPT_OFFSET_DOORBELL);
1468 *data16++ = le16toh(data & MPT_DB_DATA_MASK);
1469 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1470
1471 /*
1472 * With the second word, we can now look at the length.
1473 * Warn about a reply that's too short (except for IOC FACTS REPLY)
1474 */
1475 if ((reply_len >> 1) != hdr->MsgLength &&
1476 (hdr->Function != MPI_FUNCTION_IOC_FACTS)){
1477 mpt_prt(mpt, "reply length does not match message length: "
1478 "got %x; expected %zx for function %x\n",
1479 hdr->MsgLength << 2, reply_len << 1, hdr->Function);
1480 }
1481
1482 /* Get rest of the reply; but don't overflow the provided buffer */
1483 left = (hdr->MsgLength << 1) - 2;
1484 reply_left = reply_len - 2;
1485 while (left--) {
1486 if (mpt_wait_db_int(mpt) != MPT_OK) {
1487 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout3\n");
1488 return ETIMEDOUT;
1489 }
1490 data = mpt_read(mpt, MPT_OFFSET_DOORBELL);
1491 if (reply_left-- > 0)
1492 *data16++ = le16toh(data & MPT_DB_DATA_MASK);
1493 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1494 }
1495
1496 /* One more wait & clear at the end */
1497 if (mpt_wait_db_int(mpt) != MPT_OK) {
1498 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout4\n");
1499 return ETIMEDOUT;
1500 }
1501 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1502
1503 if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
1504 if (mpt->verbose >= MPT_PRT_TRACE)
1505 mpt_print_reply(hdr);
1506 return (MPT_FAIL | hdr->IOCStatus);
1507 }
1508
1509 return (0);
1510 }
1511
1512 static int
mpt_get_iocfacts(struct mpt_softc * mpt,MSG_IOC_FACTS_REPLY * freplp)1513 mpt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp)
1514 {
1515 MSG_IOC_FACTS f_req;
1516 int error;
1517
1518 memset(&f_req, 0, sizeof f_req);
1519 f_req.Function = MPI_FUNCTION_IOC_FACTS;
1520 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE);
1521 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req);
1522 if (error) {
1523 return(error);
1524 }
1525 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp);
1526 return (error);
1527 }
1528
1529 static int
mpt_get_portfacts(struct mpt_softc * mpt,U8 port,MSG_PORT_FACTS_REPLY * freplp)1530 mpt_get_portfacts(struct mpt_softc *mpt, U8 port, MSG_PORT_FACTS_REPLY *freplp)
1531 {
1532 MSG_PORT_FACTS f_req;
1533 int error;
1534
1535 memset(&f_req, 0, sizeof f_req);
1536 f_req.Function = MPI_FUNCTION_PORT_FACTS;
1537 f_req.PortNumber = port;
1538 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE);
1539 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req);
1540 if (error) {
1541 return(error);
1542 }
1543 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp);
1544 return (error);
1545 }
1546
1547 /*
1548 * Send the initialization request. This is where we specify how many
1549 * SCSI buses and how many devices per bus we wish to emulate.
1550 * This is also the command that specifies the max size of the reply
1551 * frames from the IOC that we will be allocating.
1552 */
1553 static int
mpt_send_ioc_init(struct mpt_softc * mpt,uint32_t who)1554 mpt_send_ioc_init(struct mpt_softc *mpt, uint32_t who)
1555 {
1556 int error = 0;
1557 MSG_IOC_INIT init;
1558 MSG_IOC_INIT_REPLY reply;
1559
1560 memset(&init, 0, sizeof init);
1561 init.WhoInit = who;
1562 init.Function = MPI_FUNCTION_IOC_INIT;
1563 init.MaxDevices = 0; /* at least 256 devices per bus */
1564 init.MaxBuses = 16; /* at least 16 buses */
1565
1566 init.MsgVersion = htole16(MPI_VERSION);
1567 init.HeaderVersion = htole16(MPI_HEADER_VERSION);
1568 init.ReplyFrameSize = htole16(MPT_REPLY_SIZE);
1569 init.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE);
1570
1571 if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) {
1572 return(error);
1573 }
1574
1575 error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply);
1576 return (error);
1577 }
1578
1579
1580 /*
1581 * Utiltity routine to read configuration headers and pages
1582 */
1583 int
mpt_issue_cfg_req(struct mpt_softc * mpt,request_t * req,cfgparms_t * params,bus_addr_t addr,bus_size_t len,int sleep_ok,int timeout_ms)1584 mpt_issue_cfg_req(struct mpt_softc *mpt, request_t *req, cfgparms_t *params,
1585 bus_addr_t addr, bus_size_t len, int sleep_ok, int timeout_ms)
1586 {
1587 MSG_CONFIG *cfgp;
1588 SGE_SIMPLE32 *se;
1589
1590 cfgp = req->req_vbuf;
1591 memset(cfgp, 0, sizeof *cfgp);
1592 cfgp->Action = params->Action;
1593 cfgp->Function = MPI_FUNCTION_CONFIG;
1594 cfgp->Header.PageVersion = params->PageVersion;
1595 cfgp->Header.PageNumber = params->PageNumber;
1596 cfgp->PageAddress = htole32(params->PageAddress);
1597 if ((params->PageType & MPI_CONFIG_PAGETYPE_MASK) ==
1598 MPI_CONFIG_PAGETYPE_EXTENDED) {
1599 cfgp->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
1600 cfgp->Header.PageLength = 0;
1601 cfgp->ExtPageLength = htole16(params->ExtPageLength);
1602 cfgp->ExtPageType = params->ExtPageType;
1603 } else {
1604 cfgp->Header.PageType = params->PageType;
1605 cfgp->Header.PageLength = params->PageLength;
1606 }
1607 se = (SGE_SIMPLE32 *)&cfgp->PageBufferSGE;
1608 se->Address = htole32(addr);
1609 MPI_pSGE_SET_LENGTH(se, len);
1610 MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1611 MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER |
1612 MPI_SGE_FLAGS_END_OF_LIST |
1613 ((params->Action == MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT
1614 || params->Action == MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM)
1615 ? MPI_SGE_FLAGS_HOST_TO_IOC : MPI_SGE_FLAGS_IOC_TO_HOST)));
1616 se->FlagsLength = htole32(se->FlagsLength);
1617 cfgp->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG);
1618
1619 mpt_check_doorbell(mpt);
1620 mpt_send_cmd(mpt, req);
1621 return (mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE,
1622 sleep_ok, timeout_ms));
1623 }
1624
1625 int
mpt_read_extcfg_header(struct mpt_softc * mpt,int PageVersion,int PageNumber,uint32_t PageAddress,int ExtPageType,CONFIG_EXTENDED_PAGE_HEADER * rslt,int sleep_ok,int timeout_ms)1626 mpt_read_extcfg_header(struct mpt_softc *mpt, int PageVersion, int PageNumber,
1627 uint32_t PageAddress, int ExtPageType,
1628 CONFIG_EXTENDED_PAGE_HEADER *rslt,
1629 int sleep_ok, int timeout_ms)
1630 {
1631 request_t *req;
1632 cfgparms_t params;
1633 MSG_CONFIG_REPLY *cfgp;
1634 int error;
1635
1636 req = mpt_get_request(mpt, sleep_ok);
1637 if (req == NULL) {
1638 mpt_prt(mpt, "mpt_extread_cfg_header: Get request failed!\n");
1639 return (ENOMEM);
1640 }
1641
1642 params.Action = MPI_CONFIG_ACTION_PAGE_HEADER;
1643 params.PageVersion = PageVersion;
1644 params.PageLength = 0;
1645 params.PageNumber = PageNumber;
1646 params.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
1647 params.PageAddress = PageAddress;
1648 params.ExtPageType = ExtPageType;
1649 params.ExtPageLength = 0;
1650 error = mpt_issue_cfg_req(mpt, req, ¶ms, /*addr*/0, /*len*/0,
1651 sleep_ok, timeout_ms);
1652 if (error != 0) {
1653 /*
1654 * Leave the request. Without resetting the chip, it's
1655 * still owned by it and we'll just get into trouble
1656 * freeing it now. Mark it as abandoned so that if it
1657 * shows up later it can be freed.
1658 */
1659 mpt_prt(mpt, "read_extcfg_header timed out\n");
1660 return (ETIMEDOUT);
1661 }
1662
1663 switch (req->IOCStatus & MPI_IOCSTATUS_MASK) {
1664 case MPI_IOCSTATUS_SUCCESS:
1665 cfgp = req->req_vbuf;
1666 rslt->PageVersion = cfgp->Header.PageVersion;
1667 rslt->PageNumber = cfgp->Header.PageNumber;
1668 rslt->PageType = cfgp->Header.PageType;
1669 rslt->ExtPageLength = le16toh(cfgp->ExtPageLength);
1670 rslt->ExtPageType = cfgp->ExtPageType;
1671 error = 0;
1672 break;
1673 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE:
1674 mpt_lprt(mpt, MPT_PRT_DEBUG,
1675 "Invalid Page Type %d Number %d Addr 0x%0x\n",
1676 MPI_CONFIG_PAGETYPE_EXTENDED, PageNumber, PageAddress);
1677 error = EINVAL;
1678 break;
1679 default:
1680 mpt_prt(mpt, "mpt_read_extcfg_header: Config Info Status %x\n",
1681 req->IOCStatus);
1682 error = EIO;
1683 break;
1684 }
1685 mpt_free_request(mpt, req);
1686 return (error);
1687 }
1688
1689 int
mpt_read_extcfg_page(struct mpt_softc * mpt,int Action,uint32_t PageAddress,CONFIG_EXTENDED_PAGE_HEADER * hdr,void * buf,size_t len,int sleep_ok,int timeout_ms)1690 mpt_read_extcfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress,
1691 CONFIG_EXTENDED_PAGE_HEADER *hdr, void *buf, size_t len,
1692 int sleep_ok, int timeout_ms)
1693 {
1694 request_t *req;
1695 cfgparms_t params;
1696 int error;
1697
1698 req = mpt_get_request(mpt, sleep_ok);
1699 if (req == NULL) {
1700 mpt_prt(mpt, "mpt_read_extcfg_page: Get request failed!\n");
1701 return (-1);
1702 }
1703
1704 params.Action = Action;
1705 params.PageVersion = hdr->PageVersion;
1706 params.PageLength = 0;
1707 params.PageNumber = hdr->PageNumber;
1708 params.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
1709 params.PageAddress = PageAddress;
1710 params.ExtPageType = hdr->ExtPageType;
1711 params.ExtPageLength = hdr->ExtPageLength;
1712 error = mpt_issue_cfg_req(mpt, req, ¶ms,
1713 req->req_pbuf + MPT_RQSL(mpt),
1714 len, sleep_ok, timeout_ms);
1715 if (error != 0) {
1716 mpt_prt(mpt, "read_extcfg_page(%d) timed out\n", Action);
1717 return (-1);
1718 }
1719
1720 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
1721 mpt_prt(mpt, "mpt_read_extcfg_page: Config Info Status %x\n",
1722 req->IOCStatus);
1723 mpt_free_request(mpt, req);
1724 return (-1);
1725 }
1726 memcpy(buf, ((uint8_t *)req->req_vbuf)+MPT_RQSL(mpt), len);
1727 mpt_free_request(mpt, req);
1728 return (0);
1729 }
1730
1731 int
mpt_read_cfg_header(struct mpt_softc * mpt,int PageType,int PageNumber,uint32_t PageAddress,CONFIG_PAGE_HEADER * rslt,int sleep_ok,int timeout_ms)1732 mpt_read_cfg_header(struct mpt_softc *mpt, int PageType, int PageNumber,
1733 uint32_t PageAddress, CONFIG_PAGE_HEADER *rslt,
1734 int sleep_ok, int timeout_ms)
1735 {
1736 request_t *req;
1737 cfgparms_t params;
1738 MSG_CONFIG *cfgp;
1739 int error;
1740
1741 req = mpt_get_request(mpt, sleep_ok);
1742 if (req == NULL) {
1743 mpt_prt(mpt, "mpt_read_cfg_header: Get request failed!\n");
1744 return (ENOMEM);
1745 }
1746
1747 params.Action = MPI_CONFIG_ACTION_PAGE_HEADER;
1748 params.PageVersion = 0;
1749 params.PageLength = 0;
1750 params.PageNumber = PageNumber;
1751 params.PageType = PageType;
1752 params.PageAddress = PageAddress;
1753 error = mpt_issue_cfg_req(mpt, req, ¶ms, /*addr*/0, /*len*/0,
1754 sleep_ok, timeout_ms);
1755 if (error != 0) {
1756 /*
1757 * Leave the request. Without resetting the chip, it's
1758 * still owned by it and we'll just get into trouble
1759 * freeing it now. Mark it as abandoned so that if it
1760 * shows up later it can be freed.
1761 */
1762 mpt_prt(mpt, "read_cfg_header timed out\n");
1763 return (ETIMEDOUT);
1764 }
1765
1766 switch (req->IOCStatus & MPI_IOCSTATUS_MASK) {
1767 case MPI_IOCSTATUS_SUCCESS:
1768 cfgp = req->req_vbuf;
1769 bcopy(&cfgp->Header, rslt, sizeof(*rslt));
1770 error = 0;
1771 break;
1772 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE:
1773 mpt_lprt(mpt, MPT_PRT_DEBUG,
1774 "Invalid Page Type %d Number %d Addr 0x%0x\n",
1775 PageType, PageNumber, PageAddress);
1776 error = EINVAL;
1777 break;
1778 default:
1779 mpt_prt(mpt, "mpt_read_cfg_header: Config Info Status %x\n",
1780 req->IOCStatus);
1781 error = EIO;
1782 break;
1783 }
1784 mpt_free_request(mpt, req);
1785 return (error);
1786 }
1787
1788 int
mpt_read_cfg_page(struct mpt_softc * mpt,int Action,uint32_t PageAddress,CONFIG_PAGE_HEADER * hdr,size_t len,int sleep_ok,int timeout_ms)1789 mpt_read_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress,
1790 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok,
1791 int timeout_ms)
1792 {
1793 request_t *req;
1794 cfgparms_t params;
1795 int error;
1796
1797 req = mpt_get_request(mpt, sleep_ok);
1798 if (req == NULL) {
1799 mpt_prt(mpt, "mpt_read_cfg_page: Get request failed!\n");
1800 return (-1);
1801 }
1802
1803 params.Action = Action;
1804 params.PageVersion = hdr->PageVersion;
1805 params.PageLength = hdr->PageLength;
1806 params.PageNumber = hdr->PageNumber;
1807 params.PageType = hdr->PageType & MPI_CONFIG_PAGETYPE_MASK;
1808 params.PageAddress = PageAddress;
1809 error = mpt_issue_cfg_req(mpt, req, ¶ms,
1810 req->req_pbuf + MPT_RQSL(mpt),
1811 len, sleep_ok, timeout_ms);
1812 if (error != 0) {
1813 mpt_prt(mpt, "read_cfg_page(%d) timed out\n", Action);
1814 return (-1);
1815 }
1816
1817 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
1818 mpt_prt(mpt, "mpt_read_cfg_page: Config Info Status %x\n",
1819 req->IOCStatus);
1820 mpt_free_request(mpt, req);
1821 return (-1);
1822 }
1823 memcpy(hdr, ((uint8_t *)req->req_vbuf)+MPT_RQSL(mpt), len);
1824 mpt_free_request(mpt, req);
1825 return (0);
1826 }
1827
1828 int
mpt_write_cfg_page(struct mpt_softc * mpt,int Action,uint32_t PageAddress,CONFIG_PAGE_HEADER * hdr,size_t len,int sleep_ok,int timeout_ms)1829 mpt_write_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress,
1830 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok,
1831 int timeout_ms)
1832 {
1833 request_t *req;
1834 cfgparms_t params;
1835 u_int hdr_attr;
1836 int error;
1837
1838 hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK;
1839 if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE &&
1840 hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) {
1841 mpt_prt(mpt, "page type 0x%x not changeable\n",
1842 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
1843 return (-1);
1844 }
1845
1846 #if 0
1847 /*
1848 * We shouldn't mask off other bits here.
1849 */
1850 hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK;
1851 #endif
1852
1853 req = mpt_get_request(mpt, sleep_ok);
1854 if (req == NULL)
1855 return (-1);
1856
1857 memcpy(((caddr_t)req->req_vbuf) + MPT_RQSL(mpt), hdr, len);
1858
1859 /*
1860 * There isn't any point in restoring stripped out attributes
1861 * if you then mask them going down to issue the request.
1862 */
1863
1864 params.Action = Action;
1865 params.PageVersion = hdr->PageVersion;
1866 params.PageLength = hdr->PageLength;
1867 params.PageNumber = hdr->PageNumber;
1868 params.PageAddress = PageAddress;
1869 #if 0
1870 /* Restore stripped out attributes */
1871 hdr->PageType |= hdr_attr;
1872 params.PageType = hdr->PageType & MPI_CONFIG_PAGETYPE_MASK;
1873 #else
1874 params.PageType = hdr->PageType;
1875 #endif
1876 error = mpt_issue_cfg_req(mpt, req, ¶ms,
1877 req->req_pbuf + MPT_RQSL(mpt),
1878 len, sleep_ok, timeout_ms);
1879 if (error != 0) {
1880 mpt_prt(mpt, "mpt_write_cfg_page timed out\n");
1881 return (-1);
1882 }
1883
1884 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
1885 mpt_prt(mpt, "mpt_write_cfg_page: Config Info Status %x\n",
1886 req->IOCStatus);
1887 mpt_free_request(mpt, req);
1888 return (-1);
1889 }
1890 mpt_free_request(mpt, req);
1891 return (0);
1892 }
1893
1894 /*
1895 * Read IOC configuration information
1896 */
1897 static int
mpt_read_config_info_ioc(struct mpt_softc * mpt)1898 mpt_read_config_info_ioc(struct mpt_softc *mpt)
1899 {
1900 CONFIG_PAGE_HEADER hdr;
1901 struct mpt_raid_volume *mpt_raid;
1902 int rv;
1903 int i;
1904 size_t len;
1905
1906 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC,
1907 2, 0, &hdr, FALSE, 5000);
1908 /*
1909 * If it's an invalid page, so what? Not a supported function....
1910 */
1911 if (rv == EINVAL) {
1912 return (0);
1913 }
1914 if (rv) {
1915 return (rv);
1916 }
1917
1918 mpt_lprt(mpt, MPT_PRT_DEBUG,
1919 "IOC Page 2 Header: Version %x len %x PageNumber %x PageType %x\n",
1920 hdr.PageVersion, hdr.PageLength << 2,
1921 hdr.PageNumber, hdr.PageType);
1922
1923 len = hdr.PageLength * sizeof(uint32_t);
1924 mpt->ioc_page2 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO);
1925 if (mpt->ioc_page2 == NULL) {
1926 mpt_prt(mpt, "unable to allocate memory for IOC page 2\n");
1927 mpt_raid_free_mem(mpt);
1928 return (ENOMEM);
1929 }
1930 memcpy(&mpt->ioc_page2->Header, &hdr, sizeof(hdr));
1931 rv = mpt_read_cur_cfg_page(mpt, 0,
1932 &mpt->ioc_page2->Header, len, FALSE, 5000);
1933 if (rv) {
1934 mpt_prt(mpt, "failed to read IOC Page 2\n");
1935 mpt_raid_free_mem(mpt);
1936 return (EIO);
1937 }
1938 mpt2host_config_page_ioc2(mpt->ioc_page2);
1939
1940 if (mpt->ioc_page2->CapabilitiesFlags != 0) {
1941 uint32_t mask;
1942
1943 mpt_prt(mpt, "Capabilities: (");
1944 for (mask = 1; mask != 0; mask <<= 1) {
1945 if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0) {
1946 continue;
1947 }
1948 switch (mask) {
1949 case MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT:
1950 mpt_prtc(mpt, " RAID-0");
1951 break;
1952 case MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT:
1953 mpt_prtc(mpt, " RAID-1E");
1954 break;
1955 case MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT:
1956 mpt_prtc(mpt, " RAID-1");
1957 break;
1958 case MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT:
1959 mpt_prtc(mpt, " SES");
1960 break;
1961 case MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT:
1962 mpt_prtc(mpt, " SAFTE");
1963 break;
1964 case MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT:
1965 mpt_prtc(mpt, " Multi-Channel-Arrays");
1966 default:
1967 break;
1968 }
1969 }
1970 mpt_prtc(mpt, " )\n");
1971 if ((mpt->ioc_page2->CapabilitiesFlags
1972 & (MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT
1973 | MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT
1974 | MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT)) != 0) {
1975 mpt_prt(mpt, "%d Active Volume%s(%d Max)\n",
1976 mpt->ioc_page2->NumActiveVolumes,
1977 mpt->ioc_page2->NumActiveVolumes != 1
1978 ? "s " : " ",
1979 mpt->ioc_page2->MaxVolumes);
1980 mpt_prt(mpt, "%d Hidden Drive Member%s(%d Max)\n",
1981 mpt->ioc_page2->NumActivePhysDisks,
1982 mpt->ioc_page2->NumActivePhysDisks != 1
1983 ? "s " : " ",
1984 mpt->ioc_page2->MaxPhysDisks);
1985 }
1986 }
1987
1988 len = mpt->ioc_page2->MaxVolumes * sizeof(struct mpt_raid_volume);
1989 mpt->raid_volumes = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO);
1990 if (mpt->raid_volumes == NULL) {
1991 mpt_prt(mpt, "Could not allocate RAID volume data\n");
1992 mpt_raid_free_mem(mpt);
1993 return (ENOMEM);
1994 }
1995
1996 /*
1997 * Copy critical data out of ioc_page2 so that we can
1998 * safely refresh the page without windows of unreliable
1999 * data.
2000 */
2001 mpt->raid_max_volumes = mpt->ioc_page2->MaxVolumes;
2002
2003 len = sizeof(*mpt->raid_volumes->config_page) +
2004 (sizeof (RAID_VOL0_PHYS_DISK) * (mpt->ioc_page2->MaxPhysDisks - 1));
2005 for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) {
2006 mpt_raid = &mpt->raid_volumes[i];
2007 mpt_raid->config_page =
2008 malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO);
2009 if (mpt_raid->config_page == NULL) {
2010 mpt_prt(mpt, "Could not allocate RAID page data\n");
2011 mpt_raid_free_mem(mpt);
2012 return (ENOMEM);
2013 }
2014 }
2015 mpt->raid_page0_len = len;
2016
2017 len = mpt->ioc_page2->MaxPhysDisks * sizeof(struct mpt_raid_disk);
2018 mpt->raid_disks = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO);
2019 if (mpt->raid_disks == NULL) {
2020 mpt_prt(mpt, "Could not allocate RAID disk data\n");
2021 mpt_raid_free_mem(mpt);
2022 return (ENOMEM);
2023 }
2024 mpt->raid_max_disks = mpt->ioc_page2->MaxPhysDisks;
2025
2026 /*
2027 * Load page 3.
2028 */
2029 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC,
2030 3, 0, &hdr, FALSE, 5000);
2031 if (rv) {
2032 mpt_raid_free_mem(mpt);
2033 return (EIO);
2034 }
2035
2036 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 3 Header: %x %x %x %x\n",
2037 hdr.PageVersion, hdr.PageLength, hdr.PageNumber, hdr.PageType);
2038
2039 len = hdr.PageLength * sizeof(uint32_t);
2040 mpt->ioc_page3 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO);
2041 if (mpt->ioc_page3 == NULL) {
2042 mpt_prt(mpt, "unable to allocate memory for IOC page 3\n");
2043 mpt_raid_free_mem(mpt);
2044 return (ENOMEM);
2045 }
2046 memcpy(&mpt->ioc_page3->Header, &hdr, sizeof(hdr));
2047 rv = mpt_read_cur_cfg_page(mpt, 0,
2048 &mpt->ioc_page3->Header, len, FALSE, 5000);
2049 if (rv) {
2050 mpt_raid_free_mem(mpt);
2051 return (EIO);
2052 }
2053 mpt2host_config_page_ioc3(mpt->ioc_page3);
2054 mpt_raid_wakeup(mpt);
2055 return (0);
2056 }
2057
2058 /*
2059 * Enable IOC port
2060 */
2061 static int
mpt_send_port_enable(struct mpt_softc * mpt,int port)2062 mpt_send_port_enable(struct mpt_softc *mpt, int port)
2063 {
2064 request_t *req;
2065 MSG_PORT_ENABLE *enable_req;
2066 int error;
2067
2068 req = mpt_get_request(mpt, /*sleep_ok*/FALSE);
2069 if (req == NULL)
2070 return (-1);
2071
2072 enable_req = req->req_vbuf;
2073 memset(enable_req, 0, MPT_RQSL(mpt));
2074
2075 enable_req->Function = MPI_FUNCTION_PORT_ENABLE;
2076 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG);
2077 enable_req->PortNumber = port;
2078
2079 mpt_check_doorbell(mpt);
2080 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling port %d\n", port);
2081
2082 mpt_send_cmd(mpt, req);
2083 error = mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE,
2084 FALSE, (mpt->is_sas || mpt->is_fc)? 300000 : 30000);
2085 if (error != 0) {
2086 mpt_prt(mpt, "port %d enable timed out\n", port);
2087 return (-1);
2088 }
2089 mpt_free_request(mpt, req);
2090 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabled port %d\n", port);
2091 return (0);
2092 }
2093
2094 /*
2095 * Enable/Disable asynchronous event reporting.
2096 */
2097 static int
mpt_send_event_request(struct mpt_softc * mpt,int onoff)2098 mpt_send_event_request(struct mpt_softc *mpt, int onoff)
2099 {
2100 request_t *req;
2101 MSG_EVENT_NOTIFY *enable_req;
2102
2103 req = mpt_get_request(mpt, FALSE);
2104 if (req == NULL) {
2105 return (ENOMEM);
2106 }
2107 enable_req = req->req_vbuf;
2108 memset(enable_req, 0, sizeof *enable_req);
2109
2110 enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION;
2111 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_EVENTS);
2112 enable_req->Switch = onoff;
2113
2114 mpt_check_doorbell(mpt);
2115 mpt_lprt(mpt, MPT_PRT_DEBUG, "%sabling async events\n",
2116 onoff ? "en" : "dis");
2117 /*
2118 * Send the command off, but don't wait for it.
2119 */
2120 mpt_send_cmd(mpt, req);
2121 return (0);
2122 }
2123
2124 /*
2125 * Un-mask the interrupts on the chip.
2126 */
2127 void
mpt_enable_ints(struct mpt_softc * mpt)2128 mpt_enable_ints(struct mpt_softc *mpt)
2129 {
2130
2131 /* Unmask every thing except door bell int */
2132 mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK);
2133 }
2134
2135 /*
2136 * Mask the interrupts on the chip.
2137 */
2138 void
mpt_disable_ints(struct mpt_softc * mpt)2139 mpt_disable_ints(struct mpt_softc *mpt)
2140 {
2141
2142 /* Mask all interrupts */
2143 mpt_write(mpt, MPT_OFFSET_INTR_MASK,
2144 MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK);
2145 }
2146
2147 static void
mpt_sysctl_attach(struct mpt_softc * mpt)2148 mpt_sysctl_attach(struct mpt_softc *mpt)
2149 {
2150 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(mpt->dev);
2151 struct sysctl_oid *tree = device_get_sysctl_tree(mpt->dev);
2152
2153 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
2154 "debug", CTLFLAG_RW, &mpt->verbose, 0,
2155 "Debugging/Verbose level");
2156 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
2157 "role", CTLFLAG_RD, &mpt->role, 0,
2158 "HBA role");
2159 #ifdef MPT_TEST_MULTIPATH
2160 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
2161 "failure_id", CTLFLAG_RW, &mpt->failure_id, -1,
2162 "Next Target to Fail");
2163 #endif
2164 }
2165
2166 int
mpt_attach(struct mpt_softc * mpt)2167 mpt_attach(struct mpt_softc *mpt)
2168 {
2169 struct mpt_personality *pers;
2170 int i;
2171 int error;
2172
2173 mpt_core_attach(mpt);
2174 mpt_core_enable(mpt);
2175
2176 TAILQ_INSERT_TAIL(&mpt_tailq, mpt, links);
2177 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) {
2178 pers = mpt_personalities[i];
2179 if (pers == NULL) {
2180 continue;
2181 }
2182 if (pers->probe(mpt) == 0) {
2183 error = pers->attach(mpt);
2184 if (error != 0) {
2185 mpt_detach(mpt);
2186 return (error);
2187 }
2188 mpt->mpt_pers_mask |= (0x1 << pers->id);
2189 pers->use_count++;
2190 }
2191 }
2192
2193 /*
2194 * Now that we've attached everything, do the enable function
2195 * for all of the personalities. This allows the personalities
2196 * to do setups that are appropriate for them prior to enabling
2197 * any ports.
2198 */
2199 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) {
2200 pers = mpt_personalities[i];
2201 if (pers != NULL && MPT_PERS_ATTACHED(pers, mpt) != 0) {
2202 error = pers->enable(mpt);
2203 if (error != 0) {
2204 mpt_prt(mpt, "personality %s attached but would"
2205 " not enable (%d)\n", pers->name, error);
2206 mpt_detach(mpt);
2207 return (error);
2208 }
2209 }
2210 }
2211 return (0);
2212 }
2213
2214 int
mpt_shutdown(struct mpt_softc * mpt)2215 mpt_shutdown(struct mpt_softc *mpt)
2216 {
2217 struct mpt_personality *pers;
2218
2219 MPT_PERS_FOREACH_REVERSE(mpt, pers) {
2220 pers->shutdown(mpt);
2221 }
2222 return (0);
2223 }
2224
2225 int
mpt_detach(struct mpt_softc * mpt)2226 mpt_detach(struct mpt_softc *mpt)
2227 {
2228 struct mpt_personality *pers;
2229
2230 MPT_PERS_FOREACH_REVERSE(mpt, pers) {
2231 pers->detach(mpt);
2232 mpt->mpt_pers_mask &= ~(0x1 << pers->id);
2233 pers->use_count--;
2234 }
2235 TAILQ_REMOVE(&mpt_tailq, mpt, links);
2236 return (0);
2237 }
2238
2239 static int
mpt_core_load(struct mpt_personality * pers)2240 mpt_core_load(struct mpt_personality *pers)
2241 {
2242 int i;
2243
2244 /*
2245 * Setup core handlers and insert the default handler
2246 * into all "empty slots".
2247 */
2248 for (i = 0; i < MPT_NUM_REPLY_HANDLERS; i++) {
2249 mpt_reply_handlers[i] = mpt_default_reply_handler;
2250 }
2251
2252 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_EVENTS)] =
2253 mpt_event_reply_handler;
2254 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_CONFIG)] =
2255 mpt_config_reply_handler;
2256 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_HANDSHAKE)] =
2257 mpt_handshake_reply_handler;
2258 return (0);
2259 }
2260
2261 /*
2262 * Initialize per-instance driver data and perform
2263 * initial controller configuration.
2264 */
2265 static int
mpt_core_attach(struct mpt_softc * mpt)2266 mpt_core_attach(struct mpt_softc *mpt)
2267 {
2268 int val, error;
2269
2270 LIST_INIT(&mpt->ack_frames);
2271 /* Put all request buffers on the free list */
2272 TAILQ_INIT(&mpt->request_pending_list);
2273 TAILQ_INIT(&mpt->request_free_list);
2274 TAILQ_INIT(&mpt->request_timeout_list);
2275 for (val = 0; val < MPT_MAX_LUNS; val++) {
2276 STAILQ_INIT(&mpt->trt[val].atios);
2277 STAILQ_INIT(&mpt->trt[val].inots);
2278 }
2279 STAILQ_INIT(&mpt->trt_wildcard.atios);
2280 STAILQ_INIT(&mpt->trt_wildcard.inots);
2281 #ifdef MPT_TEST_MULTIPATH
2282 mpt->failure_id = -1;
2283 #endif
2284 mpt->scsi_tgt_handler_id = MPT_HANDLER_ID_NONE;
2285 mpt_sysctl_attach(mpt);
2286 mpt_lprt(mpt, MPT_PRT_DEBUG, "doorbell req = %s\n",
2287 mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL)));
2288
2289 MPT_LOCK(mpt);
2290 error = mpt_configure_ioc(mpt, 0, 0);
2291 MPT_UNLOCK(mpt);
2292
2293 return (error);
2294 }
2295
2296 static int
mpt_core_enable(struct mpt_softc * mpt)2297 mpt_core_enable(struct mpt_softc *mpt)
2298 {
2299
2300 /*
2301 * We enter with the IOC enabled, but async events
2302 * not enabled, ports not enabled and interrupts
2303 * not enabled.
2304 */
2305 MPT_LOCK(mpt);
2306
2307 /*
2308 * Enable asynchronous event reporting- all personalities
2309 * have attached so that they should be able to now field
2310 * async events.
2311 */
2312 mpt_send_event_request(mpt, 1);
2313
2314 /*
2315 * Catch any pending interrupts
2316 *
2317 * This seems to be crucial- otherwise
2318 * the portenable below times out.
2319 */
2320 mpt_intr(mpt);
2321
2322 /*
2323 * Enable Interrupts
2324 */
2325 mpt_enable_ints(mpt);
2326
2327 /*
2328 * Catch any pending interrupts
2329 *
2330 * This seems to be crucial- otherwise
2331 * the portenable below times out.
2332 */
2333 mpt_intr(mpt);
2334
2335 /*
2336 * Enable the port.
2337 */
2338 if (mpt_send_port_enable(mpt, 0) != MPT_OK) {
2339 mpt_prt(mpt, "failed to enable port 0\n");
2340 MPT_UNLOCK(mpt);
2341 return (ENXIO);
2342 }
2343 MPT_UNLOCK(mpt);
2344 return (0);
2345 }
2346
2347 static void
mpt_core_shutdown(struct mpt_softc * mpt)2348 mpt_core_shutdown(struct mpt_softc *mpt)
2349 {
2350
2351 mpt_disable_ints(mpt);
2352 }
2353
2354 static void
mpt_core_detach(struct mpt_softc * mpt)2355 mpt_core_detach(struct mpt_softc *mpt)
2356 {
2357 int val;
2358
2359 /*
2360 * XXX: FREE MEMORY
2361 */
2362 mpt_disable_ints(mpt);
2363
2364 /* Make sure no request has pending timeouts. */
2365 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) {
2366 request_t *req = &mpt->request_pool[val];
2367 mpt_callout_drain(mpt, &req->callout);
2368 }
2369
2370 mpt_dma_buf_free(mpt);
2371 }
2372
2373 static int
mpt_core_unload(struct mpt_personality * pers)2374 mpt_core_unload(struct mpt_personality *pers)
2375 {
2376
2377 /* Unload is always successful. */
2378 return (0);
2379 }
2380
2381 #define FW_UPLOAD_REQ_SIZE \
2382 (sizeof(MSG_FW_UPLOAD) - sizeof(SGE_MPI_UNION) \
2383 + sizeof(FW_UPLOAD_TCSGE) + sizeof(SGE_SIMPLE32))
2384
2385 static int
mpt_upload_fw(struct mpt_softc * mpt)2386 mpt_upload_fw(struct mpt_softc *mpt)
2387 {
2388 uint8_t fw_req_buf[FW_UPLOAD_REQ_SIZE];
2389 MSG_FW_UPLOAD_REPLY fw_reply;
2390 MSG_FW_UPLOAD *fw_req;
2391 FW_UPLOAD_TCSGE *tsge;
2392 SGE_SIMPLE32 *sge;
2393 uint32_t flags;
2394 int error;
2395
2396 memset(&fw_req_buf, 0, sizeof(fw_req_buf));
2397 fw_req = (MSG_FW_UPLOAD *)fw_req_buf;
2398 fw_req->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
2399 fw_req->Function = MPI_FUNCTION_FW_UPLOAD;
2400 fw_req->MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE);
2401 tsge = (FW_UPLOAD_TCSGE *)&fw_req->SGL;
2402 tsge->DetailsLength = 12;
2403 tsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
2404 tsge->ImageSize = htole32(mpt->fw_image_size);
2405 sge = (SGE_SIMPLE32 *)(tsge + 1);
2406 flags = (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER
2407 | MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_SIMPLE_ELEMENT
2408 | MPI_SGE_FLAGS_32_BIT_ADDRESSING | MPI_SGE_FLAGS_IOC_TO_HOST);
2409 flags <<= MPI_SGE_FLAGS_SHIFT;
2410 sge->FlagsLength = htole32(flags | mpt->fw_image_size);
2411 sge->Address = htole32(mpt->fw_phys);
2412 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, BUS_DMASYNC_PREREAD);
2413 error = mpt_send_handshake_cmd(mpt, sizeof(fw_req_buf), &fw_req_buf);
2414 if (error)
2415 return(error);
2416 error = mpt_recv_handshake_reply(mpt, sizeof(fw_reply), &fw_reply);
2417 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, BUS_DMASYNC_POSTREAD);
2418 return (error);
2419 }
2420
2421 static void
mpt_diag_outsl(struct mpt_softc * mpt,uint32_t addr,uint32_t * data,bus_size_t len)2422 mpt_diag_outsl(struct mpt_softc *mpt, uint32_t addr,
2423 uint32_t *data, bus_size_t len)
2424 {
2425 uint32_t *data_end;
2426
2427 data_end = data + (roundup2(len, sizeof(uint32_t)) / 4);
2428 if (mpt->is_sas) {
2429 pci_enable_io(mpt->dev, SYS_RES_IOPORT);
2430 }
2431 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, addr);
2432 while (data != data_end) {
2433 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, *data);
2434 data++;
2435 }
2436 if (mpt->is_sas) {
2437 pci_disable_io(mpt->dev, SYS_RES_IOPORT);
2438 }
2439 }
2440
2441 static int
mpt_download_fw(struct mpt_softc * mpt)2442 mpt_download_fw(struct mpt_softc *mpt)
2443 {
2444 MpiFwHeader_t *fw_hdr;
2445 int error;
2446 uint32_t ext_offset;
2447 uint32_t data;
2448
2449 if (mpt->pci_pio_reg == NULL) {
2450 mpt_prt(mpt, "No PIO resource!\n");
2451 return (ENXIO);
2452 }
2453
2454 mpt_prt(mpt, "Downloading Firmware - Image Size %d\n",
2455 mpt->fw_image_size);
2456
2457 error = mpt_enable_diag_mode(mpt);
2458 if (error != 0) {
2459 mpt_prt(mpt, "Could not enter diagnostic mode!\n");
2460 return (EIO);
2461 }
2462
2463 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC,
2464 MPI_DIAG_RW_ENABLE|MPI_DIAG_DISABLE_ARM);
2465
2466 fw_hdr = (MpiFwHeader_t *)mpt->fw_image;
2467 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, BUS_DMASYNC_PREWRITE);
2468 mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr,
2469 fw_hdr->ImageSize);
2470 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap, BUS_DMASYNC_POSTWRITE);
2471
2472 ext_offset = fw_hdr->NextImageHeaderOffset;
2473 while (ext_offset != 0) {
2474 MpiExtImageHeader_t *ext;
2475
2476 ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset);
2477 ext_offset = ext->NextImageHeaderOffset;
2478 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap,
2479 BUS_DMASYNC_PREWRITE);
2480 mpt_diag_outsl(mpt, ext->LoadStartAddress, (uint32_t*)ext,
2481 ext->ImageSize);
2482 bus_dmamap_sync(mpt->fw_dmat, mpt->fw_dmap,
2483 BUS_DMASYNC_POSTWRITE);
2484 }
2485
2486 if (mpt->is_sas) {
2487 pci_enable_io(mpt->dev, SYS_RES_IOPORT);
2488 }
2489 /* Setup the address to jump to on reset. */
2490 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr);
2491 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue);
2492
2493 /*
2494 * The controller sets the "flash bad" status after attempting
2495 * to auto-boot from flash. Clear the status so that the controller
2496 * will continue the boot process with our newly installed firmware.
2497 */
2498 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE);
2499 data = mpt_pio_read(mpt, MPT_OFFSET_DIAG_DATA) | MPT_DIAG_MEM_CFG_BADFL;
2500 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE);
2501 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, data);
2502
2503 if (mpt->is_sas) {
2504 pci_disable_io(mpt->dev, SYS_RES_IOPORT);
2505 }
2506
2507 /*
2508 * Re-enable the processor and clear the boot halt flag.
2509 */
2510 data = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC);
2511 data &= ~(MPI_DIAG_PREVENT_IOC_BOOT|MPI_DIAG_DISABLE_ARM);
2512 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, data);
2513
2514 mpt_disable_diag_mode(mpt);
2515 return (0);
2516 }
2517
2518 static int
mpt_dma_buf_alloc(struct mpt_softc * mpt)2519 mpt_dma_buf_alloc(struct mpt_softc *mpt)
2520 {
2521 struct mpt_map_info mi;
2522 uint8_t *vptr;
2523 uint32_t pptr, end;
2524 int i, error;
2525
2526 /* Create a child tag for data buffers */
2527 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1,
2528 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
2529 NULL, NULL, (mpt->max_cam_seg_cnt - 1) * PAGE_SIZE,
2530 mpt->max_cam_seg_cnt, BUS_SPACE_MAXSIZE_32BIT, 0,
2531 &mpt->buffer_dmat) != 0) {
2532 mpt_prt(mpt, "cannot create a dma tag for data buffers\n");
2533 return (1);
2534 }
2535
2536 /* Create a child tag for request buffers */
2537 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
2538 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2539 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
2540 &mpt->request_dmat) != 0) {
2541 mpt_prt(mpt, "cannot create a dma tag for requests\n");
2542 return (1);
2543 }
2544
2545 /* Allocate some DMA accessible memory for requests */
2546 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
2547 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &mpt->request_dmap) != 0) {
2548 mpt_prt(mpt, "cannot allocate %d bytes of request memory\n",
2549 MPT_REQ_MEM_SIZE(mpt));
2550 return (1);
2551 }
2552
2553 mi.mpt = mpt;
2554 mi.error = 0;
2555
2556 /* Load and lock it into "bus space" */
2557 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
2558 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0);
2559
2560 if (mi.error) {
2561 mpt_prt(mpt, "error %d loading dma map for DMA request queue\n",
2562 mi.error);
2563 return (1);
2564 }
2565 mpt->request_phys = mi.phys;
2566
2567 /*
2568 * Now create per-request dma maps
2569 */
2570 i = 0;
2571 pptr = mpt->request_phys;
2572 vptr = mpt->request;
2573 end = pptr + MPT_REQ_MEM_SIZE(mpt);
2574 while(pptr < end) {
2575 request_t *req = &mpt->request_pool[i];
2576 req->index = i++;
2577
2578 /* Store location of Request Data */
2579 req->req_pbuf = pptr;
2580 req->req_vbuf = vptr;
2581
2582 pptr += MPT_REQUEST_AREA;
2583 vptr += MPT_REQUEST_AREA;
2584
2585 req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
2586 req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
2587
2588 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
2589 if (error) {
2590 mpt_prt(mpt, "error %d creating per-cmd DMA maps\n",
2591 error);
2592 return (1);
2593 }
2594 }
2595
2596 return (0);
2597 }
2598
2599 static void
mpt_dma_buf_free(struct mpt_softc * mpt)2600 mpt_dma_buf_free(struct mpt_softc *mpt)
2601 {
2602 int i;
2603
2604 if (mpt->request_dmat == 0) {
2605 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
2606 return;
2607 }
2608 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
2609 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
2610 }
2611 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
2612 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
2613 bus_dma_tag_destroy(mpt->request_dmat);
2614 mpt->request_dmat = 0;
2615 bus_dma_tag_destroy(mpt->buffer_dmat);
2616 }
2617
2618 /*
2619 * Allocate/Initialize data structures for the controller. Called
2620 * once at instance startup.
2621 */
2622 static int
mpt_configure_ioc(struct mpt_softc * mpt,int tn,int needreset)2623 mpt_configure_ioc(struct mpt_softc *mpt, int tn, int needreset)
2624 {
2625 PTR_MSG_PORT_FACTS_REPLY pfp;
2626 int error, port, val;
2627 size_t len;
2628
2629 if (tn == MPT_MAX_TRYS) {
2630 return (-1);
2631 }
2632
2633 /*
2634 * No need to reset if the IOC is already in the READY state.
2635 *
2636 * Force reset if initialization failed previously.
2637 * Note that a hard_reset of the second channel of a '929
2638 * will stop operation of the first channel. Hopefully, if the
2639 * first channel is ok, the second will not require a hard
2640 * reset.
2641 */
2642 if (needreset || MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_READY) {
2643 if (mpt_reset(mpt, FALSE) != MPT_OK) {
2644 return (mpt_configure_ioc(mpt, tn++, 1));
2645 }
2646 needreset = 0;
2647 }
2648
2649 if (mpt_get_iocfacts(mpt, &mpt->ioc_facts) != MPT_OK) {
2650 mpt_prt(mpt, "mpt_get_iocfacts failed\n");
2651 return (mpt_configure_ioc(mpt, tn++, 1));
2652 }
2653 mpt2host_iocfacts_reply(&mpt->ioc_facts);
2654
2655 mpt_prt(mpt, "MPI Version=%d.%d.%d.%d\n",
2656 mpt->ioc_facts.MsgVersion >> 8,
2657 mpt->ioc_facts.MsgVersion & 0xFF,
2658 mpt->ioc_facts.HeaderVersion >> 8,
2659 mpt->ioc_facts.HeaderVersion & 0xFF);
2660
2661 /*
2662 * Now that we know request frame size, we can calculate
2663 * the actual (reasonable) segment limit for read/write I/O.
2664 *
2665 * This limit is constrained by:
2666 *
2667 * + The size of each area we allocate per command (and how
2668 * many chain segments we can fit into it).
2669 * + The total number of areas we've set up.
2670 * + The actual chain depth the card will allow.
2671 *
2672 * The first area's segment count is limited by the I/O request
2673 * at the head of it. We cannot allocate realistically more
2674 * than MPT_MAX_REQUESTS areas. Therefore, to account for both
2675 * conditions, we'll just start out with MPT_MAX_REQUESTS-2.
2676 *
2677 */
2678 /* total number of request areas we (can) allocate */
2679 mpt->max_seg_cnt = MPT_MAX_REQUESTS(mpt) - 2;
2680
2681 /* converted to the number of chain areas possible */
2682 mpt->max_seg_cnt *= MPT_NRFM(mpt);
2683
2684 /* limited by the number of chain areas the card will support */
2685 if (mpt->max_seg_cnt > mpt->ioc_facts.MaxChainDepth) {
2686 mpt_lprt(mpt, MPT_PRT_INFO,
2687 "chain depth limited to %u (from %u)\n",
2688 mpt->ioc_facts.MaxChainDepth, mpt->max_seg_cnt);
2689 mpt->max_seg_cnt = mpt->ioc_facts.MaxChainDepth;
2690 }
2691
2692 /* converted to the number of simple sges in chain segments. */
2693 mpt->max_seg_cnt *= (MPT_NSGL(mpt) - 1);
2694
2695 /*
2696 * Use this as the basis for reporting the maximum I/O size to CAM.
2697 */
2698 mpt->max_cam_seg_cnt = min(mpt->max_seg_cnt, (MAXPHYS / PAGE_SIZE) + 1);
2699
2700 /* XXX Lame Locking! */
2701 MPT_UNLOCK(mpt);
2702 error = mpt_dma_buf_alloc(mpt);
2703 MPT_LOCK(mpt);
2704
2705 if (error != 0) {
2706 mpt_prt(mpt, "mpt_dma_buf_alloc() failed!\n");
2707 return (EIO);
2708 }
2709
2710 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) {
2711 request_t *req = &mpt->request_pool[val];
2712 req->state = REQ_STATE_ALLOCATED;
2713 mpt_callout_init(mpt, &req->callout);
2714 mpt_free_request(mpt, req);
2715 }
2716
2717 mpt_lprt(mpt, MPT_PRT_INFO, "Maximum Segment Count: %u, Maximum "
2718 "CAM Segment Count: %u\n", mpt->max_seg_cnt,
2719 mpt->max_cam_seg_cnt);
2720
2721 mpt_lprt(mpt, MPT_PRT_INFO, "MsgLength=%u IOCNumber = %d\n",
2722 mpt->ioc_facts.MsgLength, mpt->ioc_facts.IOCNumber);
2723 mpt_lprt(mpt, MPT_PRT_INFO,
2724 "IOCFACTS: GlobalCredits=%d BlockSize=%u bytes "
2725 "Request Frame Size %u bytes Max Chain Depth %u\n",
2726 mpt->ioc_facts.GlobalCredits, mpt->ioc_facts.BlockSize,
2727 mpt->ioc_facts.RequestFrameSize << 2,
2728 mpt->ioc_facts.MaxChainDepth);
2729 mpt_lprt(mpt, MPT_PRT_INFO, "IOCFACTS: Num Ports %d, FWImageSize %d, "
2730 "Flags=%#x\n", mpt->ioc_facts.NumberOfPorts,
2731 mpt->ioc_facts.FWImageSize, mpt->ioc_facts.Flags);
2732
2733 len = mpt->ioc_facts.NumberOfPorts * sizeof (MSG_PORT_FACTS_REPLY);
2734 mpt->port_facts = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO);
2735 if (mpt->port_facts == NULL) {
2736 mpt_prt(mpt, "unable to allocate memory for port facts\n");
2737 return (ENOMEM);
2738 }
2739
2740
2741 if ((mpt->ioc_facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) &&
2742 (mpt->fw_uploaded == 0)) {
2743 struct mpt_map_info mi;
2744
2745 /*
2746 * In some configurations, the IOC's firmware is
2747 * stored in a shared piece of system NVRAM that
2748 * is only accessible via the BIOS. In this
2749 * case, the firmware keeps a copy of firmware in
2750 * RAM until the OS driver retrieves it. Once
2751 * retrieved, we are responsible for re-downloading
2752 * the firmware after any hard-reset.
2753 */
2754 MPT_UNLOCK(mpt);
2755 mpt->fw_image_size = mpt->ioc_facts.FWImageSize;
2756 error = mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 0,
2757 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
2758 mpt->fw_image_size, 1, mpt->fw_image_size, 0,
2759 &mpt->fw_dmat);
2760 if (error != 0) {
2761 mpt_prt(mpt, "cannot create firmware dma tag\n");
2762 MPT_LOCK(mpt);
2763 return (ENOMEM);
2764 }
2765 error = bus_dmamem_alloc(mpt->fw_dmat,
2766 (void **)&mpt->fw_image, BUS_DMA_NOWAIT |
2767 BUS_DMA_COHERENT, &mpt->fw_dmap);
2768 if (error != 0) {
2769 mpt_prt(mpt, "cannot allocate firmware memory\n");
2770 bus_dma_tag_destroy(mpt->fw_dmat);
2771 MPT_LOCK(mpt);
2772 return (ENOMEM);
2773 }
2774 mi.mpt = mpt;
2775 mi.error = 0;
2776 bus_dmamap_load(mpt->fw_dmat, mpt->fw_dmap,
2777 mpt->fw_image, mpt->fw_image_size, mpt_map_rquest, &mi, 0);
2778 mpt->fw_phys = mi.phys;
2779
2780 MPT_LOCK(mpt);
2781 error = mpt_upload_fw(mpt);
2782 if (error != 0) {
2783 mpt_prt(mpt, "firmware upload failed.\n");
2784 bus_dmamap_unload(mpt->fw_dmat, mpt->fw_dmap);
2785 bus_dmamem_free(mpt->fw_dmat, mpt->fw_image,
2786 mpt->fw_dmap);
2787 bus_dma_tag_destroy(mpt->fw_dmat);
2788 mpt->fw_image = NULL;
2789 return (EIO);
2790 }
2791 mpt->fw_uploaded = 1;
2792 }
2793
2794 for (port = 0; port < mpt->ioc_facts.NumberOfPorts; port++) {
2795 pfp = &mpt->port_facts[port];
2796 error = mpt_get_portfacts(mpt, 0, pfp);
2797 if (error != MPT_OK) {
2798 mpt_prt(mpt,
2799 "mpt_get_portfacts on port %d failed\n", port);
2800 free(mpt->port_facts, M_DEVBUF);
2801 mpt->port_facts = NULL;
2802 return (mpt_configure_ioc(mpt, tn++, 1));
2803 }
2804 mpt2host_portfacts_reply(pfp);
2805
2806 if (port > 0) {
2807 error = MPT_PRT_INFO;
2808 } else {
2809 error = MPT_PRT_DEBUG;
2810 }
2811 mpt_lprt(mpt, error,
2812 "PORTFACTS[%d]: Type %x PFlags %x IID %d MaxDev %d\n",
2813 port, pfp->PortType, pfp->ProtocolFlags, pfp->PortSCSIID,
2814 pfp->MaxDevices);
2815
2816 }
2817
2818 /*
2819 * XXX: Not yet supporting more than port 0
2820 */
2821 pfp = &mpt->port_facts[0];
2822 if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_FC) {
2823 mpt->is_fc = 1;
2824 mpt->is_sas = 0;
2825 mpt->is_spi = 0;
2826 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_SAS) {
2827 mpt->is_fc = 0;
2828 mpt->is_sas = 1;
2829 mpt->is_spi = 0;
2830 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_SCSI) {
2831 mpt->is_fc = 0;
2832 mpt->is_sas = 0;
2833 mpt->is_spi = 1;
2834 if (mpt->mpt_ini_id == MPT_INI_ID_NONE)
2835 mpt->mpt_ini_id = pfp->PortSCSIID;
2836 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_ISCSI) {
2837 mpt_prt(mpt, "iSCSI not supported yet\n");
2838 return (ENXIO);
2839 } else if (pfp->PortType == MPI_PORTFACTS_PORTTYPE_INACTIVE) {
2840 mpt_prt(mpt, "Inactive Port\n");
2841 return (ENXIO);
2842 } else {
2843 mpt_prt(mpt, "unknown Port Type %#x\n", pfp->PortType);
2844 return (ENXIO);
2845 }
2846
2847 /*
2848 * Set our role with what this port supports.
2849 *
2850 * Note this might be changed later in different modules
2851 * if this is different from what is wanted.
2852 */
2853 mpt->role = MPT_ROLE_NONE;
2854 if (pfp->ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2855 mpt->role |= MPT_ROLE_INITIATOR;
2856 }
2857 if (pfp->ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2858 mpt->role |= MPT_ROLE_TARGET;
2859 }
2860
2861 /*
2862 * Enable the IOC
2863 */
2864 if (mpt_enable_ioc(mpt, 1) != MPT_OK) {
2865 mpt_prt(mpt, "unable to initialize IOC\n");
2866 return (ENXIO);
2867 }
2868
2869 /*
2870 * Read IOC configuration information.
2871 *
2872 * We need this to determine whether or not we have certain
2873 * settings for Integrated Mirroring (e.g.).
2874 */
2875 mpt_read_config_info_ioc(mpt);
2876
2877 return (0);
2878 }
2879
2880 static int
mpt_enable_ioc(struct mpt_softc * mpt,int portenable)2881 mpt_enable_ioc(struct mpt_softc *mpt, int portenable)
2882 {
2883 uint32_t pptr;
2884 int val;
2885
2886 if (mpt_send_ioc_init(mpt, MPI_WHOINIT_HOST_DRIVER) != MPT_OK) {
2887 mpt_prt(mpt, "mpt_send_ioc_init failed\n");
2888 return (EIO);
2889 }
2890
2891 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_send_ioc_init ok\n");
2892
2893 if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) {
2894 mpt_prt(mpt, "IOC failed to go to run state\n");
2895 return (ENXIO);
2896 }
2897 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC now at RUNSTATE\n");
2898
2899 /*
2900 * Give it reply buffers
2901 *
2902 * Do *not* exceed global credits.
2903 */
2904 for (val = 0, pptr = mpt->reply_phys;
2905 (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE);
2906 pptr += MPT_REPLY_SIZE) {
2907 mpt_free_reply(mpt, pptr);
2908 if (++val == mpt->ioc_facts.GlobalCredits - 1)
2909 break;
2910 }
2911
2912
2913 /*
2914 * Enable the port if asked. This is only done if we're resetting
2915 * the IOC after initial startup.
2916 */
2917 if (portenable) {
2918 /*
2919 * Enable asynchronous event reporting
2920 */
2921 mpt_send_event_request(mpt, 1);
2922
2923 if (mpt_send_port_enable(mpt, 0) != MPT_OK) {
2924 mpt_prt(mpt, "%s: failed to enable port 0\n", __func__);
2925 return (ENXIO);
2926 }
2927 }
2928 return (MPT_OK);
2929 }
2930
2931 /*
2932 * Endian Conversion Functions- only used on Big Endian machines
2933 */
2934 #if _BYTE_ORDER == _BIG_ENDIAN
2935 void
mpt2host_sge_simple_union(SGE_SIMPLE_UNION * sge)2936 mpt2host_sge_simple_union(SGE_SIMPLE_UNION *sge)
2937 {
2938
2939 MPT_2_HOST32(sge, FlagsLength);
2940 MPT_2_HOST32(sge, u.Address64.Low);
2941 MPT_2_HOST32(sge, u.Address64.High);
2942 }
2943
2944 void
mpt2host_iocfacts_reply(MSG_IOC_FACTS_REPLY * rp)2945 mpt2host_iocfacts_reply(MSG_IOC_FACTS_REPLY *rp)
2946 {
2947
2948 MPT_2_HOST16(rp, MsgVersion);
2949 MPT_2_HOST16(rp, HeaderVersion);
2950 MPT_2_HOST32(rp, MsgContext);
2951 MPT_2_HOST16(rp, IOCExceptions);
2952 MPT_2_HOST16(rp, IOCStatus);
2953 MPT_2_HOST32(rp, IOCLogInfo);
2954 MPT_2_HOST16(rp, ReplyQueueDepth);
2955 MPT_2_HOST16(rp, RequestFrameSize);
2956 MPT_2_HOST16(rp, Reserved_0101_FWVersion);
2957 MPT_2_HOST16(rp, ProductID);
2958 MPT_2_HOST32(rp, CurrentHostMfaHighAddr);
2959 MPT_2_HOST16(rp, GlobalCredits);
2960 MPT_2_HOST32(rp, CurrentSenseBufferHighAddr);
2961 MPT_2_HOST16(rp, CurReplyFrameSize);
2962 MPT_2_HOST32(rp, FWImageSize);
2963 MPT_2_HOST32(rp, IOCCapabilities);
2964 MPT_2_HOST32(rp, FWVersion.Word);
2965 MPT_2_HOST16(rp, HighPriorityQueueDepth);
2966 MPT_2_HOST16(rp, Reserved2);
2967 mpt2host_sge_simple_union(&rp->HostPageBufferSGE);
2968 MPT_2_HOST32(rp, ReplyFifoHostSignalingAddr);
2969 }
2970
2971 void
mpt2host_portfacts_reply(MSG_PORT_FACTS_REPLY * pfp)2972 mpt2host_portfacts_reply(MSG_PORT_FACTS_REPLY *pfp)
2973 {
2974
2975 MPT_2_HOST16(pfp, Reserved);
2976 MPT_2_HOST16(pfp, Reserved1);
2977 MPT_2_HOST32(pfp, MsgContext);
2978 MPT_2_HOST16(pfp, Reserved2);
2979 MPT_2_HOST16(pfp, IOCStatus);
2980 MPT_2_HOST32(pfp, IOCLogInfo);
2981 MPT_2_HOST16(pfp, MaxDevices);
2982 MPT_2_HOST16(pfp, PortSCSIID);
2983 MPT_2_HOST16(pfp, ProtocolFlags);
2984 MPT_2_HOST16(pfp, MaxPostedCmdBuffers);
2985 MPT_2_HOST16(pfp, MaxPersistentIDs);
2986 MPT_2_HOST16(pfp, MaxLanBuckets);
2987 MPT_2_HOST16(pfp, Reserved4);
2988 MPT_2_HOST32(pfp, Reserved5);
2989 }
2990
2991 void
mpt2host_config_page_ioc2(CONFIG_PAGE_IOC_2 * ioc2)2992 mpt2host_config_page_ioc2(CONFIG_PAGE_IOC_2 *ioc2)
2993 {
2994 int i;
2995
2996 MPT_2_HOST32(ioc2, CapabilitiesFlags);
2997 for (i = 0; i < MPI_IOC_PAGE_2_RAID_VOLUME_MAX; i++) {
2998 MPT_2_HOST16(ioc2, RaidVolume[i].Reserved3);
2999 }
3000 }
3001
3002 void
mpt2host_config_page_ioc3(CONFIG_PAGE_IOC_3 * ioc3)3003 mpt2host_config_page_ioc3(CONFIG_PAGE_IOC_3 *ioc3)
3004 {
3005
3006 MPT_2_HOST16(ioc3, Reserved2);
3007 }
3008
3009 void
mpt2host_config_page_scsi_port_0(CONFIG_PAGE_SCSI_PORT_0 * sp0)3010 mpt2host_config_page_scsi_port_0(CONFIG_PAGE_SCSI_PORT_0 *sp0)
3011 {
3012
3013 MPT_2_HOST32(sp0, Capabilities);
3014 MPT_2_HOST32(sp0, PhysicalInterface);
3015 }
3016
3017 void
mpt2host_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 * sp1)3018 mpt2host_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *sp1)
3019 {
3020
3021 MPT_2_HOST32(sp1, Configuration);
3022 MPT_2_HOST32(sp1, OnBusTimerValue);
3023 MPT_2_HOST16(sp1, IDConfig);
3024 }
3025
3026 void
host2mpt_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 * sp1)3027 host2mpt_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *sp1)
3028 {
3029
3030 HOST_2_MPT32(sp1, Configuration);
3031 HOST_2_MPT32(sp1, OnBusTimerValue);
3032 HOST_2_MPT16(sp1, IDConfig);
3033 }
3034
3035 void
mpt2host_config_page_scsi_port_2(CONFIG_PAGE_SCSI_PORT_2 * sp2)3036 mpt2host_config_page_scsi_port_2(CONFIG_PAGE_SCSI_PORT_2 *sp2)
3037 {
3038 int i;
3039
3040 MPT_2_HOST32(sp2, PortFlags);
3041 MPT_2_HOST32(sp2, PortSettings);
3042 for (i = 0; i < sizeof(sp2->DeviceSettings) /
3043 sizeof(*sp2->DeviceSettings); i++) {
3044 MPT_2_HOST16(sp2, DeviceSettings[i].DeviceFlags);
3045 }
3046 }
3047
3048 void
mpt2host_config_page_scsi_device_0(CONFIG_PAGE_SCSI_DEVICE_0 * sd0)3049 mpt2host_config_page_scsi_device_0(CONFIG_PAGE_SCSI_DEVICE_0 *sd0)
3050 {
3051
3052 MPT_2_HOST32(sd0, NegotiatedParameters);
3053 MPT_2_HOST32(sd0, Information);
3054 }
3055
3056 void
mpt2host_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 * sd1)3057 mpt2host_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *sd1)
3058 {
3059
3060 MPT_2_HOST32(sd1, RequestedParameters);
3061 MPT_2_HOST32(sd1, Reserved);
3062 MPT_2_HOST32(sd1, Configuration);
3063 }
3064
3065 void
host2mpt_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 * sd1)3066 host2mpt_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *sd1)
3067 {
3068
3069 HOST_2_MPT32(sd1, RequestedParameters);
3070 HOST_2_MPT32(sd1, Reserved);
3071 HOST_2_MPT32(sd1, Configuration);
3072 }
3073
3074 void
mpt2host_config_page_fc_port_0(CONFIG_PAGE_FC_PORT_0 * fp0)3075 mpt2host_config_page_fc_port_0(CONFIG_PAGE_FC_PORT_0 *fp0)
3076 {
3077
3078 MPT_2_HOST32(fp0, Flags);
3079 MPT_2_HOST32(fp0, PortIdentifier);
3080 MPT_2_HOST32(fp0, WWNN.Low);
3081 MPT_2_HOST32(fp0, WWNN.High);
3082 MPT_2_HOST32(fp0, WWPN.Low);
3083 MPT_2_HOST32(fp0, WWPN.High);
3084 MPT_2_HOST32(fp0, SupportedServiceClass);
3085 MPT_2_HOST32(fp0, SupportedSpeeds);
3086 MPT_2_HOST32(fp0, CurrentSpeed);
3087 MPT_2_HOST32(fp0, MaxFrameSize);
3088 MPT_2_HOST32(fp0, FabricWWNN.Low);
3089 MPT_2_HOST32(fp0, FabricWWNN.High);
3090 MPT_2_HOST32(fp0, FabricWWPN.Low);
3091 MPT_2_HOST32(fp0, FabricWWPN.High);
3092 MPT_2_HOST32(fp0, DiscoveredPortsCount);
3093 MPT_2_HOST32(fp0, MaxInitiators);
3094 }
3095
3096 void
mpt2host_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 * fp1)3097 mpt2host_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *fp1)
3098 {
3099
3100 MPT_2_HOST32(fp1, Flags);
3101 MPT_2_HOST32(fp1, NoSEEPROMWWNN.Low);
3102 MPT_2_HOST32(fp1, NoSEEPROMWWNN.High);
3103 MPT_2_HOST32(fp1, NoSEEPROMWWPN.Low);
3104 MPT_2_HOST32(fp1, NoSEEPROMWWPN.High);
3105 }
3106
3107 void
host2mpt_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 * fp1)3108 host2mpt_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *fp1)
3109 {
3110
3111 HOST_2_MPT32(fp1, Flags);
3112 HOST_2_MPT32(fp1, NoSEEPROMWWNN.Low);
3113 HOST_2_MPT32(fp1, NoSEEPROMWWNN.High);
3114 HOST_2_MPT32(fp1, NoSEEPROMWWPN.Low);
3115 HOST_2_MPT32(fp1, NoSEEPROMWWPN.High);
3116 }
3117
3118 void
mpt2host_config_page_raid_vol_0(CONFIG_PAGE_RAID_VOL_0 * volp)3119 mpt2host_config_page_raid_vol_0(CONFIG_PAGE_RAID_VOL_0 *volp)
3120 {
3121 int i;
3122
3123 MPT_2_HOST16(volp, VolumeStatus.Reserved);
3124 MPT_2_HOST16(volp, VolumeSettings.Settings);
3125 MPT_2_HOST32(volp, MaxLBA);
3126 MPT_2_HOST32(volp, MaxLBAHigh);
3127 MPT_2_HOST32(volp, StripeSize);
3128 MPT_2_HOST32(volp, Reserved2);
3129 MPT_2_HOST32(volp, Reserved3);
3130 for (i = 0; i < MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX; i++) {
3131 MPT_2_HOST16(volp, PhysDisk[i].Reserved);
3132 }
3133 }
3134
3135 void
mpt2host_config_page_raid_phys_disk_0(CONFIG_PAGE_RAID_PHYS_DISK_0 * rpd0)3136 mpt2host_config_page_raid_phys_disk_0(CONFIG_PAGE_RAID_PHYS_DISK_0 *rpd0)
3137 {
3138
3139 MPT_2_HOST32(rpd0, Reserved1);
3140 MPT_2_HOST16(rpd0, PhysDiskStatus.Reserved);
3141 MPT_2_HOST32(rpd0, MaxLBA);
3142 MPT_2_HOST16(rpd0, ErrorData.Reserved);
3143 MPT_2_HOST16(rpd0, ErrorData.ErrorCount);
3144 MPT_2_HOST16(rpd0, ErrorData.SmartCount);
3145 }
3146
3147 void
mpt2host_mpi_raid_vol_indicator(MPI_RAID_VOL_INDICATOR * vi)3148 mpt2host_mpi_raid_vol_indicator(MPI_RAID_VOL_INDICATOR *vi)
3149 {
3150
3151 MPT_2_HOST16(vi, TotalBlocks.High);
3152 MPT_2_HOST16(vi, TotalBlocks.Low);
3153 MPT_2_HOST16(vi, BlocksRemaining.High);
3154 MPT_2_HOST16(vi, BlocksRemaining.Low);
3155 }
3156 #endif
3157