1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 *
22 * $FreeBSD$
23 */
24/*
25 * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
26 * Use is subject to license terms.
27 */
28
29#define _ASM
30#define _LOCORE
31
32#include <sys/cpuvar_defs.h>
33#include <sys/dtrace.h>
34
35#include <machine/asm.h>
36#include <machine/cpu.h>
37#include <machine/cpuregs.h>
38#include <machine/regnum.h>
39
40        .set    noreorder               # Noreorder is default style!
41
42/*
43 * Primitives
44 */
45
46        .text
47
48/*
49void dtrace_membar_producer(void)
50*/
51LEAF(dtrace_membar_producer)
52	j	ra
53	nop
54END(dtrace_membar_producer)
55
56/*
57void dtrace_membar_consumer(void)
58*/
59LEAF(dtrace_membar_consumer)
60	j	ra
61	nop
62END(dtrace_membar_consumer)
63
64/*
65dtrace_icookie_t dtrace_interrupt_disable(void)
66*/
67LEAF(dtrace_interrupt_disable)
68	mfc0	t0, MIPS_COP_0_STATUS
69	move	v0, t0
70	and	v0, v0, MIPS_SR_INT_IE
71	and	t0, t0, ~MIPS_SR_INT_IE
72	mtc0	t0, MIPS_COP_0_STATUS
73	j	ra
74	nop
75END(dtrace_interrupt_disable)
76
77/*
78void dtrace_interrupt_enable(dtrace_icookie_t cookie)
79*/
80LEAF(dtrace_interrupt_enable)
81	mfc0	t0, MIPS_COP_0_STATUS
82	beqz	a0, not_enabled
83	or	t0, t0, MIPS_SR_INT_IE
84	mtc0	t0, MIPS_COP_0_STATUS
85not_enabled:
86	j	ra
87	nop
88END(dtrace_interrupt_enable)
89
90/*
91uint32_t dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new)
92*/
93LEAF(dtrace_cas32)
941:
95	move	t1, a2
96	ll	t0, 0(a0)
97	bne	t0, a1, 2f
98	nop
99	sc	t1, 0(a0)
100	beqz	t1, 1b
101	nop
1022:	move	v0, t0
103	j	ra
104	nop
105END(dtrace_cas32)
106
107/*
108void *
109dtrace_casptr(void *target, void *cmp, void *new)
110*/
111LEAF(dtrace_casptr)
1121:
113	move	t1, a2
114	PTR_LL	t0, 0(a0)
115	bne	t0, a1, 2f
116	nop
117	PTR_SC	t1, 0(a0)
118	beqz	t1, 1b
119	nop
1202:	move	v0, t0
121	j	ra
122	nop
123END(dtrace_casptr)
124
125
126/*
127uintptr_t
128dtrace_fulword(void *addr)
129*/
130LEAF(dtrace_fulword)
131END(dtrace_fulword)
132
133/*
134uint8_t
135dtrace_fuword8_nocheck(void *addr)
136*/
137LEAF(dtrace_fuword8_nocheck)
138	lbu	v0, 0(a0)
139	j	ra
140	nop
141END(dtrace_fuword8_nocheck)
142
143/*
144uint16_t
145dtrace_fuword16_nocheck(void *addr)
146*/
147LEAF(dtrace_fuword16_nocheck)
148	lhu	v0, 0(a0)
149	j	ra
150	nop
151END(dtrace_fuword16_nocheck)
152
153/*
154uint32_t
155dtrace_fuword32_nocheck(void *addr)
156*/
157LEAF(dtrace_fuword32_nocheck)
158	lw	v0, 0(a0)
159	j	ra
160	nop
161END(dtrace_fuword32_nocheck)
162
163/*
164uint64_t
165dtrace_fuword64_nocheck(void *addr)
166*/
167LEAF(dtrace_fuword64_nocheck)
168#if defined(__mips_n64) || defined(__mips_n32)
169	ld	v0, 0(a0)
170#else
171	lw	v1,4(a0)
172	lw	v0,0(a0)
173#endif
174	j	ra
175	nop
176END(dtrace_fuword64_nocheck)
177
178/*
179XXX: unoptimized
180void
181dtrace_copy(uintptr_t src, uintptr_t dest, size_t size)
182*/
183LEAF(dtrace_copy)
1841:
185	beqz	a2, 2f
186	nop
187	lbu	t0, 0(a0)
188	sb	t0, 0(a1)
189	PTR_ADDU	a0, a0, 1
190	PTR_ADDU	a1, a1, 1
191	INT_SUBU	a2, a2, 1
192	j	1b
193	nop
1942:
195	j	ra
196	nop
197END(dtrace_copy)
198
199/*
200XXX: Unoptimized. Check for flags on page boundaries only(?)
201void
202dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size,
203    volatile uint16_t *flags)
204*/
205LEAF(dtrace_copystr)
2061:
207	lbu	t0, 0(a0)
208	sb	t0, 0(a1)
209	PTR_ADDU	a0, a0, 1
210	PTR_ADDU	a1, a1, 1
211	INT_SUBU	a2, a2, 1
212	beqz	t0, 2f
213	nop
214	lhu	t1, (a3)
215	and	t1, t1, CPU_DTRACE_BADADDR
216	bnez	t1, 2f
217	nop
218
219	bnez	a2, 1b
220	nop
2212:
222	j	ra
223	nop
224END(dtrace_copystr)
225
226/*
227uintptr_t
228dtrace_caller(int aframes)
229*/
230LEAF(dtrace_caller)
231	li	v0, -1
232	j	ra
233	nop
234END(dtrace_caller)
235