1// SPDX-License-Identifier: GPL-2.0 2 3#include <dt-bindings/input/gpio-keys.h> 4#include <dt-bindings/input/input.h> 5#include <dt-bindings/thermal/thermal.h> 6 7#include "tegra30.dtsi" 8#include "tegra30-cpu-opp.dtsi" 9#include "tegra30-cpu-opp-microvolt.dtsi" 10 11/ { 12 aliases { 13 rtc0 = &pmic; 14 rtc1 = "/rtc@7000e000"; 15 16 serial1 = &uartc; /* Bluetooth */ 17 serial2 = &uartb; /* GPS */ 18 }; 19 20 /* 21 * The decompressor and also some bootloaders rely on a 22 * pre-existing /chosen node to be available to insert the 23 * command line and merge other ATAGS info. 24 */ 25 chosen {}; 26 27 memory@80000000 { 28 reg = <0x80000000 0x40000000>; 29 }; 30 31 reserved-memory { 32 #address-cells = <1>; 33 #size-cells = <1>; 34 ranges; 35 36 linux,cma@80000000 { 37 compatible = "shared-dma-pool"; 38 alloc-ranges = <0x80000000 0x30000000>; 39 size = <0x10000000>; /* 256MiB */ 40 linux,cma-default; 41 reusable; 42 }; 43 44 ramoops@bfdf0000 { 45 compatible = "ramoops"; 46 reg = <0xbfdf0000 0x10000>; /* 64kB */ 47 console-size = <0x8000>; /* 32kB */ 48 record-size = <0x400>; /* 1kB */ 49 ecc-size = <16>; 50 }; 51 52 trustzone@bfe00000 { 53 reg = <0xbfe00000 0x200000>; 54 no-map; 55 }; 56 }; 57 58 host1x@50000000 { 59 dc@54200000 { 60 rgb { 61 status = "okay"; 62 63 port@0 { 64 lcd_output: endpoint { 65 remote-endpoint = <&lvds_encoder_input>; 66 bus-width = <24>; 67 }; 68 }; 69 }; 70 }; 71 }; 72 73 gpio@6000d000 { 74 init-mode { 75 gpio-hog; 76 gpios = <TEGRA_GPIO(DD, 7) GPIO_ACTIVE_HIGH>, 77 <TEGRA_GPIO(CC, 6) GPIO_ACTIVE_HIGH>, 78 <TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; 79 output-low; 80 }; 81 82 init-low-power-mode { 83 gpio-hog; 84 gpios = <TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; 85 input; 86 }; 87 }; 88 89 pinmux@70000868 { 90 pinctrl-names = "default"; 91 pinctrl-0 = <&state_default>; 92 93 state_default: pinmux { 94 clk_32k_out_pa0 { 95 nvidia,pins = "clk_32k_out_pa0"; 96 nvidia,function = "blink"; 97 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 98 nvidia,tristate = <TEGRA_PIN_DISABLE>; 99 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 100 }; 101 uart3_cts_n_pa1 { 102 nvidia,pins = "uart3_cts_n_pa1", 103 "uart3_rxd_pw7"; 104 nvidia,function = "uartc"; 105 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 106 nvidia,tristate = <TEGRA_PIN_DISABLE>; 107 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 108 }; 109 dap2_fs_pa2 { 110 nvidia,pins = "dap2_fs_pa2", 111 "dap2_sclk_pa3", 112 "dap2_din_pa4", 113 "dap2_dout_pa5"; 114 nvidia,function = "i2s1"; 115 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 116 nvidia,tristate = <TEGRA_PIN_DISABLE>; 117 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 118 }; 119 sdmmc3_clk_pa6 { 120 nvidia,pins = "sdmmc3_clk_pa6"; 121 nvidia,function = "sdmmc3"; 122 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 123 nvidia,tristate = <TEGRA_PIN_DISABLE>; 124 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 125 }; 126 sdmmc3_cmd_pa7 { 127 nvidia,pins = "sdmmc3_cmd_pa7", 128 "sdmmc3_dat3_pb4", 129 "sdmmc3_dat2_pb5", 130 "sdmmc3_dat1_pb6", 131 "sdmmc3_dat0_pb7", 132 "sdmmc3_dat4_pd1", 133 "sdmmc3_dat6_pd3", 134 "sdmmc3_dat7_pd4"; 135 nvidia,function = "sdmmc3"; 136 nvidia,pull = <TEGRA_PIN_PULL_UP>; 137 nvidia,tristate = <TEGRA_PIN_DISABLE>; 138 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 139 }; 140 gmi_a17_pb0 { 141 nvidia,pins = "gmi_a17_pb0", 142 "gmi_a18_pb1"; 143 nvidia,function = "uartd"; 144 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 145 nvidia,tristate = <TEGRA_PIN_DISABLE>; 146 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 147 }; 148 lcd_pwr0_pb2 { 149 nvidia,pins = "lcd_pwr0_pb2", 150 "lcd_pwr1_pc1", 151 "lcd_m1_pw1"; 152 nvidia,function = "displaya"; 153 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 154 nvidia,tristate = <TEGRA_PIN_DISABLE>; 155 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 156 }; 157 lcd_pclk_pb3 { 158 nvidia,pins = "lcd_pclk_pb3", 159 "lcd_d0_pe0", 160 "lcd_d1_pe1", 161 "lcd_d2_pe2", 162 "lcd_d3_pe3", 163 "lcd_d4_pe4", 164 "lcd_d5_pe5", 165 "lcd_d6_pe6", 166 "lcd_d7_pe7", 167 "lcd_d8_pf0", 168 "lcd_d9_pf1", 169 "lcd_d10_pf2", 170 "lcd_d11_pf3", 171 "lcd_d12_pf4", 172 "lcd_d13_pf5", 173 "lcd_d14_pf6", 174 "lcd_d15_pf7", 175 "lcd_de_pj1", 176 "lcd_hsync_pj3", 177 "lcd_vsync_pj4", 178 "lcd_d16_pm0", 179 "lcd_d17_pm1", 180 "lcd_d18_pm2", 181 "lcd_d19_pm3", 182 "lcd_d20_pm4", 183 "lcd_d21_pm5", 184 "lcd_d22_pm6", 185 "lcd_d23_pm7", 186 "lcd_cs0_n_pn4", 187 "lcd_sdout_pn5", 188 "lcd_dc0_pn6", 189 "lcd_cs1_n_pw0", 190 "lcd_sdin_pz2", 191 "lcd_sck_pz4"; 192 nvidia,function = "displaya"; 193 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 194 nvidia,tristate = <TEGRA_PIN_DISABLE>; 195 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 196 }; 197 uart3_rts_n_pc0 { 198 nvidia,pins = "uart3_rts_n_pc0", 199 "uart3_txd_pw6"; 200 nvidia,function = "uartc"; 201 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 202 nvidia,tristate = <TEGRA_PIN_DISABLE>; 203 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 204 }; 205 uart2_txd_pc2 { 206 nvidia,pins = "uart2_txd_pc2", 207 "uart2_rts_n_pj6"; 208 nvidia,function = "uartb"; 209 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 210 nvidia,tristate = <TEGRA_PIN_DISABLE>; 211 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 212 }; 213 uart2_rxd_pc3 { 214 nvidia,pins = "uart2_rxd_pc3", 215 "uart2_cts_n_pj5"; 216 nvidia,function = "uartb"; 217 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 218 nvidia,tristate = <TEGRA_PIN_DISABLE>; 219 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 220 }; 221 gen1_i2c_scl_pc4 { 222 nvidia,pins = "gen1_i2c_scl_pc4", 223 "gen1_i2c_sda_pc5"; 224 nvidia,function = "i2c1"; 225 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 226 nvidia,tristate = <TEGRA_PIN_DISABLE>; 227 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 228 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 229 }; 230 gmi_wp_n_pc7 { 231 nvidia,pins = "gmi_wp_n_pc7", 232 "gmi_wait_pi7", 233 "gmi_cs4_n_pk2", 234 "gmi_cs3_n_pk4"; 235 nvidia,function = "rsvd1"; 236 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 237 nvidia,tristate = <TEGRA_PIN_ENABLE>; 238 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 239 }; 240 gmi_ad12_ph4 { 241 nvidia,pins = "gmi_ad12_ph4", 242 "gmi_cs0_n_pj0", 243 "gmi_cs1_n_pj2", 244 "gmi_cs2_n_pk3"; 245 nvidia,function = "rsvd1"; 246 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 247 nvidia,tristate = <TEGRA_PIN_ENABLE>; 248 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 249 }; 250 sdmmc3_dat5_pd0 { 251 nvidia,pins = "sdmmc3_dat5_pd0"; 252 nvidia,function = "sdmmc3"; 253 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 254 nvidia,tristate = <TEGRA_PIN_DISABLE>; 255 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 256 }; 257 gmi_ad0_pg0 { 258 nvidia,pins = "gmi_ad0_pg0", 259 "gmi_ad1_pg1", 260 "gmi_ad14_ph6", 261 "pu1"; 262 nvidia,function = "rsvd1"; 263 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 264 nvidia,tristate = <TEGRA_PIN_DISABLE>; 265 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 266 }; 267 gmi_ad2_pg2 { 268 nvidia,pins = "gmi_ad2_pg2", 269 "gmi_ad3_pg3", 270 "gmi_ad6_pg6", 271 "gmi_ad7_pg7"; 272 nvidia,function = "rsvd1"; 273 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 274 nvidia,tristate = <TEGRA_PIN_DISABLE>; 275 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 276 }; 277 gmi_ad4_pg4 { 278 nvidia,pins = "gmi_ad4_pg4", 279 "gmi_ad5_pg5"; 280 nvidia,function = "nand"; 281 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 282 nvidia,tristate = <TEGRA_PIN_DISABLE>; 283 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 284 }; 285 gmi_ad8_ph0 { 286 nvidia,pins = "gmi_ad8_ph0"; 287 nvidia,function = "pwm0"; 288 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 289 nvidia,tristate = <TEGRA_PIN_DISABLE>; 290 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 291 }; 292 gmi_ad9_ph1 { 293 nvidia,pins = "gmi_ad9_ph1"; 294 nvidia,function = "rsvd4"; 295 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 296 nvidia,tristate = <TEGRA_PIN_DISABLE>; 297 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 298 }; 299 gmi_ad10_ph2 { 300 nvidia,pins = "gmi_ad10_ph2"; 301 nvidia,function = "pwm2"; 302 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 303 nvidia,tristate = <TEGRA_PIN_ENABLE>; 304 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 305 }; 306 gmi_ad11_ph3 { 307 nvidia,pins = "gmi_ad11_ph3"; 308 nvidia,function = "pwm3"; 309 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 310 nvidia,tristate = <TEGRA_PIN_DISABLE>; 311 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 312 }; 313 gmi_ad13_ph5 { 314 nvidia,pins = "gmi_ad13_ph5", 315 "gmi_wr_n_pi0", 316 "gmi_oe_n_pi1", 317 "gmi_adv_n_pk0"; 318 nvidia,function = "rsvd1"; 319 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 320 nvidia,tristate = <TEGRA_PIN_ENABLE>; 321 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 322 }; 323 gmi_ad15_ph7 { 324 nvidia,pins = "gmi_ad15_ph7"; 325 nvidia,function = "rsvd1"; 326 nvidia,pull = <TEGRA_PIN_PULL_UP>; 327 nvidia,tristate = <TEGRA_PIN_DISABLE>; 328 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 329 }; 330 gmi_dqs_pi2 { 331 nvidia,pins = "gmi_dqs_pi2", 332 "pu2", 333 "pv1"; 334 nvidia,function = "rsvd1"; 335 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 336 nvidia,tristate = <TEGRA_PIN_DISABLE>; 337 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 338 }; 339 gmi_rst_n_pi4 { 340 nvidia,pins = "gmi_rst_n_pi4"; 341 nvidia,function = "nand"; 342 nvidia,pull = <TEGRA_PIN_PULL_UP>; 343 nvidia,tristate = <TEGRA_PIN_DISABLE>; 344 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 345 }; 346 gmi_iordy_pi5 { 347 nvidia,pins = "gmi_iordy_pi5"; 348 nvidia,function = "rsvd1"; 349 nvidia,pull = <TEGRA_PIN_PULL_UP>; 350 nvidia,tristate = <TEGRA_PIN_DISABLE>; 351 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 352 }; 353 gmi_cs7_n_pi6 { 354 nvidia,pins = "gmi_cs7_n_pi6", 355 "gmi_clk_pk1"; 356 nvidia,function = "nand"; 357 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 358 nvidia,tristate = <TEGRA_PIN_ENABLE>; 359 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 360 }; 361 gmi_a16_pj7 { 362 nvidia,pins = "gmi_a16_pj7", 363 "gmi_a19_pk7"; 364 nvidia,function = "uartd"; 365 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 366 nvidia,tristate = <TEGRA_PIN_DISABLE>; 367 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 368 }; 369 spdif_out_pk5 { 370 nvidia,pins = "spdif_out_pk5"; 371 nvidia,function = "spdif"; 372 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 373 nvidia,tristate = <TEGRA_PIN_DISABLE>; 374 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 375 }; 376 spdif_in_pk6 { 377 nvidia,pins = "spdif_in_pk6"; 378 nvidia,function = "spdif"; 379 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 380 nvidia,tristate = <TEGRA_PIN_DISABLE>; 381 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 382 }; 383 dap1_fs_pn0 { 384 nvidia,pins = "dap1_fs_pn0", 385 "dap1_din_pn1", 386 "dap1_dout_pn2", 387 "dap1_sclk_pn3"; 388 nvidia,function = "i2s0"; 389 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 390 nvidia,tristate = <TEGRA_PIN_DISABLE>; 391 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 392 }; 393 hdmi_int_pn7 { 394 nvidia,pins = "hdmi_int_pn7"; 395 nvidia,function = "hdmi"; 396 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 397 nvidia,tristate = <TEGRA_PIN_ENABLE>; 398 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 399 }; 400 ulpi_data7_po0 { 401 nvidia,pins = "ulpi_data7_po0"; 402 nvidia,function = "uarta"; 403 nvidia,pull = <TEGRA_PIN_PULL_UP>; 404 nvidia,tristate = <TEGRA_PIN_ENABLE>; 405 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 406 }; 407 ulpi_data3_po4 { 408 nvidia,pins = "ulpi_data3_po4"; 409 nvidia,function = "ulpi"; 410 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 411 nvidia,tristate = <TEGRA_PIN_DISABLE>; 412 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 413 }; 414 dap3_fs_pp0 { 415 nvidia,pins = "dap3_fs_pp0"; 416 nvidia,function = "i2s2"; 417 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 418 nvidia,tristate = <TEGRA_PIN_DISABLE>; 419 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 420 }; 421 dap4_fs_pp4 { 422 nvidia,pins = "dap4_fs_pp4", 423 "dap4_din_pp5", 424 "dap4_dout_pp6", 425 "dap4_sclk_pp7"; 426 nvidia,function = "i2s3"; 427 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 428 nvidia,tristate = <TEGRA_PIN_DISABLE>; 429 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 430 }; 431 kb_col0_pq0 { 432 nvidia,pins = "kb_col0_pq0", 433 "kb_col1_pq1", 434 "kb_row1_pr1"; 435 nvidia,function = "kbc"; 436 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 437 nvidia,tristate = <TEGRA_PIN_ENABLE>; 438 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 439 }; 440 kb_col2_pq2 { 441 nvidia,pins = "kb_col2_pq2", 442 "kb_col3_pq3"; 443 nvidia,function = "rsvd4"; 444 nvidia,pull = <TEGRA_PIN_PULL_UP>; 445 nvidia,tristate = <TEGRA_PIN_ENABLE>; 446 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 447 }; 448 kb_col4_pq4 { 449 nvidia,pins = "kb_col4_pq4", 450 "kb_col5_pq5", 451 "kb_col7_pq7", 452 "kb_row2_pr2", 453 "kb_row4_pr4", 454 "kb_row5_pr5", 455 "kb_row14_ps6"; 456 nvidia,function = "kbc"; 457 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 458 nvidia,tristate = <TEGRA_PIN_ENABLE>; 459 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 460 }; 461 kb_row0_pr0 { 462 nvidia,pins = "kb_row0_pr0"; 463 nvidia,function = "rsvd4"; 464 nvidia,pull = <TEGRA_PIN_PULL_UP>; 465 nvidia,tristate = <TEGRA_PIN_DISABLE>; 466 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 467 }; 468 kb_row6_pr6 { 469 nvidia,pins = "kb_row6_pr6", 470 "kb_row8_ps0", 471 "kb_row9_ps1", 472 "kb_row10_ps2"; 473 nvidia,function = "kbc"; 474 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 475 nvidia,tristate = <TEGRA_PIN_DISABLE>; 476 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 477 }; 478 kb_row11_ps3 { 479 nvidia,pins = "kb_row11_ps3", 480 "kb_row12_ps4"; 481 nvidia,function = "kbc"; 482 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 483 nvidia,tristate = <TEGRA_PIN_DISABLE>; 484 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 485 }; 486 gen2_i2c_scl_pt5 { 487 nvidia,pins = "gen2_i2c_scl_pt5", 488 "gen2_i2c_sda_pt6"; 489 nvidia,function = "i2c2"; 490 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 491 nvidia,tristate = <TEGRA_PIN_DISABLE>; 492 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 493 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 494 }; 495 sdmmc4_cmd_pt7 { 496 nvidia,pins = "sdmmc4_cmd_pt7", 497 "sdmmc4_dat0_paa0", 498 "sdmmc4_dat1_paa1", 499 "sdmmc4_dat2_paa2", 500 "sdmmc4_dat3_paa3", 501 "sdmmc4_dat4_paa4", 502 "sdmmc4_dat5_paa5", 503 "sdmmc4_dat6_paa6", 504 "sdmmc4_dat7_paa7"; 505 nvidia,function = "sdmmc4"; 506 nvidia,pull = <TEGRA_PIN_PULL_UP>; 507 nvidia,tristate = <TEGRA_PIN_DISABLE>; 508 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 509 }; 510 pu0 { 511 nvidia,pins = "pu0", 512 "pu6"; 513 nvidia,function = "rsvd4"; 514 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 515 nvidia,tristate = <TEGRA_PIN_DISABLE>; 516 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 517 }; 518 jtag_rtck_pu7 { 519 nvidia,pins = "jtag_rtck_pu7"; 520 nvidia,function = "rtck"; 521 nvidia,pull = <TEGRA_PIN_PULL_UP>; 522 nvidia,tristate = <TEGRA_PIN_DISABLE>; 523 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 524 }; 525 pv0 { 526 nvidia,pins = "pv0"; 527 nvidia,function = "rsvd1"; 528 nvidia,pull = <TEGRA_PIN_PULL_UP>; 529 nvidia,tristate = <TEGRA_PIN_ENABLE>; 530 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 531 }; 532 ddc_scl_pv4 { 533 nvidia,pins = "ddc_scl_pv4", 534 "ddc_sda_pv5"; 535 nvidia,function = "i2c4"; 536 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 537 nvidia,tristate = <TEGRA_PIN_DISABLE>; 538 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 539 }; 540 crt_hsync_pv6 { 541 nvidia,pins = "crt_hsync_pv6", 542 "crt_vsync_pv7"; 543 nvidia,function = "crt"; 544 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 545 nvidia,tristate = <TEGRA_PIN_DISABLE>; 546 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 547 }; 548 spi2_cs1_n_pw2 { 549 nvidia,pins = "spi2_cs1_n_pw2", 550 "spi2_miso_px1", 551 "spi2_sck_px2"; 552 nvidia,function = "spi2"; 553 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 554 nvidia,tristate = <TEGRA_PIN_DISABLE>; 555 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 556 }; 557 clk1_out_pw4 { 558 nvidia,pins = "clk1_out_pw4"; 559 nvidia,function = "extperiph1"; 560 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 561 nvidia,tristate = <TEGRA_PIN_DISABLE>; 562 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 563 }; 564 clk2_out_pw5 { 565 nvidia,pins = "clk2_out_pw5"; 566 nvidia,function = "extperiph2"; 567 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 568 nvidia,tristate = <TEGRA_PIN_DISABLE>; 569 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 570 }; 571 spi2_cs0_n_px3 { 572 nvidia,pins = "spi2_cs0_n_px3"; 573 nvidia,function = "spi6"; 574 nvidia,pull = <TEGRA_PIN_PULL_UP>; 575 nvidia,tristate = <TEGRA_PIN_DISABLE>; 576 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 577 }; 578 spi1_mosi_px4 { 579 nvidia,pins = "spi1_mosi_px4", 580 "spi1_cs0_n_px6"; 581 nvidia,function = "spi1"; 582 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 583 nvidia,tristate = <TEGRA_PIN_DISABLE>; 584 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 585 }; 586 ulpi_clk_py0 { 587 nvidia,pins = "ulpi_clk_py0", 588 "ulpi_dir_py1"; 589 nvidia,function = "ulpi"; 590 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 591 nvidia,tristate = <TEGRA_PIN_ENABLE>; 592 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 593 }; 594 sdmmc1_dat3_py4 { 595 nvidia,pins = "sdmmc1_dat3_py4", 596 "sdmmc1_dat2_py5", 597 "sdmmc1_dat1_py6", 598 "sdmmc1_dat0_py7", 599 "sdmmc1_cmd_pz1"; 600 nvidia,function = "sdmmc1"; 601 nvidia,pull = <TEGRA_PIN_PULL_UP>; 602 nvidia,tristate = <TEGRA_PIN_DISABLE>; 603 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 604 }; 605 sdmmc1_clk_pz0 { 606 nvidia,pins = "sdmmc1_clk_pz0"; 607 nvidia,function = "sdmmc1"; 608 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 609 nvidia,tristate = <TEGRA_PIN_DISABLE>; 610 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 611 }; 612 lcd_wr_n_pz3 { 613 nvidia,pins = "lcd_wr_n_pz3"; 614 nvidia,function = "displaya"; 615 nvidia,pull = <TEGRA_PIN_PULL_UP>; 616 nvidia,tristate = <TEGRA_PIN_DISABLE>; 617 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 618 }; 619 sys_clk_req_pz5 { 620 nvidia,pins = "sys_clk_req_pz5"; 621 nvidia,function = "sysclk"; 622 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 623 nvidia,tristate = <TEGRA_PIN_DISABLE>; 624 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 625 }; 626 pwr_i2c_scl_pz6 { 627 nvidia,pins = "pwr_i2c_scl_pz6", 628 "pwr_i2c_sda_pz7"; 629 nvidia,function = "i2cpwr"; 630 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 631 nvidia,tristate = <TEGRA_PIN_DISABLE>; 632 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 633 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 634 }; 635 pbb0 { 636 nvidia,pins = "pbb0", 637 "pcc1"; 638 nvidia,function = "rsvd2"; 639 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 640 nvidia,tristate = <TEGRA_PIN_DISABLE>; 641 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 642 }; 643 cam_i2c_scl_pbb1 { 644 nvidia,pins = "cam_i2c_scl_pbb1", 645 "cam_i2c_sda_pbb2"; 646 nvidia,function = "i2c3"; 647 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 648 nvidia,tristate = <TEGRA_PIN_DISABLE>; 649 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 650 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 651 }; 652 pbb3 { 653 nvidia,pins = "pbb3"; 654 nvidia,function = "vgp3"; 655 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 656 nvidia,tristate = <TEGRA_PIN_DISABLE>; 657 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 658 }; 659 pbb4 { 660 nvidia,pins = "pbb4"; 661 nvidia,function = "vgp4"; 662 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 663 nvidia,tristate = <TEGRA_PIN_DISABLE>; 664 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 665 }; 666 pbb5 { 667 nvidia,pins = "pbb5"; 668 nvidia,function = "vgp5"; 669 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 670 nvidia,tristate = <TEGRA_PIN_DISABLE>; 671 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 672 }; 673 pbb6 { 674 nvidia,pins = "pbb6"; 675 nvidia,function = "vgp6"; 676 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 677 nvidia,tristate = <TEGRA_PIN_DISABLE>; 678 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 679 }; 680 pbb7 { 681 nvidia,pins = "pbb7", 682 "pcc2"; 683 nvidia,function = "i2s4"; 684 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 685 nvidia,tristate = <TEGRA_PIN_DISABLE>; 686 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 687 }; 688 cam_mclk_pcc0 { 689 nvidia,pins = "cam_mclk_pcc0"; 690 nvidia,function = "vi_alt3"; 691 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 692 nvidia,tristate = <TEGRA_PIN_DISABLE>; 693 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 694 }; 695 sdmmc4_rst_n_pcc3 { 696 nvidia,pins = "sdmmc4_rst_n_pcc3"; 697 nvidia,function = "rsvd2"; 698 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 699 nvidia,tristate = <TEGRA_PIN_DISABLE>; 700 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 701 }; 702 sdmmc4_clk_pcc4 { 703 nvidia,pins = "sdmmc4_clk_pcc4"; 704 nvidia,function = "sdmmc4"; 705 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 706 nvidia,tristate = <TEGRA_PIN_DISABLE>; 707 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 708 }; 709 clk2_req_pcc5 { 710 nvidia,pins = "clk2_req_pcc5"; 711 nvidia,function = "dap"; 712 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 713 nvidia,tristate = <TEGRA_PIN_DISABLE>; 714 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 715 }; 716 pex_l2_rst_n_pcc6 { 717 nvidia,pins = "pex_l2_rst_n_pcc6", 718 "pex_l2_clkreq_n_pcc7"; 719 nvidia,function = "pcie"; 720 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 721 nvidia,tristate = <TEGRA_PIN_DISABLE>; 722 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 723 }; 724 pex_wake_n_pdd3 { 725 nvidia,pins = "pex_wake_n_pdd3", 726 "pex_l2_prsnt_n_pdd7"; 727 nvidia,function = "pcie"; 728 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 729 nvidia,tristate = <TEGRA_PIN_DISABLE>; 730 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 731 }; 732 clk3_out_pee0 { 733 nvidia,pins = "clk3_out_pee0"; 734 nvidia,function = "extperiph3"; 735 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 736 nvidia,tristate = <TEGRA_PIN_DISABLE>; 737 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 738 }; 739 clk1_req_pee2 { 740 nvidia,pins = "clk1_req_pee2"; 741 nvidia,function = "dap"; 742 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 743 nvidia,tristate = <TEGRA_PIN_ENABLE>; 744 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 745 }; 746 hdmi_cec_pee3 { 747 nvidia,pins = "hdmi_cec_pee3"; 748 nvidia,function = "cec"; 749 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 750 nvidia,tristate = <TEGRA_PIN_DISABLE>; 751 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 752 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 753 }; 754 owr { 755 nvidia,pins = "owr"; 756 nvidia,function = "owr"; 757 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 758 nvidia,tristate = <TEGRA_PIN_DISABLE>; 759 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 760 }; 761 drive_dap1 { 762 nvidia,pins = "drive_dap1", 763 "drive_dap2", 764 "drive_dbg", 765 "drive_at5", 766 "drive_gme", 767 "drive_ddc", 768 "drive_ao1", 769 "drive_uart3"; 770 nvidia,high-speed-mode = <0>; 771 nvidia,schmitt = <TEGRA_PIN_ENABLE>; 772 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; 773 nvidia,pull-down-strength = <31>; 774 nvidia,pull-up-strength = <31>; 775 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 776 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 777 }; 778 drive_sdio1 { 779 nvidia,pins = "drive_sdio1", 780 "drive_sdio3"; 781 nvidia,high-speed-mode = <0>; 782 nvidia,schmitt = <TEGRA_PIN_DISABLE>; 783 nvidia,pull-down-strength = <46>; 784 nvidia,pull-up-strength = <42>; 785 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>; 786 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>; 787 }; 788 drive_gma { 789 nvidia,pins = "drive_gma", 790 "drive_gmb", 791 "drive_gmc", 792 "drive_gmd"; 793 nvidia,pull-down-strength = <9>; 794 nvidia,pull-up-strength = <9>; 795 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>; 796 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>; 797 }; 798 }; 799 }; 800 801 uartb: serial@70006040 { 802 compatible = "nvidia,tegra30-hsuart"; 803 /* GPS BCM4751 */ 804 }; 805 806 uartc: serial@70006200 { 807 compatible = "nvidia,tegra30-hsuart"; 808 status = "okay"; 809 810 nvidia,adjust-baud-rates = <0 9600 100>, 811 <9600 115200 200>, 812 <1000000 4000000 136>; 813 814 /* Azurewave AW-NH665 BCM4330B1 */ 815 bluetooth { 816 compatible = "brcm,bcm4330-bt"; 817 818 max-speed = <4000000>; 819 820 clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>; 821 clock-names = "txco"; 822 823 vbat-supply = <&vdd_3v3_sys>; 824 vddio-supply = <&vdd_1v8>; 825 826 device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>; 827 host-wakeup-gpios = <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_HIGH>; 828 shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; 829 }; 830 }; 831 832 pwm: pwm@7000a000 { 833 status = "okay"; 834 }; 835 836 i2c@7000c400 { 837 clock-frequency = <400000>; 838 status = "okay"; 839 }; 840 841 i2c@7000c500 { 842 clock-frequency = <100000>; 843 status = "okay"; 844 845 compass@e { 846 compatible = "asahi-kasei,ak8974"; 847 reg = <0x0e>; 848 849 interrupt-parent = <&gpio>; 850 interrupts = <TEGRA_GPIO(W, 0) IRQ_TYPE_EDGE_RISING>; 851 852 avdd-supply = <&vdd_3v3_sys>; 853 dvdd-supply = <&vdd_1v8>; 854 855 mount-matrix = "0", "-1", "0", 856 "-1", "0", "0", 857 "0", "0", "-1"; 858 }; 859 860 light-sensor@1c { 861 compatible = "dynaimage,al3010"; 862 reg = <0x1c>; 863 864 interrupt-parent = <&gpio>; 865 interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>; 866 867 vdd-supply = <&vdd_3v3_sys>; 868 }; 869 870 accelerometer@68 { 871 compatible = "invensense,mpu6050"; 872 reg = <0x68>; 873 874 interrupt-parent = <&gpio>; 875 interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_RISING>; 876 877 vdd-supply = <&vdd_3v3_sys>; 878 vddio-supply = <&vdd_1v8>; 879 880 mount-matrix = "0", "-1", "0", 881 "-1", "0", "0", 882 "0", "0", "-1"; 883 }; 884 }; 885 886 i2c@7000d000 { 887 clock-frequency = <100000>; 888 status = "okay"; 889 890 rt5640: audio-codec@1c { 891 compatible = "realtek,rt5640"; 892 reg = <0x1c>; 893 894 realtek,dmic1-data-pin = <1>; 895 }; 896 897 nct72: temperature-sensor@4c { 898 compatible = "onnn,nct1008"; 899 reg = <0x4c>; 900 vcc-supply = <&vdd_3v3_sys>; 901 #thermal-sensor-cells = <1>; 902 }; 903 904 battery@55 { 905 compatible = "ti,bq27541"; 906 reg = <0x55>; 907 }; 908 }; 909 910 pmc@7000e400 { 911 status = "okay"; 912 nvidia,invert-interrupt; 913 nvidia,suspend-mode = <1>; 914 nvidia,cpu-pwr-good-time = <2000>; 915 nvidia,cpu-pwr-off-time = <200>; 916 nvidia,core-pwr-good-time = <3845 3845>; 917 nvidia,core-pwr-off-time = <0>; 918 nvidia,core-power-req-active-high; 919 nvidia,sys-clock-req-active-high; 920 }; 921 922 ahub@70080000 { 923 i2s@70080400 { 924 status = "okay"; 925 }; 926 }; 927 928 brcm_wifi_pwrseq: wifi-pwrseq { 929 compatible = "mmc-pwrseq-simple"; 930 931 clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>; 932 clock-names = "ext_clock"; 933 934 reset-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_LOW>; 935 post-power-on-delay-ms = <300>; 936 power-off-delay-us = <300>; 937 }; 938 939 mmc@78000400 { 940 status = "okay"; 941 942 #address-cells = <1>; 943 #size-cells = <0>; 944 945 keep-power-in-suspend; 946 bus-width = <4>; 947 non-removable; 948 949 mmc-pwrseq = <&brcm_wifi_pwrseq>; 950 vmmc-supply = <&vdd_3v3_sys>; 951 vqmmc-supply = <&vdd_1v8>; 952 953 /* Azurewave AW-NH665 BCM4330 */ 954 wifi@1 { 955 reg = <1>; 956 compatible = "brcm,bcm4329-fmac"; 957 interrupt-parent = <&gpio>; 958 interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>; 959 interrupt-names = "host-wake"; 960 }; 961 }; 962 963 mmc@78000600 { 964 status = "okay"; 965 bus-width = <8>; 966 vmmc-supply = <&vcore_emmc>; 967 vqmmc-supply = <&vdd_1v8>; 968 non-removable; 969 }; 970 971 usb@7d000000 { 972 compatible = "nvidia,tegra30-udc"; 973 status = "okay"; 974 dr_mode = "peripheral"; 975 }; 976 977 usb-phy@7d000000 { 978 status = "okay"; 979 dr_mode = "peripheral"; 980 nvidia,hssync-start-delay = <0>; 981 nvidia,xcvr-lsfslew = <2>; 982 nvidia,xcvr-lsrslew = <2>; 983 }; 984 985 backlight: backlight { 986 compatible = "pwm-backlight"; 987 988 power-supply = <&vdd_5v0_sys>; 989 pwms = <&pwm 0 50000>; 990 991 brightness-levels = <1 255>; 992 num-interpolated-steps = <254>; 993 default-brightness-level = <15>; 994 }; 995 996 /* PMIC has a built-in 32KHz oscillator which is used by PMC */ 997 clk32k_in: clock@0 { 998 compatible = "fixed-clock"; 999 #clock-cells = <0>; 1000 clock-frequency = <32768>; 1001 clock-output-names = "pmic-oscillator"; 1002 }; 1003 1004 cpus { 1005 cpu0: cpu@0 { 1006 cpu-supply = <&vdd_cpu>; 1007 operating-points-v2 = <&cpu0_opp_table>; 1008 #cooling-cells = <2>; 1009 }; 1010 1011 cpu@1 { 1012 cpu-supply = <&vdd_cpu>; 1013 operating-points-v2 = <&cpu0_opp_table>; 1014 }; 1015 1016 cpu@2 { 1017 cpu-supply = <&vdd_cpu>; 1018 operating-points-v2 = <&cpu0_opp_table>; 1019 }; 1020 1021 cpu@3 { 1022 cpu-supply = <&vdd_cpu>; 1023 operating-points-v2 = <&cpu0_opp_table>; 1024 }; 1025 }; 1026 1027 display-panel { 1028 compatible = "hydis,hv070wx2-1e0", "chunghwa,claa070wp03xg", 1029 "panel-lvds"; 1030 1031 power-supply = <&vdd_pnl>; 1032 backlight = <&backlight>; 1033 1034 width-mm = <94>; 1035 height-mm = <150>; 1036 rotation = <180>; 1037 1038 data-mapping = "jeida-24"; 1039 1040 port { 1041 panel_input: endpoint { 1042 remote-endpoint = <&lvds_encoder_output>; 1043 }; 1044 }; 1045 }; 1046 1047 firmware { 1048 trusted-foundations { 1049 compatible = "tlm,trusted-foundations"; 1050 tlm,version-major = <0x0>; 1051 tlm,version-minor = <0x0>; 1052 }; 1053 }; 1054 1055 gpio-keys { 1056 compatible = "gpio-keys"; 1057 1058 hall-sensor { 1059 label = "Lid"; 1060 gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>; 1061 linux,input-type = <EV_SW>; 1062 linux,code = <SW_LID>; 1063 debounce-interval = <500>; 1064 wakeup-event-action = <EV_ACT_DEASSERTED>; 1065 wakeup-source; 1066 }; 1067 1068 power { 1069 label = "Power"; 1070 gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; 1071 linux,code = <KEY_POWER>; 1072 debounce-interval = <10>; 1073 wakeup-event-action = <EV_ACT_ASSERTED>; 1074 wakeup-source; 1075 }; 1076 1077 volume-up { 1078 label = "Volume Up"; 1079 gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; 1080 linux,code = <KEY_VOLUMEUP>; 1081 debounce-interval = <10>; 1082 wakeup-event-action = <EV_ACT_ASSERTED>; 1083 wakeup-source; 1084 }; 1085 1086 volume-down { 1087 label = "Volume Down"; 1088 gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; 1089 linux,code = <KEY_VOLUMEDOWN>; 1090 debounce-interval = <10>; 1091 wakeup-event-action = <EV_ACT_ASSERTED>; 1092 wakeup-source; 1093 }; 1094 }; 1095 1096 lvds-encoder { 1097 compatible = "ti,sn75lvds83", "lvds-encoder"; 1098 1099 powerdown-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>; 1100 1101 ports { 1102 #address-cells = <1>; 1103 #size-cells = <0>; 1104 1105 port@0 { 1106 reg = <0>; 1107 1108 lvds_encoder_input: endpoint { 1109 remote-endpoint = <&lcd_output>; 1110 }; 1111 }; 1112 1113 port@1 { 1114 reg = <1>; 1115 1116 lvds_encoder_output: endpoint { 1117 remote-endpoint = <&panel_input>; 1118 }; 1119 }; 1120 }; 1121 }; 1122 1123 vdd_5v0_sys: regulator@0 { 1124 compatible = "regulator-fixed"; 1125 regulator-name = "vdd_5v0"; 1126 regulator-min-microvolt = <5000000>; 1127 regulator-max-microvolt = <5000000>; 1128 regulator-always-on; 1129 regulator-boot-on; 1130 }; 1131 1132 vdd_3v3_sys: regulator@1 { 1133 compatible = "regulator-fixed"; 1134 regulator-name = "vdd_3v3"; 1135 regulator-min-microvolt = <3300000>; 1136 regulator-max-microvolt = <3300000>; 1137 regulator-always-on; 1138 regulator-boot-on; 1139 vin-supply = <&vdd_5v0_sys>; 1140 }; 1141 1142 vdd_pnl: regulator@2 { 1143 compatible = "regulator-fixed"; 1144 regulator-name = "vdd_panel"; 1145 regulator-min-microvolt = <3300000>; 1146 regulator-max-microvolt = <3300000>; 1147 regulator-enable-ramp-delay = <300000>; 1148 gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>; 1149 enable-active-high; 1150 vin-supply = <&vdd_3v3_sys>; 1151 }; 1152 1153 vcc_3v3_ts: regulator@3 { 1154 compatible = "regulator-fixed"; 1155 regulator-name = "ldo_s-1167_3v3"; 1156 regulator-min-microvolt = <3300000>; 1157 regulator-max-microvolt = <3300000>; 1158 regulator-always-on; 1159 regulator-boot-on; 1160 vin-supply = <&vdd_5v0_sys>; 1161 }; 1162 1163 sound { 1164 compatible = "nvidia,tegra-audio-rt5640-grouper", 1165 "nvidia,tegra-audio-rt5640"; 1166 nvidia,model = "ASUS Google Nexus 7 ALC5642"; 1167 1168 nvidia,audio-routing = 1169 "Headphones", "HPOR", 1170 "Headphones", "HPOL", 1171 "Speakers", "SPORP", 1172 "Speakers", "SPORN", 1173 "Speakers", "SPOLP", 1174 "Speakers", "SPOLN", 1175 "DMIC1", "Mic Jack"; 1176 1177 nvidia,i2s-controller = <&tegra_i2s1>; 1178 nvidia,audio-codec = <&rt5640>; 1179 1180 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; 1181 1182 clocks = <&tegra_car TEGRA30_CLK_PLL_A>, 1183 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1184 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1185 clock-names = "pll_a", "pll_a_out0", "mclk"; 1186 1187 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>, 1188 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1189 1190 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1191 <&tegra_car TEGRA30_CLK_EXTERN1>; 1192 }; 1193 1194 thermal-zones { 1195 nct72-local { 1196 polling-delay-passive = <1000>; /* milliseconds */ 1197 polling-delay = <0>; /* milliseconds */ 1198 1199 thermal-sensors = <&nct72 0>; 1200 }; 1201 1202 nct72-remote { 1203 polling-delay-passive = <1000>; /* milliseconds */ 1204 polling-delay = <5000>; /* milliseconds */ 1205 1206 thermal-sensors = <&nct72 1>; 1207 1208 trips { 1209 trip0: cpu-alert0 { 1210 /* start throttling at 50C */ 1211 temperature = <50000>; 1212 hysteresis = <3000>; 1213 type = "passive"; 1214 }; 1215 1216 trip1: cpu-crit { 1217 /* shut down at 60C */ 1218 temperature = <60000>; 1219 hysteresis = <2000>; 1220 type = "critical"; 1221 }; 1222 }; 1223 1224 cooling-maps { 1225 map0 { 1226 trip = <&trip0>; 1227 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 1228 }; 1229 }; 1230 }; 1231 }; 1232}; 1233