1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 2006 Yahoo!, Inc.
5 * All rights reserved.
6 * Written by: John Baldwin <[email protected]>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33 /*
34 * Support for PCI Message Signalled Interrupts (MSI). MSI interrupts on
35 * x86 are basically APIC messages that the northbridge delivers directly
36 * to the local APICs as if they had come from an I/O APIC.
37 */
38
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
41
42 #include "opt_acpi.h"
43
44 #include <sys/param.h>
45 #include <sys/bus.h>
46 #include <sys/kernel.h>
47 #include <sys/limits.h>
48 #include <sys/lock.h>
49 #include <sys/malloc.h>
50 #include <sys/mutex.h>
51 #include <sys/sx.h>
52 #include <sys/sysctl.h>
53 #include <sys/systm.h>
54 #include <x86/apicreg.h>
55 #include <machine/cputypes.h>
56 #include <machine/md_var.h>
57 #include <machine/frame.h>
58 #include <machine/intr_machdep.h>
59 #include <x86/apicvar.h>
60 #include <x86/iommu/iommu_intrmap.h>
61 #include <machine/specialreg.h>
62 #include <dev/pci/pcivar.h>
63
64 /* Fields in address for Intel MSI messages. */
65 #define MSI_INTEL_ADDR_DEST 0x000ff000
66 #define MSI_INTEL_ADDR_RH 0x00000008
67 # define MSI_INTEL_ADDR_RH_ON 0x00000008
68 # define MSI_INTEL_ADDR_RH_OFF 0x00000000
69 #define MSI_INTEL_ADDR_DM 0x00000004
70 # define MSI_INTEL_ADDR_DM_PHYSICAL 0x00000000
71 # define MSI_INTEL_ADDR_DM_LOGICAL 0x00000004
72
73 /* Fields in data for Intel MSI messages. */
74 #define MSI_INTEL_DATA_TRGRMOD IOART_TRGRMOD /* Trigger mode. */
75 # define MSI_INTEL_DATA_TRGREDG IOART_TRGREDG
76 # define MSI_INTEL_DATA_TRGRLVL IOART_TRGRLVL
77 #define MSI_INTEL_DATA_LEVEL 0x00004000 /* Polarity. */
78 # define MSI_INTEL_DATA_DEASSERT 0x00000000
79 # define MSI_INTEL_DATA_ASSERT 0x00004000
80 #define MSI_INTEL_DATA_DELMOD IOART_DELMOD /* Delivery mode. */
81 # define MSI_INTEL_DATA_DELFIXED IOART_DELFIXED
82 # define MSI_INTEL_DATA_DELLOPRI IOART_DELLOPRI
83 # define MSI_INTEL_DATA_DELSMI IOART_DELSMI
84 # define MSI_INTEL_DATA_DELNMI IOART_DELNMI
85 # define MSI_INTEL_DATA_DELINIT IOART_DELINIT
86 # define MSI_INTEL_DATA_DELEXINT IOART_DELEXINT
87 #define MSI_INTEL_DATA_INTVEC IOART_INTVEC /* Interrupt vector. */
88
89 /*
90 * Build Intel MSI message and data values from a source. AMD64 systems
91 * seem to be compatible, so we use the same function for both.
92 */
93 #define INTEL_ADDR(msi) \
94 (MSI_INTEL_ADDR_BASE | (msi)->msi_cpu << 12 | \
95 MSI_INTEL_ADDR_RH_OFF | MSI_INTEL_ADDR_DM_PHYSICAL)
96 #define INTEL_DATA(msi) \
97 (MSI_INTEL_DATA_TRGREDG | MSI_INTEL_DATA_DELFIXED | (msi)->msi_vector)
98
99 static MALLOC_DEFINE(M_MSI, "msi", "PCI MSI");
100
101 /*
102 * MSI sources are bunched into groups. This is because MSI forces
103 * all of the messages to share the address and data registers and
104 * thus certain properties (such as the local APIC ID target on x86).
105 * Each group has a 'first' source that contains information global to
106 * the group. These fields are marked with (g) below.
107 *
108 * Note that local APIC ID is kind of special. Each message will be
109 * assigned an ID by the system; however, a group will use the ID from
110 * the first message.
111 *
112 * For MSI-X, each message is isolated.
113 */
114 struct msi_intsrc {
115 struct intsrc msi_intsrc;
116 device_t msi_dev; /* Owning device. (g) */
117 struct msi_intsrc *msi_first; /* First source in group. */
118 u_int msi_irq; /* IRQ cookie. */
119 u_int msi_msix; /* MSI-X message. */
120 u_int msi_vector:8; /* IDT vector. */
121 u_int msi_cpu; /* Local APIC ID. (g) */
122 u_int msi_count:8; /* Messages in this group. (g) */
123 u_int msi_maxcount:8; /* Alignment for this group. (g) */
124 u_int *msi_irqs; /* Group's IRQ list. (g) */
125 u_int msi_remap_cookie;
126 };
127
128 static void msi_create_source(void);
129 static void msi_enable_source(struct intsrc *isrc);
130 static void msi_disable_source(struct intsrc *isrc, int eoi);
131 static void msi_eoi_source(struct intsrc *isrc);
132 static void msi_enable_intr(struct intsrc *isrc);
133 static void msi_disable_intr(struct intsrc *isrc);
134 static int msi_vector(struct intsrc *isrc);
135 static int msi_source_pending(struct intsrc *isrc);
136 static int msi_config_intr(struct intsrc *isrc, enum intr_trigger trig,
137 enum intr_polarity pol);
138 static int msi_assign_cpu(struct intsrc *isrc, u_int apic_id);
139
140 struct pic msi_pic = {
141 .pic_enable_source = msi_enable_source,
142 .pic_disable_source = msi_disable_source,
143 .pic_eoi_source = msi_eoi_source,
144 .pic_enable_intr = msi_enable_intr,
145 .pic_disable_intr = msi_disable_intr,
146 .pic_vector = msi_vector,
147 .pic_source_pending = msi_source_pending,
148 .pic_suspend = NULL,
149 .pic_resume = NULL,
150 .pic_config_intr = msi_config_intr,
151 .pic_assign_cpu = msi_assign_cpu,
152 .pic_reprogram_pin = NULL,
153 };
154
155 u_int first_msi_irq;
156
157 u_int num_msi_irqs = 512;
158 SYSCTL_UINT(_machdep, OID_AUTO, num_msi_irqs, CTLFLAG_RDTUN, &num_msi_irqs, 0,
159 "Number of IRQs reserved for MSI and MSI-X interrupts");
160
161 #ifdef SMP
162 /**
163 * Xen hypervisors prior to 4.6.0 do not properly handle updates to
164 * enabled MSI-X table entries. Allow migration of MSI-X interrupts
165 * to be disabled via a tunable. Values have the following meaning:
166 *
167 * -1: automatic detection by FreeBSD
168 * 0: enable migration
169 * 1: disable migration
170 */
171 int msix_disable_migration = -1;
172 SYSCTL_INT(_machdep, OID_AUTO, disable_msix_migration, CTLFLAG_RDTUN,
173 &msix_disable_migration, 0,
174 "Disable migration of MSI-X interrupts between CPUs");
175 #endif
176
177 static int msi_enabled;
178 static u_int msi_last_irq;
179 static struct mtx msi_lock;
180
181 static void
msi_enable_source(struct intsrc * isrc)182 msi_enable_source(struct intsrc *isrc)
183 {
184 }
185
186 static void
msi_disable_source(struct intsrc * isrc,int eoi)187 msi_disable_source(struct intsrc *isrc, int eoi)
188 {
189
190 if (eoi == PIC_EOI)
191 lapic_eoi();
192 }
193
194 static void
msi_eoi_source(struct intsrc * isrc)195 msi_eoi_source(struct intsrc *isrc)
196 {
197
198 lapic_eoi();
199 }
200
201 static void
msi_enable_intr(struct intsrc * isrc)202 msi_enable_intr(struct intsrc *isrc)
203 {
204 struct msi_intsrc *msi = (struct msi_intsrc *)isrc;
205
206 apic_enable_vector(msi->msi_cpu, msi->msi_vector);
207 }
208
209 static void
msi_disable_intr(struct intsrc * isrc)210 msi_disable_intr(struct intsrc *isrc)
211 {
212 struct msi_intsrc *msi = (struct msi_intsrc *)isrc;
213
214 apic_disable_vector(msi->msi_cpu, msi->msi_vector);
215 }
216
217 static int
msi_vector(struct intsrc * isrc)218 msi_vector(struct intsrc *isrc)
219 {
220 struct msi_intsrc *msi = (struct msi_intsrc *)isrc;
221
222 return (msi->msi_irq);
223 }
224
225 static int
msi_source_pending(struct intsrc * isrc)226 msi_source_pending(struct intsrc *isrc)
227 {
228
229 return (0);
230 }
231
232 static int
msi_config_intr(struct intsrc * isrc,enum intr_trigger trig,enum intr_polarity pol)233 msi_config_intr(struct intsrc *isrc, enum intr_trigger trig,
234 enum intr_polarity pol)
235 {
236
237 return (ENODEV);
238 }
239
240 static int
msi_assign_cpu(struct intsrc * isrc,u_int apic_id)241 msi_assign_cpu(struct intsrc *isrc, u_int apic_id)
242 {
243 struct msi_intsrc *sib, *msi = (struct msi_intsrc *)isrc;
244 int old_vector;
245 u_int old_id;
246 int i, vector;
247
248 /*
249 * Only allow CPUs to be assigned to the first message for an
250 * MSI group.
251 */
252 if (msi->msi_first != msi)
253 return (EINVAL);
254
255 #ifdef SMP
256 if (msix_disable_migration && msi->msi_msix)
257 return (EINVAL);
258 #endif
259
260 /* Store information to free existing irq. */
261 old_vector = msi->msi_vector;
262 old_id = msi->msi_cpu;
263 if (old_id == apic_id)
264 return (0);
265
266 /* Allocate IDT vectors on this cpu. */
267 if (msi->msi_count > 1) {
268 KASSERT(msi->msi_msix == 0, ("MSI-X message group"));
269 vector = apic_alloc_vectors(apic_id, msi->msi_irqs,
270 msi->msi_count, msi->msi_maxcount);
271 } else
272 vector = apic_alloc_vector(apic_id, msi->msi_irq);
273 if (vector == 0)
274 return (ENOSPC);
275
276 msi->msi_cpu = apic_id;
277 msi->msi_vector = vector;
278 if (msi->msi_intsrc.is_handlers > 0)
279 apic_enable_vector(msi->msi_cpu, msi->msi_vector);
280 if (bootverbose)
281 printf("msi: Assigning %s IRQ %d to local APIC %u vector %u\n",
282 msi->msi_msix ? "MSI-X" : "MSI", msi->msi_irq,
283 msi->msi_cpu, msi->msi_vector);
284 for (i = 1; i < msi->msi_count; i++) {
285 sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]);
286 sib->msi_cpu = apic_id;
287 sib->msi_vector = vector + i;
288 if (sib->msi_intsrc.is_handlers > 0)
289 apic_enable_vector(sib->msi_cpu, sib->msi_vector);
290 if (bootverbose)
291 printf(
292 "msi: Assigning MSI IRQ %d to local APIC %u vector %u\n",
293 sib->msi_irq, sib->msi_cpu, sib->msi_vector);
294 }
295 BUS_REMAP_INTR(device_get_parent(msi->msi_dev), msi->msi_dev,
296 msi->msi_irq);
297
298 /*
299 * Free the old vector after the new one is established. This is done
300 * to prevent races where we could miss an interrupt.
301 */
302 if (msi->msi_intsrc.is_handlers > 0)
303 apic_disable_vector(old_id, old_vector);
304 apic_free_vector(old_id, old_vector, msi->msi_irq);
305 for (i = 1; i < msi->msi_count; i++) {
306 sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]);
307 if (sib->msi_intsrc.is_handlers > 0)
308 apic_disable_vector(old_id, old_vector + i);
309 apic_free_vector(old_id, old_vector + i, msi->msi_irqs[i]);
310 }
311 return (0);
312 }
313
314 void
msi_init(void)315 msi_init(void)
316 {
317
318 /* Check if we have a supported CPU. */
319 switch (cpu_vendor_id) {
320 case CPU_VENDOR_INTEL:
321 case CPU_VENDOR_AMD:
322 break;
323 case CPU_VENDOR_CENTAUR:
324 if (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
325 CPUID_TO_MODEL(cpu_id) >= 0xf)
326 break;
327 /* FALLTHROUGH */
328 default:
329 return;
330 }
331
332 #ifdef SMP
333 if (msix_disable_migration == -1) {
334 /* The default is to allow migration of MSI-X interrupts. */
335 msix_disable_migration = 0;
336 }
337 #endif
338
339 if (num_msi_irqs == 0)
340 return;
341
342 first_msi_irq = max(MINIMUM_MSI_INT, num_io_irqs);
343 if (num_msi_irqs > UINT_MAX - first_msi_irq)
344 panic("num_msi_irqs too high");
345 num_io_irqs = first_msi_irq + num_msi_irqs;
346
347 msi_enabled = 1;
348 intr_register_pic(&msi_pic);
349 mtx_init(&msi_lock, "msi", NULL, MTX_DEF);
350 }
351
352 static void
msi_create_source(void)353 msi_create_source(void)
354 {
355 struct msi_intsrc *msi;
356 u_int irq;
357
358 mtx_lock(&msi_lock);
359 if (msi_last_irq >= num_msi_irqs) {
360 mtx_unlock(&msi_lock);
361 return;
362 }
363 irq = msi_last_irq + first_msi_irq;
364 msi_last_irq++;
365 mtx_unlock(&msi_lock);
366
367 msi = malloc(sizeof(struct msi_intsrc), M_MSI, M_WAITOK | M_ZERO);
368 msi->msi_intsrc.is_pic = &msi_pic;
369 msi->msi_irq = irq;
370 intr_register_source(&msi->msi_intsrc);
371 nexus_add_irq(irq);
372 }
373
374 /*
375 * Try to allocate 'count' interrupt sources with contiguous IDT values.
376 */
377 int
msi_alloc(device_t dev,int count,int maxcount,int * irqs)378 msi_alloc(device_t dev, int count, int maxcount, int *irqs)
379 {
380 struct msi_intsrc *msi, *fsrc;
381 u_int cpu, domain, *mirqs;
382 int cnt, i, vector;
383 #ifdef ACPI_DMAR
384 u_int cookies[count];
385 int error;
386 #endif
387
388 if (!msi_enabled)
389 return (ENXIO);
390
391 if (bus_get_domain(dev, &domain) != 0)
392 domain = 0;
393
394 if (count > 1)
395 mirqs = malloc(count * sizeof(*mirqs), M_MSI, M_WAITOK);
396 else
397 mirqs = NULL;
398 again:
399 mtx_lock(&msi_lock);
400
401 /* Try to find 'count' free IRQs. */
402 cnt = 0;
403 for (i = first_msi_irq; i < first_msi_irq + num_msi_irqs; i++) {
404 msi = (struct msi_intsrc *)intr_lookup_source(i);
405
406 /* End of allocated sources, so break. */
407 if (msi == NULL)
408 break;
409
410 /* If this is a free one, save its IRQ in the array. */
411 if (msi->msi_dev == NULL) {
412 irqs[cnt] = i;
413 cnt++;
414 if (cnt == count)
415 break;
416 }
417 }
418
419 /* Do we need to create some new sources? */
420 if (cnt < count) {
421 /* If we would exceed the max, give up. */
422 if (i + (count - cnt) > first_msi_irq + num_msi_irqs) {
423 mtx_unlock(&msi_lock);
424 free(mirqs, M_MSI);
425 return (ENXIO);
426 }
427 mtx_unlock(&msi_lock);
428
429 /* We need count - cnt more sources. */
430 while (cnt < count) {
431 msi_create_source();
432 cnt++;
433 }
434 goto again;
435 }
436
437 /* Ok, we now have the IRQs allocated. */
438 KASSERT(cnt == count, ("count mismatch"));
439
440 /* Allocate 'count' IDT vectors. */
441 cpu = intr_next_cpu(domain);
442 vector = apic_alloc_vectors(cpu, irqs, count, maxcount);
443 if (vector == 0) {
444 mtx_unlock(&msi_lock);
445 free(mirqs, M_MSI);
446 return (ENOSPC);
447 }
448
449 #ifdef ACPI_DMAR
450 mtx_unlock(&msi_lock);
451 error = iommu_alloc_msi_intr(dev, cookies, count);
452 mtx_lock(&msi_lock);
453 if (error == EOPNOTSUPP)
454 error = 0;
455 if (error != 0) {
456 for (i = 0; i < count; i++)
457 apic_free_vector(cpu, vector + i, irqs[i]);
458 free(mirqs, M_MSI);
459 return (error);
460 }
461 for (i = 0; i < count; i++) {
462 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]);
463 msi->msi_remap_cookie = cookies[i];
464 }
465 #endif
466
467 /* Assign IDT vectors and make these messages owned by 'dev'. */
468 fsrc = (struct msi_intsrc *)intr_lookup_source(irqs[0]);
469 for (i = 0; i < count; i++) {
470 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]);
471 msi->msi_cpu = cpu;
472 msi->msi_dev = dev;
473 msi->msi_vector = vector + i;
474 if (bootverbose)
475 printf(
476 "msi: routing MSI IRQ %d to local APIC %u vector %u\n",
477 msi->msi_irq, msi->msi_cpu, msi->msi_vector);
478 msi->msi_first = fsrc;
479 KASSERT(msi->msi_intsrc.is_handlers == 0,
480 ("dead MSI has handlers"));
481 }
482 fsrc->msi_count = count;
483 fsrc->msi_maxcount = maxcount;
484 if (count > 1)
485 bcopy(irqs, mirqs, count * sizeof(*mirqs));
486 fsrc->msi_irqs = mirqs;
487 mtx_unlock(&msi_lock);
488 return (0);
489 }
490
491 int
msi_release(int * irqs,int count)492 msi_release(int *irqs, int count)
493 {
494 struct msi_intsrc *msi, *first;
495 int i;
496
497 mtx_lock(&msi_lock);
498 first = (struct msi_intsrc *)intr_lookup_source(irqs[0]);
499 if (first == NULL) {
500 mtx_unlock(&msi_lock);
501 return (ENOENT);
502 }
503
504 /* Make sure this isn't an MSI-X message. */
505 if (first->msi_msix) {
506 mtx_unlock(&msi_lock);
507 return (EINVAL);
508 }
509
510 /* Make sure this message is allocated to a group. */
511 if (first->msi_first == NULL) {
512 mtx_unlock(&msi_lock);
513 return (ENXIO);
514 }
515
516 /*
517 * Make sure this is the start of a group and that we are releasing
518 * the entire group.
519 */
520 if (first->msi_first != first || first->msi_count != count) {
521 mtx_unlock(&msi_lock);
522 return (EINVAL);
523 }
524 KASSERT(first->msi_dev != NULL, ("unowned group"));
525
526 /* Clear all the extra messages in the group. */
527 for (i = 1; i < count; i++) {
528 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]);
529 KASSERT(msi->msi_first == first, ("message not in group"));
530 KASSERT(msi->msi_dev == first->msi_dev, ("owner mismatch"));
531 #ifdef ACPI_DMAR
532 iommu_unmap_msi_intr(first->msi_dev, msi->msi_remap_cookie);
533 #endif
534 msi->msi_first = NULL;
535 msi->msi_dev = NULL;
536 apic_free_vector(msi->msi_cpu, msi->msi_vector, msi->msi_irq);
537 msi->msi_vector = 0;
538 }
539
540 /* Clear out the first message. */
541 #ifdef ACPI_DMAR
542 mtx_unlock(&msi_lock);
543 iommu_unmap_msi_intr(first->msi_dev, first->msi_remap_cookie);
544 mtx_lock(&msi_lock);
545 #endif
546 first->msi_first = NULL;
547 first->msi_dev = NULL;
548 apic_free_vector(first->msi_cpu, first->msi_vector, first->msi_irq);
549 first->msi_vector = 0;
550 first->msi_count = 0;
551 first->msi_maxcount = 0;
552 free(first->msi_irqs, M_MSI);
553 first->msi_irqs = NULL;
554
555 mtx_unlock(&msi_lock);
556 return (0);
557 }
558
559 int
msi_map(int irq,uint64_t * addr,uint32_t * data)560 msi_map(int irq, uint64_t *addr, uint32_t *data)
561 {
562 struct msi_intsrc *msi;
563 int error;
564 #ifdef ACPI_DMAR
565 struct msi_intsrc *msi1;
566 int i, k;
567 #endif
568
569 mtx_lock(&msi_lock);
570 msi = (struct msi_intsrc *)intr_lookup_source(irq);
571 if (msi == NULL) {
572 mtx_unlock(&msi_lock);
573 return (ENOENT);
574 }
575
576 /* Make sure this message is allocated to a device. */
577 if (msi->msi_dev == NULL) {
578 mtx_unlock(&msi_lock);
579 return (ENXIO);
580 }
581
582 /*
583 * If this message isn't an MSI-X message, make sure it's part
584 * of a group, and switch to the first message in the
585 * group.
586 */
587 if (!msi->msi_msix) {
588 if (msi->msi_first == NULL) {
589 mtx_unlock(&msi_lock);
590 return (ENXIO);
591 }
592 msi = msi->msi_first;
593 }
594
595 #ifdef ACPI_DMAR
596 if (!msi->msi_msix) {
597 for (k = msi->msi_count - 1, i = first_msi_irq; k > 0 &&
598 i < first_msi_irq + num_msi_irqs; i++) {
599 if (i == msi->msi_irq)
600 continue;
601 msi1 = (struct msi_intsrc *)intr_lookup_source(i);
602 if (!msi1->msi_msix && msi1->msi_first == msi) {
603 mtx_unlock(&msi_lock);
604 iommu_map_msi_intr(msi1->msi_dev,
605 msi1->msi_cpu, msi1->msi_vector,
606 msi1->msi_remap_cookie, NULL, NULL);
607 k--;
608 mtx_lock(&msi_lock);
609 }
610 }
611 }
612 mtx_unlock(&msi_lock);
613 error = iommu_map_msi_intr(msi->msi_dev, msi->msi_cpu,
614 msi->msi_vector, msi->msi_remap_cookie, addr, data);
615 #else
616 mtx_unlock(&msi_lock);
617 error = EOPNOTSUPP;
618 #endif
619 if (error == EOPNOTSUPP) {
620 *addr = INTEL_ADDR(msi);
621 *data = INTEL_DATA(msi);
622 error = 0;
623 }
624 return (error);
625 }
626
627 int
msix_alloc(device_t dev,int * irq)628 msix_alloc(device_t dev, int *irq)
629 {
630 struct msi_intsrc *msi;
631 u_int cpu, domain;
632 int i, vector;
633 #ifdef ACPI_DMAR
634 u_int cookie;
635 int error;
636 #endif
637
638 if (!msi_enabled)
639 return (ENXIO);
640
641 if (bus_get_domain(dev, &domain) != 0)
642 domain = 0;
643
644 again:
645 mtx_lock(&msi_lock);
646
647 /* Find a free IRQ. */
648 for (i = first_msi_irq; i < first_msi_irq + num_msi_irqs; i++) {
649 msi = (struct msi_intsrc *)intr_lookup_source(i);
650
651 /* End of allocated sources, so break. */
652 if (msi == NULL)
653 break;
654
655 /* Stop at the first free source. */
656 if (msi->msi_dev == NULL)
657 break;
658 }
659
660 /* Are all IRQs in use? */
661 if (i == first_msi_irq + num_msi_irqs) {
662 mtx_unlock(&msi_lock);
663 return (ENXIO);
664 }
665
666 /* Do we need to create a new source? */
667 if (msi == NULL) {
668 mtx_unlock(&msi_lock);
669
670 /* Create a new source. */
671 msi_create_source();
672 goto again;
673 }
674
675 /* Allocate an IDT vector. */
676 cpu = intr_next_cpu(domain);
677 vector = apic_alloc_vector(cpu, i);
678 if (vector == 0) {
679 mtx_unlock(&msi_lock);
680 return (ENOSPC);
681 }
682
683 msi->msi_dev = dev;
684 #ifdef ACPI_DMAR
685 mtx_unlock(&msi_lock);
686 error = iommu_alloc_msi_intr(dev, &cookie, 1);
687 mtx_lock(&msi_lock);
688 if (error == EOPNOTSUPP)
689 error = 0;
690 if (error != 0) {
691 msi->msi_dev = NULL;
692 apic_free_vector(cpu, vector, i);
693 return (error);
694 }
695 msi->msi_remap_cookie = cookie;
696 #endif
697
698 if (bootverbose)
699 printf("msi: routing MSI-X IRQ %d to local APIC %u vector %u\n",
700 msi->msi_irq, cpu, vector);
701
702 /* Setup source. */
703 msi->msi_cpu = cpu;
704 msi->msi_first = msi;
705 msi->msi_vector = vector;
706 msi->msi_msix = 1;
707 msi->msi_count = 1;
708 msi->msi_maxcount = 1;
709 msi->msi_irqs = NULL;
710
711 KASSERT(msi->msi_intsrc.is_handlers == 0, ("dead MSI-X has handlers"));
712 mtx_unlock(&msi_lock);
713
714 *irq = i;
715 return (0);
716 }
717
718 int
msix_release(int irq)719 msix_release(int irq)
720 {
721 struct msi_intsrc *msi;
722
723 mtx_lock(&msi_lock);
724 msi = (struct msi_intsrc *)intr_lookup_source(irq);
725 if (msi == NULL) {
726 mtx_unlock(&msi_lock);
727 return (ENOENT);
728 }
729
730 /* Make sure this is an MSI-X message. */
731 if (!msi->msi_msix) {
732 mtx_unlock(&msi_lock);
733 return (EINVAL);
734 }
735
736 KASSERT(msi->msi_dev != NULL, ("unowned message"));
737
738 /* Clear out the message. */
739 #ifdef ACPI_DMAR
740 mtx_unlock(&msi_lock);
741 iommu_unmap_msi_intr(msi->msi_dev, msi->msi_remap_cookie);
742 mtx_lock(&msi_lock);
743 #endif
744 msi->msi_first = NULL;
745 msi->msi_dev = NULL;
746 apic_free_vector(msi->msi_cpu, msi->msi_vector, msi->msi_irq);
747 msi->msi_vector = 0;
748 msi->msi_msix = 0;
749 msi->msi_count = 0;
750 msi->msi_maxcount = 0;
751
752 mtx_unlock(&msi_lock);
753 return (0);
754 }
755