1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 1999,2000 Michael Smith
5 * Copyright (c) 2000 BSDi
6 * Copyright (c) 2005 Scott Long
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30 /*-
31 * Copyright (c) 2002 Eric Moore
32 * Copyright (c) 2002, 2004 LSI Logic Corporation
33 * All rights reserved.
34 *
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
37 * are met:
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 * 2. Redistributions in binary form must reproduce the above copyright
41 * notice, this list of conditions and the following disclaimer in the
42 * documentation and/or other materials provided with the distribution.
43 * 3. The party using or redistributing the source code and binary forms
44 * agrees to the disclaimer below and the terms and conditions set forth
45 * herein.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * SUCH DAMAGE.
58 */
59
60 #include <sys/cdefs.h>
61 __FBSDID("$FreeBSD$");
62
63 /*
64 * Driver for the AMI MegaRaid family of controllers.
65 */
66
67 #include <sys/param.h>
68 #include <sys/systm.h>
69 #include <sys/malloc.h>
70 #include <sys/kernel.h>
71 #include <sys/proc.h>
72 #include <sys/sysctl.h>
73
74 #include <sys/bio.h>
75 #include <sys/bus.h>
76 #include <sys/conf.h>
77 #include <sys/stat.h>
78
79 #include <machine/bus.h>
80 #include <machine/cpu.h>
81 #include <machine/resource.h>
82 #include <sys/rman.h>
83
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcivar.h>
86
87 #include <dev/amr/amrio.h>
88 #include <dev/amr/amrreg.h>
89 #include <dev/amr/amrvar.h>
90 #define AMR_DEFINE_TABLES
91 #include <dev/amr/amr_tables.h>
92
93 SYSCTL_NODE(_hw, OID_AUTO, amr, CTLFLAG_RD, 0, "AMR driver parameters");
94
95 static d_open_t amr_open;
96 static d_close_t amr_close;
97 static d_ioctl_t amr_ioctl;
98
99 static struct cdevsw amr_cdevsw = {
100 .d_version = D_VERSION,
101 .d_flags = D_NEEDGIANT,
102 .d_open = amr_open,
103 .d_close = amr_close,
104 .d_ioctl = amr_ioctl,
105 .d_name = "amr",
106 };
107
108 int linux_no_adapter = 0;
109 /*
110 * Initialisation, bus interface.
111 */
112 static void amr_startup(void *arg);
113
114 /*
115 * Command wrappers
116 */
117 static int amr_query_controller(struct amr_softc *sc);
118 static void *amr_enquiry(struct amr_softc *sc, size_t bufsize,
119 u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status);
120 static void amr_completeio(struct amr_command *ac);
121 static int amr_support_ext_cdb(struct amr_softc *sc);
122
123 /*
124 * Command buffer allocation.
125 */
126 static void amr_alloccmd_cluster(struct amr_softc *sc);
127 static void amr_freecmd_cluster(struct amr_command_cluster *acc);
128
129 /*
130 * Command processing.
131 */
132 static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp);
133 static int amr_wait_command(struct amr_command *ac) __unused;
134 static int amr_mapcmd(struct amr_command *ac);
135 static void amr_unmapcmd(struct amr_command *ac);
136 static int amr_start(struct amr_command *ac);
137 static void amr_complete(void *context, ac_qhead_t *head);
138 static void amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
139 static void amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
140 static void amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
141 static void amr_abort_load(struct amr_command *ac);
142
143 /*
144 * Interface-specific shims
145 */
146 static int amr_quartz_submit_command(struct amr_command *ac);
147 static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
148 static int amr_quartz_poll_command(struct amr_command *ac);
149 static int amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac);
150
151 static int amr_std_submit_command(struct amr_command *ac);
152 static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
153 static int amr_std_poll_command(struct amr_command *ac);
154 static void amr_std_attach_mailbox(struct amr_softc *sc);
155
156 #ifdef AMR_BOARD_INIT
157 static int amr_quartz_init(struct amr_softc *sc);
158 static int amr_std_init(struct amr_softc *sc);
159 #endif
160
161 /*
162 * Debugging
163 */
164 static void amr_describe_controller(struct amr_softc *sc);
165 #ifdef AMR_DEBUG
166 #if 0
167 static void amr_printcommand(struct amr_command *ac);
168 #endif
169 #endif
170
171 static void amr_init_sysctl(struct amr_softc *sc);
172 static int amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr,
173 int32_t flag, struct thread *td);
174
175 static MALLOC_DEFINE(M_AMR, "amr", "AMR memory");
176
177 /********************************************************************************
178 ********************************************************************************
179 Inline Glue
180 ********************************************************************************
181 ********************************************************************************/
182
183 /********************************************************************************
184 ********************************************************************************
185 Public Interfaces
186 ********************************************************************************
187 ********************************************************************************/
188
189 /********************************************************************************
190 * Initialise the controller and softc.
191 */
192 int
amr_attach(struct amr_softc * sc)193 amr_attach(struct amr_softc *sc)
194 {
195 device_t child;
196
197 debug_called(1);
198
199 /*
200 * Initialise per-controller queues.
201 */
202 amr_init_qhead(&sc->amr_freecmds);
203 amr_init_qhead(&sc->amr_ready);
204 TAILQ_INIT(&sc->amr_cmd_clusters);
205 bioq_init(&sc->amr_bioq);
206
207 debug(2, "queue init done");
208
209 /*
210 * Configure for this controller type.
211 */
212 if (AMR_IS_QUARTZ(sc)) {
213 sc->amr_submit_command = amr_quartz_submit_command;
214 sc->amr_get_work = amr_quartz_get_work;
215 sc->amr_poll_command = amr_quartz_poll_command;
216 sc->amr_poll_command1 = amr_quartz_poll_command1;
217 } else {
218 sc->amr_submit_command = amr_std_submit_command;
219 sc->amr_get_work = amr_std_get_work;
220 sc->amr_poll_command = amr_std_poll_command;
221 amr_std_attach_mailbox(sc);
222 }
223
224 #ifdef AMR_BOARD_INIT
225 if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc)))
226 return(ENXIO);
227 #endif
228
229 /*
230 * Allocate initial commands.
231 */
232 amr_alloccmd_cluster(sc);
233
234 /*
235 * Quiz controller for features and limits.
236 */
237 if (amr_query_controller(sc))
238 return(ENXIO);
239
240 debug(2, "controller query complete");
241
242 /*
243 * preallocate the remaining commands.
244 */
245 while (sc->amr_nextslot < sc->amr_maxio)
246 amr_alloccmd_cluster(sc);
247
248 /*
249 * Setup sysctls.
250 */
251 amr_init_sysctl(sc);
252
253 /*
254 * Attach our 'real' SCSI channels to CAM.
255 */
256 child = device_add_child(sc->amr_dev, "amrp", -1);
257 sc->amr_pass = child;
258 if (child != NULL) {
259 device_set_softc(child, sc);
260 device_set_desc(child, "SCSI Passthrough Bus");
261 bus_generic_attach(sc->amr_dev);
262 }
263
264 /*
265 * Create the control device.
266 */
267 sc->amr_dev_t = make_dev(&amr_cdevsw, device_get_unit(sc->amr_dev), UID_ROOT, GID_OPERATOR,
268 S_IRUSR | S_IWUSR, "amr%d", device_get_unit(sc->amr_dev));
269 sc->amr_dev_t->si_drv1 = sc;
270 linux_no_adapter++;
271 if (device_get_unit(sc->amr_dev) == 0)
272 make_dev_alias(sc->amr_dev_t, "megadev0");
273
274 /*
275 * Schedule ourselves to bring the controller up once interrupts are
276 * available.
277 */
278 bzero(&sc->amr_ich, sizeof(struct intr_config_hook));
279 sc->amr_ich.ich_func = amr_startup;
280 sc->amr_ich.ich_arg = sc;
281 if (config_intrhook_establish(&sc->amr_ich) != 0) {
282 device_printf(sc->amr_dev, "can't establish configuration hook\n");
283 return(ENOMEM);
284 }
285
286 /*
287 * Print a little information about the controller.
288 */
289 amr_describe_controller(sc);
290
291 debug(2, "attach complete");
292 return(0);
293 }
294
295 /********************************************************************************
296 * Locate disk resources and attach children to them.
297 */
298 static void
amr_startup(void * arg)299 amr_startup(void *arg)
300 {
301 struct amr_softc *sc = (struct amr_softc *)arg;
302 struct amr_logdrive *dr;
303 int i, error;
304
305 debug_called(1);
306
307 /* get up-to-date drive information */
308 if (amr_query_controller(sc)) {
309 device_printf(sc->amr_dev, "can't scan controller for drives\n");
310 return;
311 }
312
313 /* iterate over available drives */
314 for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) {
315 /* are we already attached to this drive? */
316 if (dr->al_disk == 0) {
317 /* generate geometry information */
318 if (dr->al_size > 0x200000) { /* extended translation? */
319 dr->al_heads = 255;
320 dr->al_sectors = 63;
321 } else {
322 dr->al_heads = 64;
323 dr->al_sectors = 32;
324 }
325 dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors);
326
327 dr->al_disk = device_add_child(sc->amr_dev, NULL, -1);
328 if (dr->al_disk == 0)
329 device_printf(sc->amr_dev, "device_add_child failed\n");
330 device_set_ivars(dr->al_disk, dr);
331 }
332 }
333
334 if ((error = bus_generic_attach(sc->amr_dev)) != 0)
335 device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error);
336
337 /* mark controller back up */
338 sc->amr_state &= ~AMR_STATE_SHUTDOWN;
339
340 /* interrupts will be enabled before we do anything more */
341 sc->amr_state |= AMR_STATE_INTEN;
342
343 /* pull ourselves off the intrhook chain */
344 if (sc->amr_ich.ich_func)
345 config_intrhook_disestablish(&sc->amr_ich);
346 sc->amr_ich.ich_func = NULL;
347
348 return;
349 }
350
351 static void
amr_init_sysctl(struct amr_softc * sc)352 amr_init_sysctl(struct amr_softc *sc)
353 {
354
355 SYSCTL_ADD_INT(device_get_sysctl_ctx(sc->amr_dev),
356 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->amr_dev)),
357 OID_AUTO, "allow_volume_configure", CTLFLAG_RW, &sc->amr_allow_vol_config, 0,
358 "");
359 SYSCTL_ADD_INT(device_get_sysctl_ctx(sc->amr_dev),
360 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->amr_dev)),
361 OID_AUTO, "nextslot", CTLFLAG_RD, &sc->amr_nextslot, 0,
362 "");
363 SYSCTL_ADD_INT(device_get_sysctl_ctx(sc->amr_dev),
364 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->amr_dev)),
365 OID_AUTO, "busyslots", CTLFLAG_RD, &sc->amr_busyslots, 0,
366 "");
367 SYSCTL_ADD_INT(device_get_sysctl_ctx(sc->amr_dev),
368 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->amr_dev)),
369 OID_AUTO, "maxio", CTLFLAG_RD, &sc->amr_maxio, 0,
370 "");
371 }
372
373
374 /*******************************************************************************
375 * Free resources associated with a controller instance
376 */
377 void
amr_free(struct amr_softc * sc)378 amr_free(struct amr_softc *sc)
379 {
380 struct amr_command_cluster *acc;
381
382 /* detach from CAM */
383 if (sc->amr_pass != NULL)
384 device_delete_child(sc->amr_dev, sc->amr_pass);
385
386 /* throw away any command buffers */
387 while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) {
388 TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link);
389 amr_freecmd_cluster(acc);
390 }
391
392 /* destroy control device */
393 if( sc->amr_dev_t != (struct cdev *)NULL)
394 destroy_dev(sc->amr_dev_t);
395
396 if (mtx_initialized(&sc->amr_hw_lock))
397 mtx_destroy(&sc->amr_hw_lock);
398
399 if (mtx_initialized(&sc->amr_list_lock))
400 mtx_destroy(&sc->amr_list_lock);
401 }
402
403 /*******************************************************************************
404 * Receive a bio structure from a child device and queue it on a particular
405 * disk resource, then poke the disk resource to start as much work as it can.
406 */
407 int
amr_submit_bio(struct amr_softc * sc,struct bio * bio)408 amr_submit_bio(struct amr_softc *sc, struct bio *bio)
409 {
410 debug_called(2);
411
412 mtx_lock(&sc->amr_list_lock);
413 amr_enqueue_bio(sc, bio);
414 amr_startio(sc);
415 mtx_unlock(&sc->amr_list_lock);
416 return(0);
417 }
418
419 /********************************************************************************
420 * Accept an open operation on the control device.
421 */
422 static int
amr_open(struct cdev * dev,int flags,int fmt,struct thread * td)423 amr_open(struct cdev *dev, int flags, int fmt, struct thread *td)
424 {
425 int unit = dev2unit(dev);
426 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
427
428 debug_called(1);
429
430 sc->amr_state |= AMR_STATE_OPEN;
431 return(0);
432 }
433
434 #ifdef LSI
435 static int
amr_del_ld(struct amr_softc * sc,int drv_no,int status)436 amr_del_ld(struct amr_softc *sc, int drv_no, int status)
437 {
438
439 debug_called(1);
440
441 sc->amr_state &= ~AMR_STATE_QUEUE_FRZN;
442 sc->amr_state &= ~AMR_STATE_LD_DELETE;
443 sc->amr_state |= AMR_STATE_REMAP_LD;
444 debug(1, "State Set");
445
446 if (!status) {
447 debug(1, "disk begin destroyed %d",drv_no);
448 if (--amr_disks_registered == 0)
449 cdevsw_remove(&amrddisk_cdevsw);
450 debug(1, "disk begin destroyed success");
451 }
452 return 0;
453 }
454
455 static int
amr_prepare_ld_delete(struct amr_softc * sc)456 amr_prepare_ld_delete(struct amr_softc *sc)
457 {
458
459 debug_called(1);
460 if (sc->ld_del_supported == 0)
461 return(ENOIOCTL);
462
463 sc->amr_state |= AMR_STATE_QUEUE_FRZN;
464 sc->amr_state |= AMR_STATE_LD_DELETE;
465
466 /* 5 minutes for the all the commands to be flushed.*/
467 tsleep((void *)&sc->ld_del_supported, PCATCH | PRIBIO,"delete_logical_drv",hz * 60 * 1);
468 if ( sc->amr_busyslots )
469 return(ENOIOCTL);
470
471 return 0;
472 }
473 #endif
474
475 /********************************************************************************
476 * Accept the last close on the control device.
477 */
478 static int
amr_close(struct cdev * dev,int flags,int fmt,struct thread * td)479 amr_close(struct cdev *dev, int flags, int fmt, struct thread *td)
480 {
481 int unit = dev2unit(dev);
482 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
483
484 debug_called(1);
485
486 sc->amr_state &= ~AMR_STATE_OPEN;
487 return (0);
488 }
489
490 /********************************************************************************
491 * Handle controller-specific control operations.
492 */
493 static void
amr_rescan_drives(struct cdev * dev)494 amr_rescan_drives(struct cdev *dev)
495 {
496 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1;
497 int i, error = 0;
498
499 sc->amr_state |= AMR_STATE_REMAP_LD;
500 while (sc->amr_busyslots) {
501 device_printf(sc->amr_dev, "idle controller\n");
502 amr_done(sc);
503 }
504
505 /* mark ourselves as in-shutdown */
506 sc->amr_state |= AMR_STATE_SHUTDOWN;
507
508 /* flush controller */
509 device_printf(sc->amr_dev, "flushing cache...");
510 printf("%s\n", amr_flush(sc) ? "failed" : "done");
511
512 /* delete all our child devices */
513 for(i = 0 ; i < AMR_MAXLD; i++) {
514 if(sc->amr_drive[i].al_disk != 0) {
515 if((error = device_delete_child(sc->amr_dev,
516 sc->amr_drive[i].al_disk)) != 0)
517 goto shutdown_out;
518
519 sc->amr_drive[i].al_disk = 0;
520 }
521 }
522
523 shutdown_out:
524 amr_startup(sc);
525 }
526
527 /*
528 * Bug-for-bug compatibility with Linux!
529 * Some apps will send commands with inlen and outlen set to 0,
530 * even though they expect data to be transferred to them from the
531 * card. Linux accidentally allows this by allocating a 4KB
532 * buffer for the transfer anyways, but it then throws it away
533 * without copying it back to the app.
534 *
535 * The amr(4) firmware relies on this feature. In fact, it assumes
536 * the buffer is always a power of 2 up to a max of 64k. There is
537 * also at least one case where it assumes a buffer less than 16k is
538 * greater than 16k. However, forcing all buffers to a size of 32k
539 * causes stalls in the firmware. Force each command smaller than
540 * 64k up to the next power of two except that commands between 8k
541 * and 16k are rounded up to 32k instead of 16k.
542 */
543 static unsigned long
amr_ioctl_buffer_length(unsigned long len)544 amr_ioctl_buffer_length(unsigned long len)
545 {
546
547 if (len <= 4 * 1024)
548 return (4 * 1024);
549 if (len <= 8 * 1024)
550 return (8 * 1024);
551 if (len <= 32 * 1024)
552 return (32 * 1024);
553 if (len <= 64 * 1024)
554 return (64 * 1024);
555 return (len);
556 }
557
558 int
amr_linux_ioctl_int(struct cdev * dev,u_long cmd,caddr_t addr,int32_t flag,struct thread * td)559 amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag,
560 struct thread *td)
561 {
562 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1;
563 struct amr_command *ac;
564 struct amr_mailbox *mb;
565 struct amr_linux_ioctl ali;
566 void *dp, *temp;
567 int error;
568 int len, ac_flags = 0;
569 int logical_drives_changed = 0;
570 u_int32_t linux_version = 0x02100000;
571 u_int8_t status;
572 struct amr_passthrough *ap; /* 60 bytes */
573
574 error = 0;
575 dp = NULL;
576 ac = NULL;
577 ap = NULL;
578
579 if ((error = copyin(addr, &ali, sizeof(ali))) != 0)
580 return (error);
581 switch (ali.ui.fcs.opcode) {
582 case 0x82:
583 switch(ali.ui.fcs.subopcode) {
584 case 'e':
585 copyout(&linux_version, (void *)(uintptr_t)ali.data,
586 sizeof(linux_version));
587 error = 0;
588 break;
589
590 case 'm':
591 copyout(&linux_no_adapter, (void *)(uintptr_t)ali.data,
592 sizeof(linux_no_adapter));
593 td->td_retval[0] = linux_no_adapter;
594 error = 0;
595 break;
596
597 default:
598 printf("Unknown subopcode\n");
599 error = ENOIOCTL;
600 break;
601 }
602 break;
603
604 case 0x80:
605 case 0x81:
606 if (ali.ui.fcs.opcode == 0x80)
607 len = max(ali.outlen, ali.inlen);
608 else
609 len = ali.ui.fcs.length;
610
611 mb = (void *)&ali.mbox[0];
612
613 if ((ali.mbox[0] == FC_DEL_LOGDRV && ali.mbox[2] == OP_DEL_LOGDRV) || /* delete */
614 (ali.mbox[0] == AMR_CMD_CONFIG && ali.mbox[2] == 0x0d)) { /* create */
615 if (sc->amr_allow_vol_config == 0) {
616 error = EPERM;
617 break;
618 }
619 logical_drives_changed = 1;
620 }
621
622 if (ali.mbox[0] == AMR_CMD_PASS) {
623 mtx_lock(&sc->amr_list_lock);
624 while ((ac = amr_alloccmd(sc)) == NULL)
625 msleep(sc, &sc->amr_list_lock, PPAUSE, "amrioc", hz);
626 mtx_unlock(&sc->amr_list_lock);
627 ap = &ac->ac_ccb->ccb_pthru;
628
629 error = copyin((void *)(uintptr_t)mb->mb_physaddr, ap,
630 sizeof(struct amr_passthrough));
631 if (error)
632 break;
633
634 if (ap->ap_data_transfer_length)
635 dp = malloc(ap->ap_data_transfer_length, M_AMR,
636 M_WAITOK | M_ZERO);
637
638 if (ali.inlen) {
639 error = copyin((void *)(uintptr_t)ap->ap_data_transfer_address,
640 dp, ap->ap_data_transfer_length);
641 if (error)
642 break;
643 }
644
645 ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT|AMR_CMD_CCB;
646 bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox));
647 ac->ac_mailbox.mb_command = AMR_CMD_PASS;
648 ac->ac_flags = ac_flags;
649
650 ac->ac_data = dp;
651 ac->ac_length = ap->ap_data_transfer_length;
652 temp = (void *)(uintptr_t)ap->ap_data_transfer_address;
653
654 mtx_lock(&sc->amr_list_lock);
655 error = amr_wait_command(ac);
656 mtx_unlock(&sc->amr_list_lock);
657 if (error)
658 break;
659
660 status = ac->ac_status;
661 error = copyout(&status, &((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_scsi_status, sizeof(status));
662 if (error)
663 break;
664
665 if (ali.outlen) {
666 error = copyout(dp, temp, ap->ap_data_transfer_length);
667 if (error)
668 break;
669 }
670 error = copyout(ap->ap_request_sense_area, ((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_request_sense_area, ap->ap_request_sense_length);
671 if (error)
672 break;
673
674 error = 0;
675 break;
676 } else if (ali.mbox[0] == AMR_CMD_PASS_64) {
677 printf("No AMR_CMD_PASS_64\n");
678 error = ENOIOCTL;
679 break;
680 } else if (ali.mbox[0] == AMR_CMD_EXTPASS) {
681 printf("No AMR_CMD_EXTPASS\n");
682 error = ENOIOCTL;
683 break;
684 } else {
685 len = amr_ioctl_buffer_length(imax(ali.inlen, ali.outlen));
686
687 dp = malloc(len, M_AMR, M_WAITOK | M_ZERO);
688
689 if (ali.inlen) {
690 error = copyin((void *)(uintptr_t)mb->mb_physaddr, dp, len);
691 if (error)
692 break;
693 }
694
695 mtx_lock(&sc->amr_list_lock);
696 while ((ac = amr_alloccmd(sc)) == NULL)
697 msleep(sc, &sc->amr_list_lock, PPAUSE, "amrioc", hz);
698
699 ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT;
700 bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox));
701 bcopy(&ali.mbox[0], &ac->ac_mailbox, sizeof(ali.mbox));
702
703 ac->ac_length = len;
704 ac->ac_data = dp;
705 ac->ac_flags = ac_flags;
706
707 error = amr_wait_command(ac);
708 mtx_unlock(&sc->amr_list_lock);
709 if (error)
710 break;
711
712 status = ac->ac_status;
713 error = copyout(&status, &((struct amr_mailbox *)&((struct amr_linux_ioctl *)addr)->mbox[0])->mb_status, sizeof(status));
714 if (ali.outlen) {
715 error = copyout(dp, (void *)(uintptr_t)mb->mb_physaddr, ali.outlen);
716 if (error)
717 break;
718 }
719
720 error = 0;
721 if (logical_drives_changed)
722 amr_rescan_drives(dev);
723 break;
724 }
725 break;
726
727 default:
728 debug(1, "unknown linux ioctl 0x%lx", cmd);
729 printf("unknown linux ioctl 0x%lx\n", cmd);
730 error = ENOIOCTL;
731 break;
732 }
733
734 /*
735 * At this point, we know that there is a lock held and that these
736 * objects have been allocated.
737 */
738 mtx_lock(&sc->amr_list_lock);
739 if (ac != NULL)
740 amr_releasecmd(ac);
741 mtx_unlock(&sc->amr_list_lock);
742 if (dp != NULL)
743 free(dp, M_AMR);
744 return(error);
745 }
746
747 static int
amr_ioctl(struct cdev * dev,u_long cmd,caddr_t addr,int32_t flag,struct thread * td)748 amr_ioctl(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, struct thread *td)
749 {
750 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1;
751 union {
752 void *_p;
753 struct amr_user_ioctl *au;
754 #ifdef AMR_IO_COMMAND32
755 struct amr_user_ioctl32 *au32;
756 #endif
757 int *result;
758 } arg;
759 struct amr_command *ac;
760 struct amr_mailbox_ioctl *mbi;
761 void *dp, *au_buffer;
762 unsigned long au_length, real_length;
763 unsigned char *au_cmd;
764 int *au_statusp;
765 int error;
766 struct amr_passthrough *ap; /* 60 bytes */
767 int logical_drives_changed = 0;
768
769 debug_called(1);
770
771 arg._p = (void *)addr;
772
773 error = 0;
774 dp = NULL;
775 ac = NULL;
776 ap = NULL;
777
778 switch(cmd) {
779
780 case AMR_IO_VERSION:
781 debug(1, "AMR_IO_VERSION");
782 *arg.result = AMR_IO_VERSION_NUMBER;
783 return(0);
784
785 #ifdef AMR_IO_COMMAND32
786 /*
787 * Accept ioctl-s from 32-bit binaries on non-32-bit
788 * platforms, such as AMD. LSI's MEGAMGR utility is
789 * the only example known today... -mi
790 */
791 case AMR_IO_COMMAND32:
792 debug(1, "AMR_IO_COMMAND32 0x%x", arg.au32->au_cmd[0]);
793 au_cmd = arg.au32->au_cmd;
794 au_buffer = (void *)(u_int64_t)arg.au32->au_buffer;
795 au_length = arg.au32->au_length;
796 au_statusp = &arg.au32->au_status;
797 break;
798 #endif
799
800 case AMR_IO_COMMAND:
801 debug(1, "AMR_IO_COMMAND 0x%x", arg.au->au_cmd[0]);
802 au_cmd = arg.au->au_cmd;
803 au_buffer = (void *)arg.au->au_buffer;
804 au_length = arg.au->au_length;
805 au_statusp = &arg.au->au_status;
806 break;
807
808 case 0xc0046d00:
809 case 0xc06e6d00: /* Linux emulation */
810 {
811 devclass_t devclass;
812 struct amr_linux_ioctl ali;
813 int adapter, error;
814
815 devclass = devclass_find("amr");
816 if (devclass == NULL)
817 return (ENOENT);
818
819 error = copyin(addr, &ali, sizeof(ali));
820 if (error)
821 return (error);
822 if (ali.ui.fcs.opcode == 0x82)
823 adapter = 0;
824 else
825 adapter = (ali.ui.fcs.adapno) ^ 'm' << 8;
826
827 sc = devclass_get_softc(devclass, adapter);
828 if (sc == NULL)
829 return (ENOENT);
830
831 return (amr_linux_ioctl_int(sc->amr_dev_t, cmd, addr, 0, td));
832 }
833 default:
834 debug(1, "unknown ioctl 0x%lx", cmd);
835 return(ENOIOCTL);
836 }
837
838 if ((au_cmd[0] == FC_DEL_LOGDRV && au_cmd[1] == OP_DEL_LOGDRV) || /* delete */
839 (au_cmd[0] == AMR_CMD_CONFIG && au_cmd[1] == 0x0d)) { /* create */
840 if (sc->amr_allow_vol_config == 0) {
841 error = EPERM;
842 goto out;
843 }
844 logical_drives_changed = 1;
845 #ifdef LSI
846 if ((error = amr_prepare_ld_delete(sc)) != 0)
847 return (error);
848 #endif
849 }
850
851 /* handle inbound data buffer */
852 real_length = amr_ioctl_buffer_length(au_length);
853 dp = malloc(real_length, M_AMR, M_WAITOK|M_ZERO);
854 if (au_length != 0 && au_cmd[0] != 0x06) {
855 if ((error = copyin(au_buffer, dp, au_length)) != 0) {
856 free(dp, M_AMR);
857 return (error);
858 }
859 debug(2, "copyin %ld bytes from %p -> %p", au_length, au_buffer, dp);
860 }
861
862 /* Allocate this now before the mutex gets held */
863
864 mtx_lock(&sc->amr_list_lock);
865 while ((ac = amr_alloccmd(sc)) == NULL)
866 msleep(sc, &sc->amr_list_lock, PPAUSE, "amrioc", hz);
867
868 /* handle SCSI passthrough command */
869 if (au_cmd[0] == AMR_CMD_PASS) {
870 int len;
871
872 ap = &ac->ac_ccb->ccb_pthru;
873 bzero(ap, sizeof(struct amr_passthrough));
874
875 /* copy cdb */
876 len = au_cmd[2];
877 ap->ap_cdb_length = len;
878 bcopy(au_cmd + 3, ap->ap_cdb, len);
879
880 /* build passthrough */
881 ap->ap_timeout = au_cmd[len + 3] & 0x07;
882 ap->ap_ars = (au_cmd[len + 3] & 0x08) ? 1 : 0;
883 ap->ap_islogical = (au_cmd[len + 3] & 0x80) ? 1 : 0;
884 ap->ap_logical_drive_no = au_cmd[len + 4];
885 ap->ap_channel = au_cmd[len + 5];
886 ap->ap_scsi_id = au_cmd[len + 6];
887 ap->ap_request_sense_length = 14;
888 ap->ap_data_transfer_length = au_length;
889 /* XXX what about the request-sense area? does the caller want it? */
890
891 /* build command */
892 ac->ac_mailbox.mb_command = AMR_CMD_PASS;
893 ac->ac_flags = AMR_CMD_CCB;
894
895 } else {
896 /* direct command to controller */
897 mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox;
898
899 /* copy pertinent mailbox items */
900 mbi->mb_command = au_cmd[0];
901 mbi->mb_channel = au_cmd[1];
902 mbi->mb_param = au_cmd[2];
903 mbi->mb_pad[0] = au_cmd[3];
904 mbi->mb_drive = au_cmd[4];
905 ac->ac_flags = 0;
906 }
907
908 /* build the command */
909 ac->ac_data = dp;
910 ac->ac_length = real_length;
911 ac->ac_flags |= AMR_CMD_DATAIN|AMR_CMD_DATAOUT;
912
913 /* run the command */
914 error = amr_wait_command(ac);
915 mtx_unlock(&sc->amr_list_lock);
916 if (error)
917 goto out;
918
919 /* copy out data and set status */
920 if (au_length != 0) {
921 error = copyout(dp, au_buffer, au_length);
922 }
923 debug(2, "copyout %ld bytes from %p -> %p", au_length, dp, au_buffer);
924 debug(2, "%p status 0x%x", dp, ac->ac_status);
925 *au_statusp = ac->ac_status;
926
927 out:
928 /*
929 * At this point, we know that there is a lock held and that these
930 * objects have been allocated.
931 */
932 mtx_lock(&sc->amr_list_lock);
933 if (ac != NULL)
934 amr_releasecmd(ac);
935 mtx_unlock(&sc->amr_list_lock);
936 if (dp != NULL)
937 free(dp, M_AMR);
938
939 #ifndef LSI
940 if (logical_drives_changed)
941 amr_rescan_drives(dev);
942 #endif
943
944 return(error);
945 }
946
947 /********************************************************************************
948 ********************************************************************************
949 Command Wrappers
950 ********************************************************************************
951 ********************************************************************************/
952
953 /********************************************************************************
954 * Interrogate the controller for the operational parameters we require.
955 */
956 static int
amr_query_controller(struct amr_softc * sc)957 amr_query_controller(struct amr_softc *sc)
958 {
959 struct amr_enquiry3 *aex;
960 struct amr_prodinfo *ap;
961 struct amr_enquiry *ae;
962 int ldrv;
963 int status;
964
965 /*
966 * Greater than 10 byte cdb support
967 */
968 sc->support_ext_cdb = amr_support_ext_cdb(sc);
969
970 if(sc->support_ext_cdb) {
971 debug(2,"supports extended CDBs.");
972 }
973
974 /*
975 * Try to issue an ENQUIRY3 command
976 */
977 if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3,
978 AMR_CONFIG_ENQ3_SOLICITED_FULL, &status)) != NULL) {
979
980 /*
981 * Fetch current state of logical drives.
982 */
983 for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) {
984 sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv];
985 sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv];
986 sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv];
987 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
988 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
989 }
990 free(aex, M_AMR);
991
992 /*
993 * Get product info for channel count.
994 */
995 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) == NULL) {
996 device_printf(sc->amr_dev, "can't obtain product data from controller\n");
997 return(1);
998 }
999 sc->amr_maxdrives = 40;
1000 sc->amr_maxchan = ap->ap_nschan;
1001 sc->amr_maxio = ap->ap_maxio;
1002 sc->amr_type |= AMR_TYPE_40LD;
1003 free(ap, M_AMR);
1004
1005 ap = amr_enquiry(sc, 0, FC_DEL_LOGDRV, OP_SUP_DEL_LOGDRV, 0, &status);
1006 if (ap != NULL)
1007 free(ap, M_AMR);
1008 if (!status) {
1009 sc->amr_ld_del_supported = 1;
1010 device_printf(sc->amr_dev, "delete logical drives supported by controller\n");
1011 }
1012 } else {
1013
1014 /* failed, try the 8LD ENQUIRY commands */
1015 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) == NULL) {
1016 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) == NULL) {
1017 device_printf(sc->amr_dev, "can't obtain configuration data from controller\n");
1018 return(1);
1019 }
1020 ae->ae_signature = 0;
1021 }
1022
1023 /*
1024 * Fetch current state of logical drives.
1025 */
1026 for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) {
1027 sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv];
1028 sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv];
1029 sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv];
1030 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
1031 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
1032 }
1033
1034 sc->amr_maxdrives = 8;
1035 sc->amr_maxchan = ae->ae_adapter.aa_channels;
1036 sc->amr_maxio = ae->ae_adapter.aa_maxio;
1037 free(ae, M_AMR);
1038 }
1039
1040 /*
1041 * Mark remaining drives as unused.
1042 */
1043 for (; ldrv < AMR_MAXLD; ldrv++)
1044 sc->amr_drive[ldrv].al_size = 0xffffffff;
1045
1046 /*
1047 * Cap the maximum number of outstanding I/Os. AMI's Linux driver doesn't trust
1048 * the controller's reported value, and lockups have been seen when we do.
1049 */
1050 sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD);
1051
1052 return(0);
1053 }
1054
1055 /********************************************************************************
1056 * Run a generic enquiry-style command.
1057 */
1058 static void *
amr_enquiry(struct amr_softc * sc,size_t bufsize,u_int8_t cmd,u_int8_t cmdsub,u_int8_t cmdqual,int * status)1059 amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status)
1060 {
1061 struct amr_command *ac;
1062 void *result;
1063 u_int8_t *mbox;
1064 int error;
1065
1066 debug_called(1);
1067
1068 error = 1;
1069 result = NULL;
1070
1071 /* get ourselves a command buffer */
1072 mtx_lock(&sc->amr_list_lock);
1073 ac = amr_alloccmd(sc);
1074 mtx_unlock(&sc->amr_list_lock);
1075 if (ac == NULL)
1076 goto out;
1077 /* allocate the response structure */
1078 if ((result = malloc(bufsize, M_AMR, M_ZERO|M_NOWAIT)) == NULL)
1079 goto out;
1080 /* set command flags */
1081
1082 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAIN;
1083
1084 /* point the command at our data */
1085 ac->ac_data = result;
1086 ac->ac_length = bufsize;
1087
1088 /* build the command proper */
1089 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */
1090 mbox[0] = cmd;
1091 mbox[2] = cmdsub;
1092 mbox[3] = cmdqual;
1093 *status = 0;
1094
1095 /* can't assume that interrupts are going to work here, so play it safe */
1096 if (sc->amr_poll_command(ac))
1097 goto out;
1098 error = ac->ac_status;
1099 *status = ac->ac_status;
1100
1101 out:
1102 mtx_lock(&sc->amr_list_lock);
1103 if (ac != NULL)
1104 amr_releasecmd(ac);
1105 mtx_unlock(&sc->amr_list_lock);
1106 if ((error != 0) && (result != NULL)) {
1107 free(result, M_AMR);
1108 result = NULL;
1109 }
1110 return(result);
1111 }
1112
1113 /********************************************************************************
1114 * Flush the controller's internal cache, return status.
1115 */
1116 int
amr_flush(struct amr_softc * sc)1117 amr_flush(struct amr_softc *sc)
1118 {
1119 struct amr_command *ac;
1120 int error;
1121
1122 /* get ourselves a command buffer */
1123 error = 1;
1124 mtx_lock(&sc->amr_list_lock);
1125 ac = amr_alloccmd(sc);
1126 mtx_unlock(&sc->amr_list_lock);
1127 if (ac == NULL)
1128 goto out;
1129 /* set command flags */
1130 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
1131
1132 /* build the command proper */
1133 ac->ac_mailbox.mb_command = AMR_CMD_FLUSH;
1134
1135 /* we have to poll, as the system may be going down or otherwise damaged */
1136 if (sc->amr_poll_command(ac))
1137 goto out;
1138 error = ac->ac_status;
1139
1140 out:
1141 mtx_lock(&sc->amr_list_lock);
1142 if (ac != NULL)
1143 amr_releasecmd(ac);
1144 mtx_unlock(&sc->amr_list_lock);
1145 return(error);
1146 }
1147
1148 /********************************************************************************
1149 * Detect extented cdb >> greater than 10 byte cdb support
1150 * returns '1' means this support exist
1151 * returns '0' means this support doesn't exist
1152 */
1153 static int
amr_support_ext_cdb(struct amr_softc * sc)1154 amr_support_ext_cdb(struct amr_softc *sc)
1155 {
1156 struct amr_command *ac;
1157 u_int8_t *mbox;
1158 int error;
1159
1160 /* get ourselves a command buffer */
1161 error = 0;
1162 mtx_lock(&sc->amr_list_lock);
1163 ac = amr_alloccmd(sc);
1164 mtx_unlock(&sc->amr_list_lock);
1165 if (ac == NULL)
1166 goto out;
1167 /* set command flags */
1168 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
1169
1170 /* build the command proper */
1171 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */
1172 mbox[0] = 0xA4;
1173 mbox[2] = 0x16;
1174
1175
1176 /* we have to poll, as the system may be going down or otherwise damaged */
1177 if (sc->amr_poll_command(ac))
1178 goto out;
1179 if( ac->ac_status == AMR_STATUS_SUCCESS ) {
1180 error = 1;
1181 }
1182
1183 out:
1184 mtx_lock(&sc->amr_list_lock);
1185 if (ac != NULL)
1186 amr_releasecmd(ac);
1187 mtx_unlock(&sc->amr_list_lock);
1188 return(error);
1189 }
1190
1191 /********************************************************************************
1192 * Try to find I/O work for the controller from one or more of the work queues.
1193 *
1194 * We make the assumption that if the controller is not ready to take a command
1195 * at some given time, it will generate an interrupt at some later time when
1196 * it is.
1197 */
1198 void
amr_startio(struct amr_softc * sc)1199 amr_startio(struct amr_softc *sc)
1200 {
1201 struct amr_command *ac;
1202
1203 /* spin until something prevents us from doing any work */
1204 for (;;) {
1205
1206 /* Don't bother to queue commands no bounce buffers are available. */
1207 if (sc->amr_state & AMR_STATE_QUEUE_FRZN)
1208 break;
1209
1210 /* try to get a ready command */
1211 ac = amr_dequeue_ready(sc);
1212
1213 /* if that failed, build a command from a bio */
1214 if (ac == NULL)
1215 (void)amr_bio_command(sc, &ac);
1216
1217 /* if that failed, build a command from a ccb */
1218 if ((ac == NULL) && (sc->amr_cam_command != NULL))
1219 sc->amr_cam_command(sc, &ac);
1220
1221 /* if we don't have anything to do, give up */
1222 if (ac == NULL)
1223 break;
1224
1225 /* try to give the command to the controller; if this fails save it for later and give up */
1226 if (amr_start(ac)) {
1227 debug(2, "controller busy, command deferred");
1228 amr_requeue_ready(ac); /* XXX schedule retry very soon? */
1229 break;
1230 }
1231 }
1232 }
1233
1234 /********************************************************************************
1235 * Handle completion of an I/O command.
1236 */
1237 static void
amr_completeio(struct amr_command * ac)1238 amr_completeio(struct amr_command *ac)
1239 {
1240 struct amrd_softc *sc = ac->ac_bio->bio_disk->d_drv1;
1241 static struct timeval lastfail;
1242 static int curfail;
1243
1244 if (ac->ac_status != AMR_STATUS_SUCCESS) { /* could be more verbose here? */
1245 ac->ac_bio->bio_error = EIO;
1246 ac->ac_bio->bio_flags |= BIO_ERROR;
1247
1248 if (ppsratecheck(&lastfail, &curfail, 1))
1249 device_printf(sc->amrd_dev, "I/O error - 0x%x\n", ac->ac_status);
1250 /* amr_printcommand(ac);*/
1251 }
1252 amrd_intr(ac->ac_bio);
1253 mtx_lock(&ac->ac_sc->amr_list_lock);
1254 amr_releasecmd(ac);
1255 mtx_unlock(&ac->ac_sc->amr_list_lock);
1256 }
1257
1258 /********************************************************************************
1259 ********************************************************************************
1260 Command Processing
1261 ********************************************************************************
1262 ********************************************************************************/
1263
1264 /********************************************************************************
1265 * Convert a bio off the top of the bio queue into a command.
1266 */
1267 static int
amr_bio_command(struct amr_softc * sc,struct amr_command ** acp)1268 amr_bio_command(struct amr_softc *sc, struct amr_command **acp)
1269 {
1270 struct amr_command *ac;
1271 struct amrd_softc *amrd;
1272 struct bio *bio;
1273 int error;
1274 int blkcount;
1275 int driveno;
1276 int cmd;
1277
1278 ac = NULL;
1279 error = 0;
1280
1281 /* get a command */
1282 if ((ac = amr_alloccmd(sc)) == NULL)
1283 return (ENOMEM);
1284
1285 /* get a bio to work on */
1286 if ((bio = amr_dequeue_bio(sc)) == NULL) {
1287 amr_releasecmd(ac);
1288 return (0);
1289 }
1290
1291 /* connect the bio to the command */
1292 ac->ac_complete = amr_completeio;
1293 ac->ac_bio = bio;
1294 ac->ac_data = bio->bio_data;
1295 ac->ac_length = bio->bio_bcount;
1296 cmd = 0;
1297 switch (bio->bio_cmd) {
1298 case BIO_READ:
1299 ac->ac_flags |= AMR_CMD_DATAIN;
1300 if (AMR_IS_SG64(sc)) {
1301 cmd = AMR_CMD_LREAD64;
1302 ac->ac_flags |= AMR_CMD_SG64;
1303 } else
1304 cmd = AMR_CMD_LREAD;
1305 break;
1306 case BIO_WRITE:
1307 ac->ac_flags |= AMR_CMD_DATAOUT;
1308 if (AMR_IS_SG64(sc)) {
1309 cmd = AMR_CMD_LWRITE64;
1310 ac->ac_flags |= AMR_CMD_SG64;
1311 } else
1312 cmd = AMR_CMD_LWRITE;
1313 break;
1314 case BIO_FLUSH:
1315 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
1316 cmd = AMR_CMD_FLUSH;
1317 break;
1318 }
1319 amrd = (struct amrd_softc *)bio->bio_disk->d_drv1;
1320 driveno = amrd->amrd_drive - sc->amr_drive;
1321 blkcount = howmany(bio->bio_bcount, AMR_BLKSIZE);
1322
1323 ac->ac_mailbox.mb_command = cmd;
1324 if (bio->bio_cmd == BIO_READ || bio->bio_cmd == BIO_WRITE) {
1325 ac->ac_mailbox.mb_blkcount = blkcount;
1326 ac->ac_mailbox.mb_lba = bio->bio_pblkno;
1327 if ((bio->bio_pblkno + blkcount) > sc->amr_drive[driveno].al_size) {
1328 device_printf(sc->amr_dev,
1329 "I/O beyond end of unit (%lld,%d > %lu)\n",
1330 (long long)bio->bio_pblkno, blkcount,
1331 (u_long)sc->amr_drive[driveno].al_size);
1332 }
1333 }
1334 ac->ac_mailbox.mb_drive = driveno;
1335 if (sc->amr_state & AMR_STATE_REMAP_LD)
1336 ac->ac_mailbox.mb_drive |= 0x80;
1337
1338 /* we fill in the s/g related data when the command is mapped */
1339
1340
1341 *acp = ac;
1342 return(error);
1343 }
1344
1345 /********************************************************************************
1346 * Take a command, submit it to the controller and sleep until it completes
1347 * or fails. Interrupts must be enabled, returns nonzero on error.
1348 */
1349 static int
amr_wait_command(struct amr_command * ac)1350 amr_wait_command(struct amr_command *ac)
1351 {
1352 int error = 0;
1353 struct amr_softc *sc = ac->ac_sc;
1354
1355 debug_called(1);
1356
1357 ac->ac_complete = NULL;
1358 ac->ac_flags |= AMR_CMD_SLEEP;
1359 if ((error = amr_start(ac)) != 0) {
1360 return(error);
1361 }
1362
1363 while ((ac->ac_flags & AMR_CMD_BUSY) && (error != EWOULDBLOCK)) {
1364 error = msleep(ac,&sc->amr_list_lock, PRIBIO, "amrwcmd", 0);
1365 }
1366
1367 return(error);
1368 }
1369
1370 /********************************************************************************
1371 * Take a command, submit it to the controller and busy-wait for it to return.
1372 * Returns nonzero on error. Can be safely called with interrupts enabled.
1373 */
1374 static int
amr_std_poll_command(struct amr_command * ac)1375 amr_std_poll_command(struct amr_command *ac)
1376 {
1377 struct amr_softc *sc = ac->ac_sc;
1378 int error, count;
1379
1380 debug_called(2);
1381
1382 ac->ac_complete = NULL;
1383 if ((error = amr_start(ac)) != 0)
1384 return(error);
1385
1386 count = 0;
1387 do {
1388 /*
1389 * Poll for completion, although the interrupt handler may beat us to it.
1390 * Note that the timeout here is somewhat arbitrary.
1391 */
1392 amr_done(sc);
1393 DELAY(1000);
1394 } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000));
1395 if (!(ac->ac_flags & AMR_CMD_BUSY)) {
1396 error = 0;
1397 } else {
1398 /* XXX the slot is now marked permanently busy */
1399 error = EIO;
1400 device_printf(sc->amr_dev, "polled command timeout\n");
1401 }
1402 return(error);
1403 }
1404
1405 static void
amr_setup_polled_dmamap(void * arg,bus_dma_segment_t * segs,int nsegs,int err)1406 amr_setup_polled_dmamap(void *arg, bus_dma_segment_t *segs, int nsegs, int err)
1407 {
1408 struct amr_command *ac = arg;
1409 struct amr_softc *sc = ac->ac_sc;
1410 int mb_channel;
1411
1412 if (err) {
1413 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__);
1414 ac->ac_status = AMR_STATUS_ABORTED;
1415 return;
1416 }
1417
1418 amr_setup_sg(arg, segs, nsegs, err);
1419
1420 /* for AMR_CMD_CONFIG Read/Write the s/g count goes elsewhere */
1421 mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel;
1422 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG &&
1423 ((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) ||
1424 (mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG)))
1425 ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments;
1426
1427 ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments;
1428 ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr;
1429 if (AC_IS_SG64(ac)) {
1430 ac->ac_sg64_hi = 0;
1431 ac->ac_sg64_lo = ac->ac_sgbusaddr;
1432 }
1433
1434 sc->amr_poll_command1(sc, ac);
1435 }
1436
1437 /********************************************************************************
1438 * Take a command, submit it to the controller and busy-wait for it to return.
1439 * Returns nonzero on error. Can be safely called with interrupts enabled.
1440 */
1441 static int
amr_quartz_poll_command(struct amr_command * ac)1442 amr_quartz_poll_command(struct amr_command *ac)
1443 {
1444 struct amr_softc *sc = ac->ac_sc;
1445 int error;
1446
1447 debug_called(2);
1448
1449 error = 0;
1450
1451 if (AC_IS_SG64(ac)) {
1452 ac->ac_tag = sc->amr_buffer64_dmat;
1453 ac->ac_datamap = ac->ac_dma64map;
1454 } else {
1455 ac->ac_tag = sc->amr_buffer_dmat;
1456 ac->ac_datamap = ac->ac_dmamap;
1457 }
1458
1459 /* now we have a slot, we can map the command (unmapped in amr_complete) */
1460 if (ac->ac_data != 0) {
1461 if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data,
1462 ac->ac_length, amr_setup_polled_dmamap, ac, BUS_DMA_NOWAIT) != 0) {
1463 error = 1;
1464 }
1465 } else {
1466 error = amr_quartz_poll_command1(sc, ac);
1467 }
1468
1469 return (error);
1470 }
1471
1472 static int
amr_quartz_poll_command1(struct amr_softc * sc,struct amr_command * ac)1473 amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac)
1474 {
1475 int count, error;
1476
1477 mtx_lock(&sc->amr_hw_lock);
1478 if ((sc->amr_state & AMR_STATE_INTEN) == 0) {
1479 count=0;
1480 while (sc->amr_busyslots) {
1481 msleep(sc, &sc->amr_hw_lock, PRIBIO | PCATCH, "amrpoll", hz);
1482 if(count++>10) {
1483 break;
1484 }
1485 }
1486
1487 if(sc->amr_busyslots) {
1488 device_printf(sc->amr_dev, "adapter is busy\n");
1489 mtx_unlock(&sc->amr_hw_lock);
1490 if (ac->ac_data != NULL) {
1491 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap);
1492 }
1493 ac->ac_status=0;
1494 return(1);
1495 }
1496 }
1497
1498 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
1499
1500 /* clear the poll/ack fields in the mailbox */
1501 sc->amr_mailbox->mb_ident = 0xFE;
1502 sc->amr_mailbox->mb_nstatus = 0xFF;
1503 sc->amr_mailbox->mb_status = 0xFF;
1504 sc->amr_mailbox->mb_poll = 0;
1505 sc->amr_mailbox->mb_ack = 0;
1506 sc->amr_mailbox->mb_busy = 1;
1507
1508 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
1509
1510 while(sc->amr_mailbox->mb_nstatus == 0xFF)
1511 DELAY(1);
1512 while(sc->amr_mailbox->mb_status == 0xFF)
1513 DELAY(1);
1514 ac->ac_status=sc->amr_mailbox->mb_status;
1515 error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0;
1516 while(sc->amr_mailbox->mb_poll != 0x77)
1517 DELAY(1);
1518 sc->amr_mailbox->mb_poll = 0;
1519 sc->amr_mailbox->mb_ack = 0x77;
1520
1521 /* acknowledge that we have the commands */
1522 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
1523 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK)
1524 DELAY(1);
1525 mtx_unlock(&sc->amr_hw_lock);
1526
1527 /* unmap the command's data buffer */
1528 if (ac->ac_flags & AMR_CMD_DATAIN) {
1529 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTREAD);
1530 }
1531 if (ac->ac_flags & AMR_CMD_DATAOUT) {
1532 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTWRITE);
1533 }
1534 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap);
1535
1536 return(error);
1537 }
1538
1539 static __inline int
amr_freeslot(struct amr_command * ac)1540 amr_freeslot(struct amr_command *ac)
1541 {
1542 struct amr_softc *sc = ac->ac_sc;
1543 int slot;
1544
1545 debug_called(3);
1546
1547 slot = ac->ac_slot;
1548 if (sc->amr_busycmd[slot] == NULL)
1549 panic("amr: slot %d not busy?\n", slot);
1550
1551 sc->amr_busycmd[slot] = NULL;
1552 atomic_subtract_int(&sc->amr_busyslots, 1);
1553
1554 return (0);
1555 }
1556
1557 /********************************************************************************
1558 * Map/unmap (ac)'s data in the controller's addressable space as required.
1559 *
1560 * These functions may be safely called multiple times on a given command.
1561 */
1562 static void
amr_setup_sg(void * arg,bus_dma_segment_t * segs,int nsegments,int error)1563 amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1564 {
1565 struct amr_command *ac = (struct amr_command *)arg;
1566 struct amr_sgentry *sg;
1567 struct amr_sg64entry *sg64;
1568 int flags, i;
1569
1570 debug_called(3);
1571
1572 /* get base address of s/g table */
1573 sg = ac->ac_sg.sg32;
1574 sg64 = ac->ac_sg.sg64;
1575
1576 if (AC_IS_SG64(ac)) {
1577 ac->ac_nsegments = nsegments;
1578 ac->ac_mb_physaddr = 0xffffffff;
1579 for (i = 0; i < nsegments; i++, sg64++) {
1580 sg64->sg_addr = segs[i].ds_addr;
1581 sg64->sg_count = segs[i].ds_len;
1582 }
1583 } else {
1584 /* decide whether we need to populate the s/g table */
1585 if (nsegments < 2) {
1586 ac->ac_nsegments = 0;
1587 ac->ac_mb_physaddr = segs[0].ds_addr;
1588 } else {
1589 ac->ac_nsegments = nsegments;
1590 ac->ac_mb_physaddr = ac->ac_sgbusaddr;
1591 for (i = 0; i < nsegments; i++, sg++) {
1592 sg->sg_addr = segs[i].ds_addr;
1593 sg->sg_count = segs[i].ds_len;
1594 }
1595 }
1596 }
1597
1598 flags = 0;
1599 if (ac->ac_flags & AMR_CMD_DATAIN)
1600 flags |= BUS_DMASYNC_PREREAD;
1601 if (ac->ac_flags & AMR_CMD_DATAOUT)
1602 flags |= BUS_DMASYNC_PREWRITE;
1603 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flags);
1604 ac->ac_flags |= AMR_CMD_MAPPED;
1605 }
1606
1607 static void
amr_setup_data(void * arg,bus_dma_segment_t * segs,int nsegs,int err)1608 amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegs, int err)
1609 {
1610 struct amr_command *ac = arg;
1611 struct amr_softc *sc = ac->ac_sc;
1612 int mb_channel;
1613
1614 if (err) {
1615 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__);
1616 amr_abort_load(ac);
1617 return;
1618 }
1619
1620 amr_setup_sg(arg, segs, nsegs, err);
1621
1622 /* for AMR_CMD_CONFIG Read/Write the s/g count goes elsewhere */
1623 mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel;
1624 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG &&
1625 ((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) ||
1626 (mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG)))
1627 ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments;
1628
1629 ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments;
1630 ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr;
1631 if (AC_IS_SG64(ac)) {
1632 ac->ac_sg64_hi = 0;
1633 ac->ac_sg64_lo = ac->ac_sgbusaddr;
1634 }
1635
1636 if (sc->amr_submit_command(ac) == EBUSY) {
1637 amr_freeslot(ac);
1638 amr_requeue_ready(ac);
1639 }
1640 }
1641
1642 static void
amr_setup_ccb(void * arg,bus_dma_segment_t * segs,int nsegs,int err)1643 amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegs, int err)
1644 {
1645 struct amr_command *ac = arg;
1646 struct amr_softc *sc = ac->ac_sc;
1647 struct amr_passthrough *ap = &ac->ac_ccb->ccb_pthru;
1648 struct amr_ext_passthrough *aep = &ac->ac_ccb->ccb_epthru;
1649
1650 if (err) {
1651 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__);
1652 amr_abort_load(ac);
1653 return;
1654 }
1655
1656 /* Set up the mailbox portion of the command to point at the ccb */
1657 ac->ac_mailbox.mb_nsgelem = 0;
1658 ac->ac_mailbox.mb_physaddr = ac->ac_ccb_busaddr;
1659
1660 amr_setup_sg(arg, segs, nsegs, err);
1661
1662 switch (ac->ac_mailbox.mb_command) {
1663 case AMR_CMD_EXTPASS:
1664 aep->ap_no_sg_elements = ac->ac_nsegments;
1665 aep->ap_data_transfer_address = ac->ac_mb_physaddr;
1666 break;
1667 case AMR_CMD_PASS:
1668 ap->ap_no_sg_elements = ac->ac_nsegments;
1669 ap->ap_data_transfer_address = ac->ac_mb_physaddr;
1670 break;
1671 default:
1672 panic("Unknown ccb command");
1673 }
1674
1675 if (sc->amr_submit_command(ac) == EBUSY) {
1676 amr_freeslot(ac);
1677 amr_requeue_ready(ac);
1678 }
1679 }
1680
1681 static int
amr_mapcmd(struct amr_command * ac)1682 amr_mapcmd(struct amr_command *ac)
1683 {
1684 bus_dmamap_callback_t *cb;
1685 struct amr_softc *sc = ac->ac_sc;
1686
1687 debug_called(3);
1688
1689 if (AC_IS_SG64(ac)) {
1690 ac->ac_tag = sc->amr_buffer64_dmat;
1691 ac->ac_datamap = ac->ac_dma64map;
1692 } else {
1693 ac->ac_tag = sc->amr_buffer_dmat;
1694 ac->ac_datamap = ac->ac_dmamap;
1695 }
1696
1697 if (ac->ac_flags & AMR_CMD_CCB)
1698 cb = amr_setup_ccb;
1699 else
1700 cb = amr_setup_data;
1701
1702 /* if the command involves data at all, and hasn't been mapped */
1703 if ((ac->ac_flags & AMR_CMD_MAPPED) == 0 && (ac->ac_data != NULL)) {
1704 /* map the data buffers into bus space and build the s/g list */
1705 if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data,
1706 ac->ac_length, cb, ac, 0) == EINPROGRESS) {
1707 sc->amr_state |= AMR_STATE_QUEUE_FRZN;
1708 }
1709 } else {
1710 if (sc->amr_submit_command(ac) == EBUSY) {
1711 amr_freeslot(ac);
1712 amr_requeue_ready(ac);
1713 }
1714 }
1715
1716 return (0);
1717 }
1718
1719 static void
amr_unmapcmd(struct amr_command * ac)1720 amr_unmapcmd(struct amr_command *ac)
1721 {
1722 int flag;
1723
1724 debug_called(3);
1725
1726 /* if the command involved data at all and was mapped */
1727 if (ac->ac_flags & AMR_CMD_MAPPED) {
1728
1729 if (ac->ac_data != NULL) {
1730
1731 flag = 0;
1732 if (ac->ac_flags & AMR_CMD_DATAIN)
1733 flag |= BUS_DMASYNC_POSTREAD;
1734 if (ac->ac_flags & AMR_CMD_DATAOUT)
1735 flag |= BUS_DMASYNC_POSTWRITE;
1736
1737 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flag);
1738 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap);
1739 }
1740
1741 ac->ac_flags &= ~AMR_CMD_MAPPED;
1742 }
1743 }
1744
1745 static void
amr_abort_load(struct amr_command * ac)1746 amr_abort_load(struct amr_command *ac)
1747 {
1748 ac_qhead_t head;
1749 struct amr_softc *sc = ac->ac_sc;
1750
1751 mtx_assert(&sc->amr_list_lock, MA_OWNED);
1752
1753 ac->ac_status = AMR_STATUS_ABORTED;
1754 amr_init_qhead(&head);
1755 amr_enqueue_completed(ac, &head);
1756
1757 mtx_unlock(&sc->amr_list_lock);
1758 amr_complete(sc, &head);
1759 mtx_lock(&sc->amr_list_lock);
1760 }
1761
1762 /********************************************************************************
1763 * Take a command and give it to the controller, returns 0 if successful, or
1764 * EBUSY if the command should be retried later.
1765 */
1766 static int
amr_start(struct amr_command * ac)1767 amr_start(struct amr_command *ac)
1768 {
1769 struct amr_softc *sc;
1770 int error = 0;
1771 int slot;
1772
1773 debug_called(3);
1774
1775 /* mark command as busy so that polling consumer can tell */
1776 sc = ac->ac_sc;
1777 ac->ac_flags |= AMR_CMD_BUSY;
1778
1779 /* get a command slot (freed in amr_done) */
1780 slot = ac->ac_slot;
1781 if (sc->amr_busycmd[slot] != NULL)
1782 panic("amr: slot %d busy?\n", slot);
1783 sc->amr_busycmd[slot] = ac;
1784 atomic_add_int(&sc->amr_busyslots, 1);
1785
1786 /* Now we have a slot, we can map the command (unmapped in amr_complete). */
1787 if ((error = amr_mapcmd(ac)) == ENOMEM) {
1788 /*
1789 * Memory resources are short, so free the slot and let this be tried
1790 * later.
1791 */
1792 amr_freeslot(ac);
1793 }
1794
1795 return (error);
1796 }
1797
1798 /********************************************************************************
1799 * Extract one or more completed commands from the controller (sc)
1800 *
1801 * Returns nonzero if any commands on the work queue were marked as completed.
1802 */
1803
1804 int
amr_done(struct amr_softc * sc)1805 amr_done(struct amr_softc *sc)
1806 {
1807 ac_qhead_t head;
1808 struct amr_command *ac;
1809 struct amr_mailbox mbox;
1810 int i, idx, result;
1811
1812 debug_called(3);
1813
1814 /* See if there's anything for us to do */
1815 result = 0;
1816 amr_init_qhead(&head);
1817
1818 /* loop collecting completed commands */
1819 for (;;) {
1820 /* poll for a completed command's identifier and status */
1821 if (sc->amr_get_work(sc, &mbox)) {
1822 result = 1;
1823
1824 /* iterate over completed commands in this result */
1825 for (i = 0; i < mbox.mb_nstatus; i++) {
1826 /* get pointer to busy command */
1827 idx = mbox.mb_completed[i] - 1;
1828 ac = sc->amr_busycmd[idx];
1829
1830 /* really a busy command? */
1831 if (ac != NULL) {
1832
1833 /* pull the command from the busy index */
1834 amr_freeslot(ac);
1835
1836 /* save status for later use */
1837 ac->ac_status = mbox.mb_status;
1838 amr_enqueue_completed(ac, &head);
1839 debug(3, "completed command with status %x", mbox.mb_status);
1840 } else {
1841 device_printf(sc->amr_dev, "bad slot %d completed\n", idx);
1842 }
1843 }
1844 } else
1845 break; /* no work */
1846 }
1847
1848 /* handle completion and timeouts */
1849 amr_complete(sc, &head);
1850
1851 return(result);
1852 }
1853
1854 /********************************************************************************
1855 * Do completion processing on done commands on (sc)
1856 */
1857
1858 static void
amr_complete(void * context,ac_qhead_t * head)1859 amr_complete(void *context, ac_qhead_t *head)
1860 {
1861 struct amr_softc *sc = (struct amr_softc *)context;
1862 struct amr_command *ac;
1863
1864 debug_called(3);
1865
1866 /* pull completed commands off the queue */
1867 for (;;) {
1868 ac = amr_dequeue_completed(sc, head);
1869 if (ac == NULL)
1870 break;
1871
1872 /* unmap the command's data buffer */
1873 amr_unmapcmd(ac);
1874
1875 /*
1876 * Is there a completion handler?
1877 */
1878 if (ac->ac_complete != NULL) {
1879 /* unbusy the command */
1880 ac->ac_flags &= ~AMR_CMD_BUSY;
1881 ac->ac_complete(ac);
1882
1883 /*
1884 * Is someone sleeping on this one?
1885 */
1886 } else {
1887 mtx_lock(&sc->amr_list_lock);
1888 ac->ac_flags &= ~AMR_CMD_BUSY;
1889 if (ac->ac_flags & AMR_CMD_SLEEP) {
1890 /* unbusy the command */
1891 wakeup(ac);
1892 }
1893 mtx_unlock(&sc->amr_list_lock);
1894 }
1895
1896 if(!sc->amr_busyslots) {
1897 wakeup(sc);
1898 }
1899 }
1900
1901 mtx_lock(&sc->amr_list_lock);
1902 sc->amr_state &= ~AMR_STATE_QUEUE_FRZN;
1903 amr_startio(sc);
1904 mtx_unlock(&sc->amr_list_lock);
1905 }
1906
1907 /********************************************************************************
1908 ********************************************************************************
1909 Command Buffer Management
1910 ********************************************************************************
1911 ********************************************************************************/
1912
1913 /********************************************************************************
1914 * Get a new command buffer.
1915 *
1916 * This may return NULL in low-memory cases.
1917 *
1918 * If possible, we recycle a command buffer that's been used before.
1919 */
1920 struct amr_command *
amr_alloccmd(struct amr_softc * sc)1921 amr_alloccmd(struct amr_softc *sc)
1922 {
1923 struct amr_command *ac;
1924
1925 debug_called(3);
1926
1927 ac = amr_dequeue_free(sc);
1928 if (ac == NULL) {
1929 sc->amr_state |= AMR_STATE_QUEUE_FRZN;
1930 return(NULL);
1931 }
1932
1933 /* clear out significant fields */
1934 ac->ac_status = 0;
1935 bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox));
1936 ac->ac_flags = 0;
1937 ac->ac_bio = NULL;
1938 ac->ac_data = NULL;
1939 ac->ac_complete = NULL;
1940 ac->ac_retries = 0;
1941 ac->ac_tag = NULL;
1942 ac->ac_datamap = NULL;
1943 return(ac);
1944 }
1945
1946 /********************************************************************************
1947 * Release a command buffer for recycling.
1948 */
1949 void
amr_releasecmd(struct amr_command * ac)1950 amr_releasecmd(struct amr_command *ac)
1951 {
1952 debug_called(3);
1953
1954 amr_enqueue_free(ac);
1955 }
1956
1957 /********************************************************************************
1958 * Allocate a new command cluster and initialise it.
1959 */
1960 static void
amr_alloccmd_cluster(struct amr_softc * sc)1961 amr_alloccmd_cluster(struct amr_softc *sc)
1962 {
1963 struct amr_command_cluster *acc;
1964 struct amr_command *ac;
1965 int i, nextslot;
1966
1967 /*
1968 * If we haven't found the real limit yet, let us have a couple of
1969 * commands in order to be able to probe.
1970 */
1971 if (sc->amr_maxio == 0)
1972 sc->amr_maxio = 2;
1973
1974 if (sc->amr_nextslot > sc->amr_maxio)
1975 return;
1976 acc = malloc(AMR_CMD_CLUSTERSIZE, M_AMR, M_NOWAIT | M_ZERO);
1977 if (acc != NULL) {
1978 nextslot = sc->amr_nextslot;
1979 mtx_lock(&sc->amr_list_lock);
1980 TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link);
1981 mtx_unlock(&sc->amr_list_lock);
1982 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) {
1983 ac = &acc->acc_command[i];
1984 ac->ac_sc = sc;
1985 ac->ac_slot = nextslot;
1986
1987 /*
1988 * The SG table for each slot is a fixed size and is assumed to
1989 * to hold 64-bit s/g objects when the driver is configured to do
1990 * 64-bit DMA. 32-bit DMA commands still use the same table, but
1991 * cast down to 32-bit objects.
1992 */
1993 if (AMR_IS_SG64(sc)) {
1994 ac->ac_sgbusaddr = sc->amr_sgbusaddr +
1995 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sg64entry));
1996 ac->ac_sg.sg64 = sc->amr_sg64table + (ac->ac_slot * AMR_NSEG);
1997 } else {
1998 ac->ac_sgbusaddr = sc->amr_sgbusaddr +
1999 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
2000 ac->ac_sg.sg32 = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
2001 }
2002
2003 ac->ac_ccb = sc->amr_ccb + ac->ac_slot;
2004 ac->ac_ccb_busaddr = sc->amr_ccb_busaddr +
2005 (ac->ac_slot * sizeof(union amr_ccb));
2006
2007 if (bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap))
2008 break;
2009 if (AMR_IS_SG64(sc) &&
2010 (bus_dmamap_create(sc->amr_buffer64_dmat, 0,&ac->ac_dma64map)))
2011 break;
2012 amr_releasecmd(ac);
2013 if (++nextslot > sc->amr_maxio)
2014 break;
2015 }
2016 sc->amr_nextslot = nextslot;
2017 }
2018 }
2019
2020 /********************************************************************************
2021 * Free a command cluster
2022 */
2023 static void
amr_freecmd_cluster(struct amr_command_cluster * acc)2024 amr_freecmd_cluster(struct amr_command_cluster *acc)
2025 {
2026 struct amr_softc *sc = acc->acc_command[0].ac_sc;
2027 int i;
2028
2029 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) {
2030 if (acc->acc_command[i].ac_sc == NULL)
2031 break;
2032 bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap);
2033 if (AMR_IS_SG64(sc))
2034 bus_dmamap_destroy(sc->amr_buffer64_dmat, acc->acc_command[i].ac_dma64map);
2035 }
2036 free(acc, M_AMR);
2037 }
2038
2039 /********************************************************************************
2040 ********************************************************************************
2041 Interface-specific Shims
2042 ********************************************************************************
2043 ********************************************************************************/
2044
2045 /********************************************************************************
2046 * Tell the controller that the mailbox contains a valid command
2047 */
2048 static int
amr_quartz_submit_command(struct amr_command * ac)2049 amr_quartz_submit_command(struct amr_command *ac)
2050 {
2051 struct amr_softc *sc = ac->ac_sc;
2052 static struct timeval lastfail;
2053 static int curfail;
2054 int i = 0;
2055
2056 mtx_lock(&sc->amr_hw_lock);
2057 while (sc->amr_mailbox->mb_busy && (i++ < 10)) {
2058 DELAY(1);
2059 /* This is a no-op read that flushes pending mailbox updates */
2060 AMR_QGET_ODB(sc);
2061 }
2062 if (sc->amr_mailbox->mb_busy) {
2063 mtx_unlock(&sc->amr_hw_lock);
2064 if (ac->ac_retries++ > 1000) {
2065 if (ppsratecheck(&lastfail, &curfail, 1))
2066 device_printf(sc->amr_dev, "Too many retries on command %p. "
2067 "Controller is likely dead\n", ac);
2068 ac->ac_retries = 0;
2069 }
2070 return (EBUSY);
2071 }
2072
2073 /*
2074 * Save the slot number so that we can locate this command when complete.
2075 * Note that ident = 0 seems to be special, so we don't use it.
2076 */
2077 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; /* will be coppied into mbox */
2078 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14);
2079 sc->amr_mailbox->mb_busy = 1;
2080 sc->amr_mailbox->mb_poll = 0;
2081 sc->amr_mailbox->mb_ack = 0;
2082 sc->amr_mailbox64->sg64_hi = ac->ac_sg64_hi;
2083 sc->amr_mailbox64->sg64_lo = ac->ac_sg64_lo;
2084
2085 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
2086 mtx_unlock(&sc->amr_hw_lock);
2087 return(0);
2088 }
2089
2090 static int
amr_std_submit_command(struct amr_command * ac)2091 amr_std_submit_command(struct amr_command *ac)
2092 {
2093 struct amr_softc *sc = ac->ac_sc;
2094 static struct timeval lastfail;
2095 static int curfail;
2096
2097 mtx_lock(&sc->amr_hw_lock);
2098 if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG) {
2099 mtx_unlock(&sc->amr_hw_lock);
2100 if (ac->ac_retries++ > 1000) {
2101 if (ppsratecheck(&lastfail, &curfail, 1))
2102 device_printf(sc->amr_dev, "Too many retries on command %p. "
2103 "Controller is likely dead\n", ac);
2104 ac->ac_retries = 0;
2105 }
2106 return (EBUSY);
2107 }
2108
2109 /*
2110 * Save the slot number so that we can locate this command when complete.
2111 * Note that ident = 0 seems to be special, so we don't use it.
2112 */
2113 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; /* will be coppied into mbox */
2114 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14);
2115 sc->amr_mailbox->mb_busy = 1;
2116 sc->amr_mailbox->mb_poll = 0;
2117 sc->amr_mailbox->mb_ack = 0;
2118
2119 AMR_SPOST_COMMAND(sc);
2120 mtx_unlock(&sc->amr_hw_lock);
2121 return(0);
2122 }
2123
2124 /********************************************************************************
2125 * Claim any work that the controller has completed; acknowledge completion,
2126 * save details of the completion in (mbsave)
2127 */
2128 static int
amr_quartz_get_work(struct amr_softc * sc,struct amr_mailbox * mbsave)2129 amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
2130 {
2131 int worked, i;
2132 u_int32_t outd;
2133 u_int8_t nstatus;
2134 u_int8_t completed[46];
2135
2136 debug_called(3);
2137
2138 worked = 0;
2139
2140 /* work waiting for us? */
2141 if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) {
2142
2143 /* acknowledge interrupt */
2144 AMR_QPUT_ODB(sc, AMR_QODB_READY);
2145
2146 while ((nstatus = sc->amr_mailbox->mb_nstatus) == 0xff)
2147 DELAY(1);
2148 sc->amr_mailbox->mb_nstatus = 0xff;
2149
2150 /* wait until fw wrote out all completions */
2151 for (i = 0; i < nstatus; i++) {
2152 while ((completed[i] = sc->amr_mailbox->mb_completed[i]) == 0xff)
2153 DELAY(1);
2154 sc->amr_mailbox->mb_completed[i] = 0xff;
2155 }
2156
2157 /* Save information for later processing */
2158 mbsave->mb_nstatus = nstatus;
2159 mbsave->mb_status = sc->amr_mailbox->mb_status;
2160 sc->amr_mailbox->mb_status = 0xff;
2161
2162 for (i = 0; i < nstatus; i++)
2163 mbsave->mb_completed[i] = completed[i];
2164
2165 /* acknowledge that we have the commands */
2166 AMR_QPUT_IDB(sc, AMR_QIDB_ACK);
2167
2168 #if 0
2169 #ifndef AMR_QUARTZ_GOFASTER
2170 /*
2171 * This waits for the controller to notice that we've taken the
2172 * command from it. It's very inefficient, and we shouldn't do it,
2173 * but if we remove this code, we stop completing commands under
2174 * load.
2175 *
2176 * Peter J says we shouldn't do this. The documentation says we
2177 * should. Who is right?
2178 */
2179 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK)
2180 ; /* XXX aiee! what if it dies? */
2181 #endif
2182 #endif
2183
2184 worked = 1; /* got some work */
2185 }
2186
2187 return(worked);
2188 }
2189
2190 static int
amr_std_get_work(struct amr_softc * sc,struct amr_mailbox * mbsave)2191 amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
2192 {
2193 int worked;
2194 u_int8_t istat;
2195
2196 debug_called(3);
2197
2198 worked = 0;
2199
2200 /* check for valid interrupt status */
2201 istat = AMR_SGET_ISTAT(sc);
2202 if ((istat & AMR_SINTR_VALID) != 0) {
2203 AMR_SPUT_ISTAT(sc, istat); /* ack interrupt status */
2204
2205 /* save mailbox, which contains a list of completed commands */
2206 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
2207
2208 AMR_SACK_INTERRUPT(sc); /* acknowledge we have the mailbox */
2209 worked = 1;
2210 }
2211
2212 return(worked);
2213 }
2214
2215 /********************************************************************************
2216 * Notify the controller of the mailbox location.
2217 */
2218 static void
amr_std_attach_mailbox(struct amr_softc * sc)2219 amr_std_attach_mailbox(struct amr_softc *sc)
2220 {
2221
2222 /* program the mailbox physical address */
2223 AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff);
2224 AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff);
2225 AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff);
2226 AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff);
2227 AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR);
2228
2229 /* clear any outstanding interrupt and enable interrupts proper */
2230 AMR_SACK_INTERRUPT(sc);
2231 AMR_SENABLE_INTR(sc);
2232 }
2233
2234 #ifdef AMR_BOARD_INIT
2235 /********************************************************************************
2236 * Initialise the controller
2237 */
2238 static int
amr_quartz_init(struct amr_softc * sc)2239 amr_quartz_init(struct amr_softc *sc)
2240 {
2241 int status, ostatus;
2242
2243 device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc));
2244
2245 AMR_QRESET(sc);
2246
2247 ostatus = 0xff;
2248 while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) {
2249 if (status != ostatus) {
2250 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status));
2251 ostatus = status;
2252 }
2253 switch (status) {
2254 case AMR_QINIT_NOMEM:
2255 return(ENOMEM);
2256
2257 case AMR_QINIT_SCAN:
2258 /* XXX we could print channel/target here */
2259 break;
2260 }
2261 }
2262 return(0);
2263 }
2264
2265 static int
amr_std_init(struct amr_softc * sc)2266 amr_std_init(struct amr_softc *sc)
2267 {
2268 int status, ostatus;
2269
2270 device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc));
2271
2272 AMR_SRESET(sc);
2273
2274 ostatus = 0xff;
2275 while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) {
2276 if (status != ostatus) {
2277 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status));
2278 ostatus = status;
2279 }
2280 switch (status) {
2281 case AMR_SINIT_NOMEM:
2282 return(ENOMEM);
2283
2284 case AMR_SINIT_INPROG:
2285 /* XXX we could print channel/target here? */
2286 break;
2287 }
2288 }
2289 return(0);
2290 }
2291 #endif
2292
2293 /********************************************************************************
2294 ********************************************************************************
2295 Debugging
2296 ********************************************************************************
2297 ********************************************************************************/
2298
2299 /********************************************************************************
2300 * Identify the controller and print some information about it.
2301 */
2302 static void
amr_describe_controller(struct amr_softc * sc)2303 amr_describe_controller(struct amr_softc *sc)
2304 {
2305 struct amr_prodinfo *ap;
2306 struct amr_enquiry *ae;
2307 char *prod;
2308 int status;
2309
2310 /*
2311 * Try to get 40LD product info, which tells us what the card is labelled as.
2312 */
2313 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) != NULL) {
2314 device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n",
2315 ap->ap_product, ap->ap_firmware, ap->ap_bios,
2316 ap->ap_memsize);
2317
2318 free(ap, M_AMR);
2319 return;
2320 }
2321
2322 /*
2323 * Try 8LD extended ENQUIRY to get controller signature, and use lookup table.
2324 */
2325 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) != NULL) {
2326 prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature);
2327
2328 } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) != NULL) {
2329
2330 /*
2331 * Try to work it out based on the PCI signatures.
2332 */
2333 switch (pci_get_device(sc->amr_dev)) {
2334 case 0x9010:
2335 prod = "Series 428";
2336 break;
2337 case 0x9060:
2338 prod = "Series 434";
2339 break;
2340 default:
2341 prod = "unknown controller";
2342 break;
2343 }
2344 } else {
2345 device_printf(sc->amr_dev, "<unsupported controller>\n");
2346 return;
2347 }
2348
2349 /*
2350 * HP NetRaid controllers have a special encoding of the firmware and
2351 * BIOS versions. The AMI version seems to have it as strings whereas
2352 * the HP version does it with a leading uppercase character and two
2353 * binary numbers.
2354 */
2355
2356 if(ae->ae_adapter.aa_firmware[2] >= 'A' &&
2357 ae->ae_adapter.aa_firmware[2] <= 'Z' &&
2358 ae->ae_adapter.aa_firmware[1] < ' ' &&
2359 ae->ae_adapter.aa_firmware[0] < ' ' &&
2360 ae->ae_adapter.aa_bios[2] >= 'A' &&
2361 ae->ae_adapter.aa_bios[2] <= 'Z' &&
2362 ae->ae_adapter.aa_bios[1] < ' ' &&
2363 ae->ae_adapter.aa_bios[0] < ' ') {
2364
2365 /* this looks like we have an HP NetRaid version of the MegaRaid */
2366
2367 if(ae->ae_signature == AMR_SIG_438) {
2368 /* the AMI 438 is a NetRaid 3si in HP-land */
2369 prod = "HP NetRaid 3si";
2370 }
2371
2372 device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n",
2373 prod, ae->ae_adapter.aa_firmware[2],
2374 ae->ae_adapter.aa_firmware[1],
2375 ae->ae_adapter.aa_firmware[0],
2376 ae->ae_adapter.aa_bios[2],
2377 ae->ae_adapter.aa_bios[1],
2378 ae->ae_adapter.aa_bios[0],
2379 ae->ae_adapter.aa_memorysize);
2380 } else {
2381 device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n",
2382 prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios,
2383 ae->ae_adapter.aa_memorysize);
2384 }
2385 free(ae, M_AMR);
2386 }
2387
2388 int
amr_dump_blocks(struct amr_softc * sc,int unit,u_int32_t lba,void * data,int blks)2389 amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks)
2390 {
2391 struct amr_command *ac;
2392 int error = EIO;
2393
2394 debug_called(1);
2395
2396 sc->amr_state |= AMR_STATE_INTEN;
2397
2398 /* get ourselves a command buffer */
2399 if ((ac = amr_alloccmd(sc)) == NULL)
2400 goto out;
2401 /* set command flags */
2402 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
2403
2404 /* point the command at our data */
2405 ac->ac_data = data;
2406 ac->ac_length = blks * AMR_BLKSIZE;
2407
2408 /* build the command proper */
2409 ac->ac_mailbox.mb_command = AMR_CMD_LWRITE;
2410 ac->ac_mailbox.mb_blkcount = blks;
2411 ac->ac_mailbox.mb_lba = lba;
2412 ac->ac_mailbox.mb_drive = unit;
2413
2414 /* can't assume that interrupts are going to work here, so play it safe */
2415 if (sc->amr_poll_command(ac))
2416 goto out;
2417 error = ac->ac_status;
2418
2419 out:
2420 if (ac != NULL)
2421 amr_releasecmd(ac);
2422
2423 sc->amr_state &= ~AMR_STATE_INTEN;
2424 return (error);
2425 }
2426
2427
2428
2429 #ifdef AMR_DEBUG
2430 /********************************************************************************
2431 * Print the command (ac) in human-readable format
2432 */
2433 #if 0
2434 static void
2435 amr_printcommand(struct amr_command *ac)
2436 {
2437 struct amr_softc *sc = ac->ac_sc;
2438 struct amr_sgentry *sg;
2439 int i;
2440
2441 device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n",
2442 ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive);
2443 device_printf(sc->amr_dev, "blkcount %d lba %d\n",
2444 ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba);
2445 device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length);
2446 device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n",
2447 ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem);
2448 device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio);
2449
2450 /* get base address of s/g table */
2451 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
2452 for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++)
2453 device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count);
2454 }
2455 #endif
2456 #endif
2457