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Searched defs:inst_idx (Results 1 – 17 of 17) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_jpeg.h36 #define WREG32_SOC15_JPEG_DPG_MODE(inst_idx, offset, value, indirect) \ argument
55 #define RREG32_SOC15_JPEG_DPG_MODE(inst_idx, offset, mask_en) \ argument
64 #define WREG32_SOC24_JPEG_DPG_MODE(inst_idx, offset, value, indirect) \ argument
78 #define RREG32_SOC24_JPEG_DPG_MODE(inst_idx, offset, mask_en) \ argument
89 #define ADD_SOC24_JPEG_TO_DPG_SRAM(inst_idx, offset, value, indirect) \ argument
H A Dvcn_v4_0_3.c137 static int vcn_v4_0_3_fw_shared_init(struct amdgpu_device *adev, int inst_idx) in vcn_v4_0_3_fw_shared_init()
444 int inst_idx = vinst->inst; in vcn_v4_0_3_mc_resume() local
521 int inst_idx = vinst->inst; in vcn_v4_0_3_mc_resume_dpg_mode() local
635 int inst_idx = vinst->inst; in vcn_v4_0_3_disable_clock_gating() local
733 int inst_idx = vinst->inst; in vcn_v4_0_3_disable_clock_gating_dpg_mode() local
782 int inst_idx = vinst->inst; in vcn_v4_0_3_enable_clock_gating() local
836 int inst_idx = vinst->inst; in vcn_v4_0_3_start_dpg_mode() local
1339 int inst_idx = vinst->inst; in vcn_v4_0_3_stop_dpg_mode() local
2049 int inst_idx, bool indirect) in vcn_v4_0_3_enable_ras()
H A Dvcn_v4_0.c149 static int vcn_v4_0_fw_shared_init(struct amdgpu_device *adev, int inst_idx) in vcn_v4_0_fw_shared_init()
524 int inst_idx = vinst->inst; in vcn_v4_0_mc_resume_dpg_mode() local
870 int inst_idx = vinst->inst; in vcn_v4_0_disable_clock_gating_dpg_mode() local
979 int inst_idx = vinst->inst; in vcn_v4_0_enable_ras() local
1010 int inst_idx = vinst->inst; in vcn_v4_0_start_dpg_mode() local
1567 int inst_idx = vinst->inst; in vcn_v4_0_stop_dpg_mode() local
1688 int inst_idx = vinst->inst; in vcn_v4_0_pause_dpg_mode() local
H A Dvcn_v4_0_5.c463 int inst_idx = vinst->inst; in vcn_v4_0_5_mc_resume_dpg_mode() local
796 int inst_idx = vinst->inst; in vcn_v4_0_5_disable_clock_gating_dpg_mode() local
913 int inst_idx = vinst->inst; in vcn_v4_0_5_start_dpg_mode() local
1229 int inst_idx = vinst->inst; in vcn_v4_0_5_stop_dpg_mode() local
1348 int inst_idx = vinst->inst; in vcn_v4_0_5_pause_dpg_mode() local
H A Djpeg_v5_0_0.c304 int inst_idx, uint8_t indirect) in jpeg_engine_5_0_0_dpg_clock_gating_mode()
341 static int jpeg_v5_0_0_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in jpeg_v5_0_0_start_dpg_mode()
409 static void jpeg_v5_0_0_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) in jpeg_v5_0_0_stop_dpg_mode()
H A Dvcn_v5_0_1.c79 static void vcn_v5_0_1_fw_shared_init(struct amdgpu_device *adev, int inst_idx) in vcn_v5_0_1_fw_shared_init()
381 int inst_idx = vinst->inst; in vcn_v5_0_1_mc_resume_dpg_mode() local
563 int inst_idx = vinst->inst; in vcn_v5_0_1_start_dpg_mode() local
825 int inst_idx = vinst->inst; in vcn_v5_0_1_stop_dpg_mode() local
H A Dvcn_v2_5.c667 int inst_idx = vinst->inst; in vcn_v2_5_mc_resume_dpg_mode() local
882 int inst_idx = vinst->inst; in vcn_v2_5_clock_gating_dpg_mode() local
993 int inst_idx = vinst->inst; in vcn_v2_6_enable_ras() local
1021 int inst_idx = vinst->inst; in vcn_v2_5_start_dpg_mode() local
1548 int inst_idx = vinst->inst; in vcn_v2_5_stop_dpg_mode() local
1649 int inst_idx = vinst->inst; in vcn_v2_5_pause_dpg_mode() local
H A Dvcn_v5_0_0.c441 int inst_idx = vinst->inst; in vcn_v5_0_0_mc_resume_dpg_mode() local
711 int inst_idx = vinst->inst; in vcn_v5_0_0_start_dpg_mode() local
962 int inst_idx = vinst->inst; in vcn_v5_0_0_stop_dpg_mode() local
1080 int inst_idx = vinst->inst; in vcn_v5_0_0_pause_dpg_mode() local
H A Djpeg_v4_0_5.c355 int inst_idx, uint8_t indirect) in jpeg_engine_4_0_5_dpg_clock_gating_mode()
420 static void jpeg_v4_0_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in jpeg_v4_0_5_start_dpg_mode()
483 static void jpeg_v4_0_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) in jpeg_v4_0_5_stop_dpg_mode()
H A Dvcn_v3_0.c573 int inst_idx = vinst->inst; in vcn_v3_0_mc_resume_dpg_mode() local
910 int inst_idx = vinst->inst; in vcn_v3_0_clock_gating_dpg_mode() local
1028 int inst_idx = vinst->inst; in vcn_v3_0_start_dpg_mode() local
1578 int inst_idx = vinst->inst; in vcn_v3_0_stop_dpg_mode() local
1688 int inst_idx = vinst->inst; in vcn_v3_0_pause_dpg_mode() local
H A Damdgpu_vcn.h80 #define RREG32_SOC15_DPG_MODE_1_0(ip, inst_idx, reg, mask, sram_sel) \ argument
90 #define WREG32_SOC15_DPG_MODE_1_0(ip, inst_idx, reg, value, mask, sram_sel) \ argument
101 #define SOC15_DPG_MODE_OFFSET(ip, inst_idx, reg) \ argument
134 #define RREG32_SOC15_DPG_MODE(inst_idx, offset, mask_en) \ argument
143 #define WREG32_SOC15_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \ argument
162 #define SOC24_DPG_MODE_OFFSET(ip, inst_idx, reg) \ argument
195 #define WREG32_SOC24_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \ argument
H A Djpeg_v4_0_3.c480 static void jpeg_v4_0_3_disable_clock_gating(struct amdgpu_device *adev, int inst_idx) in jpeg_v4_0_3_disable_clock_gating()
505 static void jpeg_v4_0_3_enable_clock_gating(struct amdgpu_device *adev, int inst_idx) in jpeg_v4_0_3_enable_clock_gating()
H A Damdgpu_jpeg.c337 int amdgpu_jpeg_psp_update_sram(struct amdgpu_device *adev, int inst_idx, in amdgpu_jpeg_psp_update_sram()
H A Dvcn_v1_0.c1273 int inst_idx = vinst->inst; in vcn_v1_0_pause_dpg_mode() local
H A Dvcn_v2_0.c1262 int inst_idx = vinst->inst; in vcn_v2_0_pause_dpg_mode() local
H A Daqua_vanjaram.c71 uint32_t inst_idx, struct amdgpu_ring *ring) in aqua_vanjaram_set_xcp_id()
H A Damdgpu_vcn.c1312 int amdgpu_vcn_psp_update_sram(struct amdgpu_device *adev, int inst_idx, in amdgpu_vcn_psp_update_sram()