| /llvm-project-15.0.7/lldb/source/Plugins/Instruction/MIPS64/ |
| H A D | EmulateInstructionMIPS64.cpp | 1125 bool EmulateInstructionMIPS64::Emulate_SD(llvm::MCInst &insn) { in Emulate_SD() 1182 bool EmulateInstructionMIPS64::Emulate_LD(llvm::MCInst &insn) { in Emulate_LD() 1228 bool EmulateInstructionMIPS64::Emulate_LUI(llvm::MCInst &insn) { in Emulate_LUI() 1428 bool EmulateInstructionMIPS64::Emulate_BAL(llvm::MCInst &insn) { in Emulate_BAL() 1618 bool EmulateInstructionMIPS64::Emulate_BC(llvm::MCInst &insn) { in Emulate_BC() 1802 bool EmulateInstructionMIPS64::Emulate_J(llvm::MCInst &insn) { in Emulate_J() 1826 bool EmulateInstructionMIPS64::Emulate_JAL(llvm::MCInst &insn) { in Emulate_JAL() 1930 bool EmulateInstructionMIPS64::Emulate_JIC(llvm::MCInst &insn) { in Emulate_JIC() 1956 bool EmulateInstructionMIPS64::Emulate_JR(llvm::MCInst &insn) { in Emulate_JR() 2179 bool EmulateInstructionMIPS64::Emulate_BZB(llvm::MCInst &insn) { in Emulate_BZB() [all …]
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| /llvm-project-15.0.7/lldb/source/Plugins/Instruction/MIPS/ |
| H A D | EmulateInstructionMIPS.cpp | 1223 bool EmulateInstructionMIPS::Emulate_SW(llvm::MCInst &insn) { in Emulate_SW() 1287 bool EmulateInstructionMIPS::Emulate_LW(llvm::MCInst &insn) { in Emulate_LW() 1412 bool EmulateInstructionMIPS::Emulate_LUI(llvm::MCInst &insn) { in Emulate_LUI() 2405 bool EmulateInstructionMIPS::Emulate_BAL(llvm::MCInst &insn) { in Emulate_BAL() 2467 bool EmulateInstructionMIPS::Emulate_BC(llvm::MCInst &insn) { in Emulate_BC() 2490 bool EmulateInstructionMIPS::Emulate_J(llvm::MCInst &insn) { in Emulate_J() 2513 bool EmulateInstructionMIPS::Emulate_JAL(llvm::MCInst &insn) { in Emulate_JAL() 2617 bool EmulateInstructionMIPS::Emulate_JIC(llvm::MCInst &insn) { in Emulate_JIC() 2643 bool EmulateInstructionMIPS::Emulate_JR(llvm::MCInst &insn) { in Emulate_JR() 2856 bool EmulateInstructionMIPS::Emulate_BZB(llvm::MCInst &insn) { in Emulate_BZB() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86Disassembler.cpp | 214 static int readPrefixes(struct InternalInstruction *insn) { in readPrefixes() 513 static int readSIB(struct InternalInstruction *insn) { in readSIB() 606 static int readModRM(struct InternalInstruction *insn) { in readModRM() 837 static int fixupReg(struct InternalInstruction *insn, in fixupReg() 874 static bool readOpcode(struct InternalInstruction *insn) { in readOpcode() 1466 static int readVVVV(struct InternalInstruction *insn) { in readVVVV() 1506 static int readOperands(struct InternalInstruction *insn) { in readOperands() 1866 InternalInstruction &insn, in translateImmediate() 1970 InternalInstruction &insn) { in translateRMRegister() 2240 InternalInstruction &insn, in translateOperand() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 316 static DecodeStatus DecodeASX(MCInst &MI, uint64_t insn, uint64_t Address, in DecodeASX() 349 static DecodeStatus DecodeAS(MCInst &MI, uint64_t insn, uint64_t Address, in DecodeAS() 371 static DecodeStatus DecodeMem(MCInst &MI, uint64_t insn, uint64_t Address, in DecodeMem() 424 static DecodeStatus DecodeStoreI32(MCInst &Inst, uint64_t insn, in DecodeStoreI32() 435 static DecodeStatus DecodeStoreI64(MCInst &Inst, uint64_t insn, in DecodeStoreI64() 446 static DecodeStatus DecodeStoreF32(MCInst &Inst, uint64_t insn, in DecodeStoreF32() 452 static DecodeStatus DecodeLoadASI64(MCInst &Inst, uint64_t insn, in DecodeLoadASI64() 459 static DecodeStatus DecodeStoreASI64(MCInst &Inst, uint64_t insn, in DecodeStoreASI64() 466 static DecodeStatus DecodeCAS(MCInst &MI, uint64_t insn, uint64_t Address, in DecodeCAS() 598 static DecodeStatus DecodeBranchCondition(MCInst &MI, uint64_t insn, in DecodeBranchCondition() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 369 static DecodeStatus DecodeMem(MCInst &MI, unsigned insn, uint64_t Address, in DecodeMem() 422 static DecodeStatus DecodeLoadIntPair(MCInst &Inst, unsigned insn, in DecodeLoadIntPair() 453 static DecodeStatus DecodeLoadCPPair(MCInst &Inst, unsigned insn, in DecodeLoadCPPair() 460 static DecodeStatus DecodeStoreInt(MCInst &Inst, unsigned insn, in DecodeStoreInt() 467 static DecodeStatus DecodeStoreIntPair(MCInst &Inst, unsigned insn, in DecodeStoreIntPair() 480 static DecodeStatus DecodeStoreDFP(MCInst &Inst, unsigned insn, in DecodeStoreDFP() 487 static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn, in DecodeStoreQFP() 500 static DecodeStatus DecodeStoreCPPair(MCInst &Inst, unsigned insn, in DecodeStoreCPPair() 515 static DecodeStatus DecodeCall(MCInst &MI, unsigned insn, uint64_t Address, in DecodeCall() 532 static DecodeStatus DecodeJMPL(MCInst &MI, unsigned insn, uint64_t Address, in DecodeJMPL() [all …]
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| /llvm-project-15.0.7/lld/ELF/Arch/ |
| H A D | Hexagon.cpp | 186 static bool isDuplex(uint32_t insn) { in isDuplex() 193 static uint32_t findMaskR6(uint32_t insn) { in findMaskR6() 206 static uint32_t findMaskR8(uint32_t insn) { in findMaskR8() 214 static uint32_t findMaskR11(uint32_t insn) { in findMaskR11() 220 static uint32_t findMaskR16(uint32_t insn) { in findMaskR16()
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| H A D | PPC64.cpp | 127 PPCLegacyInsn insn = static_cast<PPCLegacyInsn>(encoding); in checkPPCLegacyInsn() local 223 for (uint32_t insn : tail) in writeSequence() local 431 static bool isDSFormInstruction(PPCLegacyInsn insn) { in isDSFormInstruction() 467 static PPCPrefixedInsn getPCRelativeForm(PPCLegacyInsn insn) { in getPCRelativeForm() 478 static LegacyToPrefixMask getInsnMask(PPCLegacyInsn insn) { in getInsnMask() 551 static void writeFromHalf16(uint8_t *loc, uint32_t insn) { in writeFromHalf16() 644 uint32_t insn = readFromHalf16(loc); in relaxGot() local 654 uint64_t insn = readPrefixedInstruction(loc); in relaxGot() local 669 uint64_t insn = readPrefixedInstruction(loc); in relaxGot() local 1278 uint32_t insn = readFromHalf16(loc); in relocate() local [all …]
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| H A D | RISCV.cpp | 85 static uint32_t setLO12_I(uint32_t insn, uint32_t imm) { in setLO12_I() 88 static uint32_t setLO12_S(uint32_t insn, uint32_t imm) { in setLO12_S() 313 uint16_t insn = read16le(loc) & 0xE383; in relocate() local 328 uint16_t insn = read16le(loc) & 0xE003; in relocate() local 360 uint32_t insn = read32le(loc) & 0xFFF; in relocate() local 375 uint32_t insn = read32le(loc) & 0x1FFF07F; in relocate() local 582 uint32_t insn = read32le(sec.rawData.data() + r.offset); in relaxTlsLe() local
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| H A D | X86.cpp | 580 const uint8_t insn[] = { in writePltHeader() local 603 const uint8_t insn[] = { in writePlt() local 634 const uint8_t insn[] = { in writePltHeader() local 662 const uint8_t insn[] = { in writePlt() local
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| H A D | PPC.cpp | 72 static void writeFromHalf16(uint8_t *loc, uint32_t insn) { in writeFromHalf16() 407 uint32_t insn = readFromHalf16(loc); in relaxTlsGdToIe() local 471 uint32_t insn = read32(loc); in relaxTlsIeToLe() local
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| H A D | X86_64.cpp | 1071 const uint8_t insn[] = { in writePltHeader() local 1094 const uint8_t insn[] = { in writePlt() local 1120 const uint8_t insn[] = { in writePltHeader() local 1137 const uint8_t insn[] = { in writePlt() local
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 893 DecodeThreeAddrSRegInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, in DecodeThreeAddrSRegInstruction() 954 static DecodeStatus DecodeMoveImmInstruction(MCInst &Inst, uint32_t insn, in DecodeMoveImmInstruction() 988 DecodeUnsignedLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, in DecodeUnsignedLdStInstruction() 1245 DecodeExclusiveLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, in DecodeExclusiveLdStInstruction() 1327 static DecodeStatus DecodePairLdStInstruction(MCInst &Inst, uint32_t insn, in DecodePairLdStInstruction() 1461 static DecodeStatus DecodeAuthLoadInstruction(MCInst &Inst, uint32_t insn, in DecodeAuthLoadInstruction() 1582 static DecodeStatus DecodeModImmInstruction(MCInst &Inst, uint32_t insn, in DecodeModImmInstruction() 1639 static DecodeStatus DecodeAdrInstruction(MCInst &Inst, uint32_t insn, in DecodeAdrInstruction() 1657 static DecodeStatus DecodeAddSubImmShift(MCInst &Inst, uint32_t insn, in DecodeAddSubImmShift() 1708 DecodeSystemPStateInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, in DecodeSystemPStateInstruction() [all …]
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| /llvm-project-15.0.7/lldb/source/API/ |
| H A D | SBInstructionList.cpp | 91 SBInstruction insn = GetInstructionAtIndex(i); in GetInstructionsCount() local 104 void SBInstructionList::AppendInstruction(SBInstruction insn) { in AppendInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 571 static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, in DecodeDAHIDATIMMR6() 600 static DecodeStatus DecodeAddiGroupBranch(MCInst &MI, InsnType insn, in DecodeAddiGroupBranch() 639 static DecodeStatus DecodePOP35GroupBranchMMR6(MCInst &MI, InsnType insn, in DecodePOP35GroupBranchMMR6() 673 static DecodeStatus DecodeDaddiGroupBranch(MCInst &MI, InsnType insn, in DecodeDaddiGroupBranch() 712 static DecodeStatus DecodePOP37GroupBranchMMR6(MCInst &MI, InsnType insn, in DecodePOP37GroupBranchMMR6() 746 static DecodeStatus DecodePOP65GroupBranchMMR6(MCInst &MI, InsnType insn, in DecodePOP65GroupBranchMMR6() 785 static DecodeStatus DecodePOP75GroupBranchMMR6(MCInst &MI, InsnType insn, in DecodePOP75GroupBranchMMR6() 824 static DecodeStatus DecodeBlezlGroupBranch(MCInst &MI, InsnType insn, in DecodeBlezlGroupBranch() 867 static DecodeStatus DecodeBgtzlGroupBranch(MCInst &MI, InsnType insn, in DecodeBgtzlGroupBranch() 911 static DecodeStatus DecodeBgtzGroupBranch(MCInst &MI, InsnType insn, in DecodeBgtzGroupBranch() [all …]
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | X86RecognizableInstr.cpp | 109 RecognizableInstrBase::RecognizableInstrBase(const CodeGenInstruction &insn) { in RecognizableInstrBase() 144 const CodeGenInstruction &insn, in RecognizableInstr() 166 const CodeGenInstruction &insn, in processInstr()
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| H A D | DecoderEmitter.cpp | 1596 insn_t insn; in filterProcessor() local
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| /llvm-project-15.0.7/lldb/source/Plugins/Architecture/Mips/ |
| H A D | ArchitectureMips.cpp | 117 auto insn = GetInstructionAtAddress(target, current_offset, addr); in GetBreakableLoadAddress() local
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| /llvm-project-15.0.7/lld/MachO/Arch/ |
| H A D | ARM64.cpp | 202 static bool parseAdrp(uint32_t insn, Adrp &adrp) { in parseAdrp() 209 static bool parseAdd(uint32_t insn, Add &add) { in parseAdd() 218 static bool parseLdr(uint32_t insn, Ldr &ldr) { in parseLdr()
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| /llvm-project-15.0.7/lldb/source/Plugins/Trace/intel-pt/ |
| H A D | DecodedThread.cpp | 183 void DecodedThread::AppendInstruction(const pt_insn &insn) { in AppendInstruction()
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| H A D | LibiptDecoder.cpp | 96 pt_insn insn; in DecodeInstructionsAndEvents() local
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| /llvm-project-15.0.7/lldb/source/Target/ |
| H A D | TraceDumper.cpp | 70 const TraceDumper::SymbolInfo &insn) { in IsSameInstructionSymbolContext()
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| /llvm-project-15.0.7/lldb/source/Plugins/Process/Utility/ |
| H A D | StopInfoMachException.cpp | 56 InstructionSP insn = insn_list.GetInstructionAtIndex(0); in GetPtrauthInstructionInfo() local
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 495 static bool decodeFPUV3Instruction(MCInst &MI, uint32_t insn, uint64_t Address, in decodeFPUV3Instruction()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGStmt.cpp | 600 if (llvm::Instruction *insn = dyn_cast<llvm::Instruction>(u)) { in EmitBlockAfterUses() local
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 4647 for (unsigned insn = TargetOpcode::GENERIC_OP_END+1; in genAllInsnTimingClasses() local
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