1 //===- RISCV.cpp ----------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "InputFiles.h"
10 #include "Symbols.h"
11 #include "SyntheticSections.h"
12 #include "Target.h"
13
14 using namespace llvm;
15 using namespace llvm::object;
16 using namespace llvm::support::endian;
17 using namespace llvm::ELF;
18 using namespace lld;
19 using namespace lld::elf;
20
21 namespace {
22
23 class RISCV final : public TargetInfo {
24 public:
25 RISCV();
26 uint32_t calcEFlags() const override;
27 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
28 void writeGotHeader(uint8_t *buf) const override;
29 void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
30 void writeIgotPlt(uint8_t *buf, const Symbol &s) const override;
31 void writePltHeader(uint8_t *buf) const override;
32 void writePlt(uint8_t *buf, const Symbol &sym,
33 uint64_t pltEntryAddr) const override;
34 RelType getDynRel(RelType type) const override;
35 RelExpr getRelExpr(RelType type, const Symbol &s,
36 const uint8_t *loc) const override;
37 void relocate(uint8_t *loc, const Relocation &rel,
38 uint64_t val) const override;
39 };
40
41 } // end anonymous namespace
42
43 const uint64_t dtpOffset = 0x800;
44
45 enum Op {
46 ADDI = 0x13,
47 AUIPC = 0x17,
48 JALR = 0x67,
49 LD = 0x3003,
50 LW = 0x2003,
51 SRLI = 0x5013,
52 SUB = 0x40000033,
53 };
54
55 enum Reg {
56 X_RA = 1,
57 X_T0 = 5,
58 X_T1 = 6,
59 X_T2 = 7,
60 X_T3 = 28,
61 };
62
hi20(uint32_t val)63 static uint32_t hi20(uint32_t val) { return (val + 0x800) >> 12; }
lo12(uint32_t val)64 static uint32_t lo12(uint32_t val) { return val & 4095; }
65
itype(uint32_t op,uint32_t rd,uint32_t rs1,uint32_t imm)66 static uint32_t itype(uint32_t op, uint32_t rd, uint32_t rs1, uint32_t imm) {
67 return op | (rd << 7) | (rs1 << 15) | (imm << 20);
68 }
rtype(uint32_t op,uint32_t rd,uint32_t rs1,uint32_t rs2)69 static uint32_t rtype(uint32_t op, uint32_t rd, uint32_t rs1, uint32_t rs2) {
70 return op | (rd << 7) | (rs1 << 15) | (rs2 << 20);
71 }
utype(uint32_t op,uint32_t rd,uint32_t imm)72 static uint32_t utype(uint32_t op, uint32_t rd, uint32_t imm) {
73 return op | (rd << 7) | (imm << 12);
74 }
75
RISCV()76 RISCV::RISCV() {
77 copyRel = R_RISCV_COPY;
78 noneRel = R_RISCV_NONE;
79 pltRel = R_RISCV_JUMP_SLOT;
80 relativeRel = R_RISCV_RELATIVE;
81 iRelativeRel = R_RISCV_IRELATIVE;
82 if (config->is64) {
83 symbolicRel = R_RISCV_64;
84 tlsModuleIndexRel = R_RISCV_TLS_DTPMOD64;
85 tlsOffsetRel = R_RISCV_TLS_DTPREL64;
86 tlsGotRel = R_RISCV_TLS_TPREL64;
87 } else {
88 symbolicRel = R_RISCV_32;
89 tlsModuleIndexRel = R_RISCV_TLS_DTPMOD32;
90 tlsOffsetRel = R_RISCV_TLS_DTPREL32;
91 tlsGotRel = R_RISCV_TLS_TPREL32;
92 }
93 gotRel = symbolicRel;
94
95 // .got[0] = _DYNAMIC
96 gotBaseSymInGotPlt = false;
97 gotHeaderEntriesNum = 1;
98
99 // .got.plt[0] = _dl_runtime_resolve, .got.plt[1] = link_map
100 gotPltHeaderEntriesNum = 2;
101
102 pltHeaderSize = 32;
103 pltEntrySize = 16;
104 ipltEntrySize = 16;
105 }
106
getEFlags(InputFile * f)107 static uint32_t getEFlags(InputFile *f) {
108 if (config->is64)
109 return cast<ObjFile<ELF64LE>>(f)->getObj().getHeader().e_flags;
110 return cast<ObjFile<ELF32LE>>(f)->getObj().getHeader().e_flags;
111 }
112
calcEFlags() const113 uint32_t RISCV::calcEFlags() const {
114 // If there are only binary input files (from -b binary), use a
115 // value of 0 for the ELF header flags.
116 if (objectFiles.empty())
117 return 0;
118
119 uint32_t target = getEFlags(objectFiles.front());
120
121 for (InputFile *f : objectFiles) {
122 uint32_t eflags = getEFlags(f);
123 if (eflags & EF_RISCV_RVC)
124 target |= EF_RISCV_RVC;
125
126 if ((eflags & EF_RISCV_FLOAT_ABI) != (target & EF_RISCV_FLOAT_ABI))
127 error(toString(f) +
128 ": cannot link object files with different floating-point ABI");
129
130 if ((eflags & EF_RISCV_RVE) != (target & EF_RISCV_RVE))
131 error(toString(f) +
132 ": cannot link object files with different EF_RISCV_RVE");
133 }
134
135 return target;
136 }
137
getImplicitAddend(const uint8_t * buf,RelType type) const138 int64_t RISCV::getImplicitAddend(const uint8_t *buf, RelType type) const {
139 switch (type) {
140 default:
141 internalLinkerError(getErrorLocation(buf),
142 "cannot read addend for relocation " + toString(type));
143 return 0;
144 case R_RISCV_32:
145 case R_RISCV_TLS_DTPMOD32:
146 case R_RISCV_TLS_DTPREL32:
147 return SignExtend64<32>(read32le(buf));
148 case R_RISCV_64:
149 return read64le(buf);
150 case R_RISCV_RELATIVE:
151 case R_RISCV_IRELATIVE:
152 return config->is64 ? read64le(buf) : read32le(buf);
153 case R_RISCV_NONE:
154 case R_RISCV_JUMP_SLOT:
155 // These relocations are defined as not having an implicit addend.
156 return 0;
157 }
158 }
159
writeGotHeader(uint8_t * buf) const160 void RISCV::writeGotHeader(uint8_t *buf) const {
161 if (config->is64)
162 write64le(buf, mainPart->dynamic->getVA());
163 else
164 write32le(buf, mainPart->dynamic->getVA());
165 }
166
writeGotPlt(uint8_t * buf,const Symbol & s) const167 void RISCV::writeGotPlt(uint8_t *buf, const Symbol &s) const {
168 if (config->is64)
169 write64le(buf, in.plt->getVA());
170 else
171 write32le(buf, in.plt->getVA());
172 }
173
writeIgotPlt(uint8_t * buf,const Symbol & s) const174 void RISCV::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
175 if (config->writeAddends) {
176 if (config->is64)
177 write64le(buf, s.getVA());
178 else
179 write32le(buf, s.getVA());
180 }
181 }
182
writePltHeader(uint8_t * buf) const183 void RISCV::writePltHeader(uint8_t *buf) const {
184 // 1: auipc t2, %pcrel_hi(.got.plt)
185 // sub t1, t1, t3
186 // l[wd] t3, %pcrel_lo(1b)(t2); t3 = _dl_runtime_resolve
187 // addi t1, t1, -pltHeaderSize-12; t1 = &.plt[i] - &.plt[0]
188 // addi t0, t2, %pcrel_lo(1b)
189 // srli t1, t1, (rv64?1:2); t1 = &.got.plt[i] - &.got.plt[0]
190 // l[wd] t0, Wordsize(t0); t0 = link_map
191 // jr t3
192 uint32_t offset = in.gotPlt->getVA() - in.plt->getVA();
193 uint32_t load = config->is64 ? LD : LW;
194 write32le(buf + 0, utype(AUIPC, X_T2, hi20(offset)));
195 write32le(buf + 4, rtype(SUB, X_T1, X_T1, X_T3));
196 write32le(buf + 8, itype(load, X_T3, X_T2, lo12(offset)));
197 write32le(buf + 12, itype(ADDI, X_T1, X_T1, -target->pltHeaderSize - 12));
198 write32le(buf + 16, itype(ADDI, X_T0, X_T2, lo12(offset)));
199 write32le(buf + 20, itype(SRLI, X_T1, X_T1, config->is64 ? 1 : 2));
200 write32le(buf + 24, itype(load, X_T0, X_T0, config->wordsize));
201 write32le(buf + 28, itype(JALR, 0, X_T3, 0));
202 }
203
writePlt(uint8_t * buf,const Symbol & sym,uint64_t pltEntryAddr) const204 void RISCV::writePlt(uint8_t *buf, const Symbol &sym,
205 uint64_t pltEntryAddr) const {
206 // 1: auipc t3, %pcrel_hi([email protected])
207 // l[wd] t3, %pcrel_lo(1b)(t3)
208 // jalr t1, t3
209 // nop
210 uint32_t offset = sym.getGotPltVA() - pltEntryAddr;
211 write32le(buf + 0, utype(AUIPC, X_T3, hi20(offset)));
212 write32le(buf + 4, itype(config->is64 ? LD : LW, X_T3, X_T3, lo12(offset)));
213 write32le(buf + 8, itype(JALR, X_T1, X_T3, 0));
214 write32le(buf + 12, itype(ADDI, 0, 0, 0));
215 }
216
getDynRel(RelType type) const217 RelType RISCV::getDynRel(RelType type) const {
218 return type == target->symbolicRel ? type
219 : static_cast<RelType>(R_RISCV_NONE);
220 }
221
getRelExpr(const RelType type,const Symbol & s,const uint8_t * loc) const222 RelExpr RISCV::getRelExpr(const RelType type, const Symbol &s,
223 const uint8_t *loc) const {
224 switch (type) {
225 case R_RISCV_NONE:
226 return R_NONE;
227 case R_RISCV_32:
228 case R_RISCV_64:
229 case R_RISCV_HI20:
230 case R_RISCV_LO12_I:
231 case R_RISCV_LO12_S:
232 case R_RISCV_RVC_LUI:
233 return R_ABS;
234 case R_RISCV_ADD8:
235 case R_RISCV_ADD16:
236 case R_RISCV_ADD32:
237 case R_RISCV_ADD64:
238 case R_RISCV_SET6:
239 case R_RISCV_SET8:
240 case R_RISCV_SET16:
241 case R_RISCV_SET32:
242 case R_RISCV_SUB6:
243 case R_RISCV_SUB8:
244 case R_RISCV_SUB16:
245 case R_RISCV_SUB32:
246 case R_RISCV_SUB64:
247 return R_RISCV_ADD;
248 case R_RISCV_JAL:
249 case R_RISCV_BRANCH:
250 case R_RISCV_PCREL_HI20:
251 case R_RISCV_RVC_BRANCH:
252 case R_RISCV_RVC_JUMP:
253 case R_RISCV_32_PCREL:
254 return R_PC;
255 case R_RISCV_CALL:
256 case R_RISCV_CALL_PLT:
257 return R_PLT_PC;
258 case R_RISCV_GOT_HI20:
259 return R_GOT_PC;
260 case R_RISCV_PCREL_LO12_I:
261 case R_RISCV_PCREL_LO12_S:
262 return R_RISCV_PC_INDIRECT;
263 case R_RISCV_TLS_GD_HI20:
264 return R_TLSGD_PC;
265 case R_RISCV_TLS_GOT_HI20:
266 config->hasStaticTlsModel = true;
267 return R_GOT_PC;
268 case R_RISCV_TPREL_HI20:
269 case R_RISCV_TPREL_LO12_I:
270 case R_RISCV_TPREL_LO12_S:
271 return R_TPREL;
272 case R_RISCV_RELAX:
273 case R_RISCV_TPREL_ADD:
274 return R_NONE;
275 case R_RISCV_ALIGN:
276 // Not just a hint; always padded to the worst-case number of NOPs, so may
277 // not currently be aligned, and without linker relaxation support we can't
278 // delete NOPs to realign.
279 errorOrWarn(getErrorLocation(loc) + "relocation R_RISCV_ALIGN requires "
280 "unimplemented linker relaxation; recompile with -mno-relax");
281 return R_NONE;
282 default:
283 error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
284 ") against symbol " + toString(s));
285 return R_NONE;
286 }
287 }
288
289 // Extract bits V[Begin:End], where range is inclusive, and Begin must be < 63.
extractBits(uint64_t v,uint32_t begin,uint32_t end)290 static uint32_t extractBits(uint64_t v, uint32_t begin, uint32_t end) {
291 return (v & ((1ULL << (begin + 1)) - 1)) >> end;
292 }
293
relocate(uint8_t * loc,const Relocation & rel,uint64_t val) const294 void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
295 const unsigned bits = config->wordsize * 8;
296
297 switch (rel.type) {
298 case R_RISCV_32:
299 write32le(loc, val);
300 return;
301 case R_RISCV_64:
302 write64le(loc, val);
303 return;
304
305 case R_RISCV_RVC_BRANCH: {
306 checkInt(loc, static_cast<int64_t>(val) >> 1, 8, rel);
307 checkAlignment(loc, val, 2, rel);
308 uint16_t insn = read16le(loc) & 0xE383;
309 uint16_t imm8 = extractBits(val, 8, 8) << 12;
310 uint16_t imm4_3 = extractBits(val, 4, 3) << 10;
311 uint16_t imm7_6 = extractBits(val, 7, 6) << 5;
312 uint16_t imm2_1 = extractBits(val, 2, 1) << 3;
313 uint16_t imm5 = extractBits(val, 5, 5) << 2;
314 insn |= imm8 | imm4_3 | imm7_6 | imm2_1 | imm5;
315
316 write16le(loc, insn);
317 return;
318 }
319
320 case R_RISCV_RVC_JUMP: {
321 checkInt(loc, static_cast<int64_t>(val) >> 1, 11, rel);
322 checkAlignment(loc, val, 2, rel);
323 uint16_t insn = read16le(loc) & 0xE003;
324 uint16_t imm11 = extractBits(val, 11, 11) << 12;
325 uint16_t imm4 = extractBits(val, 4, 4) << 11;
326 uint16_t imm9_8 = extractBits(val, 9, 8) << 9;
327 uint16_t imm10 = extractBits(val, 10, 10) << 8;
328 uint16_t imm6 = extractBits(val, 6, 6) << 7;
329 uint16_t imm7 = extractBits(val, 7, 7) << 6;
330 uint16_t imm3_1 = extractBits(val, 3, 1) << 3;
331 uint16_t imm5 = extractBits(val, 5, 5) << 2;
332 insn |= imm11 | imm4 | imm9_8 | imm10 | imm6 | imm7 | imm3_1 | imm5;
333
334 write16le(loc, insn);
335 return;
336 }
337
338 case R_RISCV_RVC_LUI: {
339 int64_t imm = SignExtend64(val + 0x800, bits) >> 12;
340 checkInt(loc, imm, 6, rel);
341 if (imm == 0) { // `c.lui rd, 0` is illegal, convert to `c.li rd, 0`
342 write16le(loc, (read16le(loc) & 0x0F83) | 0x4000);
343 } else {
344 uint16_t imm17 = extractBits(val + 0x800, 17, 17) << 12;
345 uint16_t imm16_12 = extractBits(val + 0x800, 16, 12) << 2;
346 write16le(loc, (read16le(loc) & 0xEF83) | imm17 | imm16_12);
347 }
348 return;
349 }
350
351 case R_RISCV_JAL: {
352 checkInt(loc, static_cast<int64_t>(val) >> 1, 20, rel);
353 checkAlignment(loc, val, 2, rel);
354
355 uint32_t insn = read32le(loc) & 0xFFF;
356 uint32_t imm20 = extractBits(val, 20, 20) << 31;
357 uint32_t imm10_1 = extractBits(val, 10, 1) << 21;
358 uint32_t imm11 = extractBits(val, 11, 11) << 20;
359 uint32_t imm19_12 = extractBits(val, 19, 12) << 12;
360 insn |= imm20 | imm10_1 | imm11 | imm19_12;
361
362 write32le(loc, insn);
363 return;
364 }
365
366 case R_RISCV_BRANCH: {
367 checkInt(loc, static_cast<int64_t>(val) >> 1, 12, rel);
368 checkAlignment(loc, val, 2, rel);
369
370 uint32_t insn = read32le(loc) & 0x1FFF07F;
371 uint32_t imm12 = extractBits(val, 12, 12) << 31;
372 uint32_t imm10_5 = extractBits(val, 10, 5) << 25;
373 uint32_t imm4_1 = extractBits(val, 4, 1) << 8;
374 uint32_t imm11 = extractBits(val, 11, 11) << 7;
375 insn |= imm12 | imm10_5 | imm4_1 | imm11;
376
377 write32le(loc, insn);
378 return;
379 }
380
381 // auipc + jalr pair
382 case R_RISCV_CALL:
383 case R_RISCV_CALL_PLT: {
384 int64_t hi = SignExtend64(val + 0x800, bits) >> 12;
385 checkInt(loc, hi, 20, rel);
386 if (isInt<20>(hi)) {
387 relocateNoSym(loc, R_RISCV_PCREL_HI20, val);
388 relocateNoSym(loc + 4, R_RISCV_PCREL_LO12_I, val);
389 }
390 return;
391 }
392
393 case R_RISCV_GOT_HI20:
394 case R_RISCV_PCREL_HI20:
395 case R_RISCV_TLS_GD_HI20:
396 case R_RISCV_TLS_GOT_HI20:
397 case R_RISCV_TPREL_HI20:
398 case R_RISCV_HI20: {
399 uint64_t hi = val + 0x800;
400 checkInt(loc, SignExtend64(hi, bits) >> 12, 20, rel);
401 write32le(loc, (read32le(loc) & 0xFFF) | (hi & 0xFFFFF000));
402 return;
403 }
404
405 case R_RISCV_PCREL_LO12_I:
406 case R_RISCV_TPREL_LO12_I:
407 case R_RISCV_LO12_I: {
408 uint64_t hi = (val + 0x800) >> 12;
409 uint64_t lo = val - (hi << 12);
410 write32le(loc, (read32le(loc) & 0xFFFFF) | ((lo & 0xFFF) << 20));
411 return;
412 }
413
414 case R_RISCV_PCREL_LO12_S:
415 case R_RISCV_TPREL_LO12_S:
416 case R_RISCV_LO12_S: {
417 uint64_t hi = (val + 0x800) >> 12;
418 uint64_t lo = val - (hi << 12);
419 uint32_t imm11_5 = extractBits(lo, 11, 5) << 25;
420 uint32_t imm4_0 = extractBits(lo, 4, 0) << 7;
421 write32le(loc, (read32le(loc) & 0x1FFF07F) | imm11_5 | imm4_0);
422 return;
423 }
424
425 case R_RISCV_ADD8:
426 *loc += val;
427 return;
428 case R_RISCV_ADD16:
429 write16le(loc, read16le(loc) + val);
430 return;
431 case R_RISCV_ADD32:
432 write32le(loc, read32le(loc) + val);
433 return;
434 case R_RISCV_ADD64:
435 write64le(loc, read64le(loc) + val);
436 return;
437 case R_RISCV_SUB6:
438 *loc = (*loc & 0xc0) | (((*loc & 0x3f) - val) & 0x3f);
439 return;
440 case R_RISCV_SUB8:
441 *loc -= val;
442 return;
443 case R_RISCV_SUB16:
444 write16le(loc, read16le(loc) - val);
445 return;
446 case R_RISCV_SUB32:
447 write32le(loc, read32le(loc) - val);
448 return;
449 case R_RISCV_SUB64:
450 write64le(loc, read64le(loc) - val);
451 return;
452 case R_RISCV_SET6:
453 *loc = (*loc & 0xc0) | (val & 0x3f);
454 return;
455 case R_RISCV_SET8:
456 *loc = val;
457 return;
458 case R_RISCV_SET16:
459 write16le(loc, val);
460 return;
461 case R_RISCV_SET32:
462 case R_RISCV_32_PCREL:
463 write32le(loc, val);
464 return;
465
466 case R_RISCV_TLS_DTPREL32:
467 write32le(loc, val - dtpOffset);
468 break;
469 case R_RISCV_TLS_DTPREL64:
470 write64le(loc, val - dtpOffset);
471 break;
472
473 case R_RISCV_RELAX:
474 return; // Ignored (for now)
475
476 default:
477 llvm_unreachable("unknown relocation");
478 }
479 }
480
getRISCVTargetInfo()481 TargetInfo *elf::getRISCVTargetInfo() {
482 static RISCV target;
483 return ⌖
484 }
485