1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2012-2016 Ruslan Bukin <[email protected]>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*
30 * RME HDSPe driver for FreeBSD.
31 * Supported cards: AIO, RayDAT.
32 */
33
34 #include <dev/sound/pcm/sound.h>
35 #include <dev/sound/pci/hdspe.h>
36 #include <dev/sound/chip.h>
37
38 #include <dev/pci/pcireg.h>
39 #include <dev/pci/pcivar.h>
40
41 #include <mixer_if.h>
42
43 SND_DECLARE_FILE("$FreeBSD$");
44
45 static struct hdspe_channel chan_map_aio[] = {
46 { 0, 1, "line", 1, 1 },
47 { 6, 7, "phone", 1, 0 },
48 { 8, 9, "aes", 1, 1 },
49 { 10, 11, "s/pdif", 1, 1 },
50 { 12, 16, "adat", 1, 1 },
51
52 /* Single or double speed. */
53 { 14, 18, "adat", 1, 1 },
54
55 /* Single speed only. */
56 { 13, 15, "adat", 1, 1 },
57 { 17, 19, "adat", 1, 1 },
58
59 { 0, 0, NULL, 0, 0 },
60 };
61
62 static struct hdspe_channel chan_map_rd[] = {
63 { 0, 1, "aes", 1, 1 },
64 { 2, 3, "s/pdif", 1, 1 },
65 { 4, 5, "adat", 1, 1 },
66 { 6, 7, "adat", 1, 1 },
67 { 8, 9, "adat", 1, 1 },
68 { 10, 11, "adat", 1, 1 },
69
70 /* Single or double speed. */
71 { 12, 13, "adat", 1, 1 },
72 { 14, 15, "adat", 1, 1 },
73 { 16, 17, "adat", 1, 1 },
74 { 18, 19, "adat", 1, 1 },
75
76 /* Single speed only. */
77 { 20, 21, "adat", 1, 1 },
78 { 22, 23, "adat", 1, 1 },
79 { 24, 25, "adat", 1, 1 },
80 { 26, 27, "adat", 1, 1 },
81 { 28, 29, "adat", 1, 1 },
82 { 30, 31, "adat", 1, 1 },
83 { 32, 33, "adat", 1, 1 },
84 { 34, 35, "adat", 1, 1 },
85
86 { 0, 0, NULL, 0, 0 },
87 };
88
89 static void
hdspe_intr(void * p)90 hdspe_intr(void *p)
91 {
92 struct sc_pcminfo *scp;
93 struct sc_info *sc;
94 device_t *devlist;
95 int devcount;
96 int status;
97 int err;
98 int i;
99
100 sc = (struct sc_info *)p;
101
102 snd_mtxlock(sc->lock);
103
104 status = hdspe_read_1(sc, HDSPE_STATUS_REG);
105 if (status & HDSPE_AUDIO_IRQ_PENDING) {
106 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
107 return;
108
109 for (i = 0; i < devcount; i++) {
110 scp = device_get_ivars(devlist[i]);
111 if (scp->ih != NULL)
112 scp->ih(scp);
113 }
114
115 hdspe_write_1(sc, HDSPE_INTERRUPT_ACK, 0);
116 free(devlist, M_TEMP);
117 }
118
119 snd_mtxunlock(sc->lock);
120 }
121
122 static void
hdspe_dmapsetmap(void * arg,bus_dma_segment_t * segs,int nseg,int error)123 hdspe_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
124 {
125 struct sc_info *sc;
126
127 sc = (struct sc_info *)arg;
128
129 #if 0
130 device_printf(sc->dev, "hdspe_dmapsetmap()\n");
131 #endif
132 }
133
134 static int
hdspe_alloc_resources(struct sc_info * sc)135 hdspe_alloc_resources(struct sc_info *sc)
136 {
137
138 /* Allocate resource. */
139 sc->csid = PCIR_BAR(0);
140 sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
141 &sc->csid, RF_ACTIVE);
142
143 if (!sc->cs) {
144 device_printf(sc->dev, "Unable to map SYS_RES_MEMORY.\n");
145 return (ENXIO);
146 }
147
148 sc->cst = rman_get_bustag(sc->cs);
149 sc->csh = rman_get_bushandle(sc->cs);
150
151 /* Allocate interrupt resource. */
152 sc->irqid = 0;
153 sc->irq = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &sc->irqid,
154 RF_ACTIVE | RF_SHAREABLE);
155
156 if (!sc->irq ||
157 bus_setup_intr(sc->dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV,
158 NULL, hdspe_intr, sc, &sc->ih)) {
159 device_printf(sc->dev, "Unable to alloc interrupt resource.\n");
160 return (ENXIO);
161 }
162
163 /* Allocate DMA resources. */
164 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev),
165 /*alignment*/4,
166 /*boundary*/0,
167 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
168 /*highaddr*/BUS_SPACE_MAXADDR,
169 /*filter*/NULL,
170 /*filterarg*/NULL,
171 /*maxsize*/2 * HDSPE_DMASEGSIZE,
172 /*nsegments*/2,
173 /*maxsegsz*/HDSPE_DMASEGSIZE,
174 /*flags*/0,
175 /*lockfunc*/busdma_lock_mutex,
176 /*lockarg*/&Giant,
177 /*dmatag*/&sc->dmat) != 0) {
178 device_printf(sc->dev, "Unable to create dma tag.\n");
179 return (ENXIO);
180 }
181
182 sc->bufsize = HDSPE_DMASEGSIZE;
183
184 /* pbuf (play buffer). */
185 if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf,
186 BUS_DMA_NOWAIT, &sc->pmap)) {
187 device_printf(sc->dev, "Can't alloc pbuf.\n");
188 return (ENXIO);
189 }
190
191 if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->bufsize,
192 hdspe_dmapsetmap, sc, 0)) {
193 device_printf(sc->dev, "Can't load pbuf.\n");
194 return (ENXIO);
195 }
196
197 /* rbuf (rec buffer). */
198 if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf,
199 BUS_DMA_NOWAIT, &sc->rmap)) {
200 device_printf(sc->dev, "Can't alloc rbuf.\n");
201 return (ENXIO);
202 }
203
204 if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->bufsize,
205 hdspe_dmapsetmap, sc, 0)) {
206 device_printf(sc->dev, "Can't load rbuf.\n");
207 return (ENXIO);
208 }
209
210 bzero(sc->pbuf, sc->bufsize);
211 bzero(sc->rbuf, sc->bufsize);
212
213 return (0);
214 }
215
216 static void
hdspe_map_dmabuf(struct sc_info * sc)217 hdspe_map_dmabuf(struct sc_info *sc)
218 {
219 uint32_t paddr, raddr;
220 int i;
221
222 paddr = vtophys(sc->pbuf);
223 raddr = vtophys(sc->rbuf);
224
225 for (i = 0; i < HDSPE_MAX_SLOTS * 16; i++) {
226 hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_OUT + 4 * i,
227 paddr + i * 4096);
228 hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_IN + 4 * i,
229 raddr + i * 4096);
230 }
231 }
232
233 static int
hdspe_probe(device_t dev)234 hdspe_probe(device_t dev)
235 {
236 uint32_t rev;
237
238 if (pci_get_vendor(dev) == PCI_VENDOR_XILINX &&
239 pci_get_device(dev) == PCI_DEVICE_XILINX_HDSPE) {
240 rev = pci_get_revid(dev);
241 switch (rev) {
242 case PCI_REVISION_AIO:
243 device_set_desc(dev, "RME HDSPe AIO");
244 return (0);
245 case PCI_REVISION_RAYDAT:
246 device_set_desc(dev, "RME HDSPe RayDAT");
247 return (0);
248 }
249 }
250
251 return (ENXIO);
252 }
253
254 static int
hdspe_init(struct sc_info * sc)255 hdspe_init(struct sc_info *sc)
256 {
257 long long period;
258
259 /* Set defaults. */
260 sc->ctrl_register |= HDSPM_CLOCK_MODE_MASTER;
261
262 /* Set latency. */
263 sc->period = 32;
264 sc->ctrl_register = hdspe_encode_latency(7);
265
266 /* Set rate. */
267 sc->speed = HDSPE_SPEED_DEFAULT;
268 sc->ctrl_register &= ~HDSPE_FREQ_MASK;
269 sc->ctrl_register |= HDSPE_FREQ_MASK_DEFAULT;
270 hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register);
271
272 switch (sc->type) {
273 case RAYDAT:
274 case AIO:
275 period = HDSPE_FREQ_AIO;
276 break;
277 default:
278 return (ENXIO);
279 }
280
281 /* Set DDS value. */
282 period /= sc->speed;
283 hdspe_write_4(sc, HDSPE_FREQ_REG, period);
284
285 /* Other settings. */
286 sc->settings_register = 0;
287 hdspe_write_4(sc, HDSPE_SETTINGS_REG, sc->settings_register);
288
289 return (0);
290 }
291
292 static int
hdspe_attach(device_t dev)293 hdspe_attach(device_t dev)
294 {
295 struct hdspe_channel *chan_map;
296 struct sc_pcminfo *scp;
297 struct sc_info *sc;
298 uint32_t rev;
299 int i, err;
300
301 #if 0
302 device_printf(dev, "hdspe_attach()\n");
303 #endif
304
305 sc = device_get_softc(dev);
306 sc->lock = snd_mtxcreate(device_get_nameunit(dev),
307 "snd_hdspe softc");
308 sc->dev = dev;
309
310 pci_enable_busmaster(dev);
311 rev = pci_get_revid(dev);
312 switch (rev) {
313 case PCI_REVISION_AIO:
314 sc->type = AIO;
315 chan_map = chan_map_aio;
316 break;
317 case PCI_REVISION_RAYDAT:
318 sc->type = RAYDAT;
319 chan_map = chan_map_rd;
320 break;
321 default:
322 return (ENXIO);
323 }
324
325 /* Allocate resources. */
326 err = hdspe_alloc_resources(sc);
327 if (err) {
328 device_printf(dev, "Unable to allocate system resources.\n");
329 return (ENXIO);
330 }
331
332 if (hdspe_init(sc) != 0)
333 return (ENXIO);
334
335 for (i = 0; i < HDSPE_MAX_CHANS && chan_map[i].descr != NULL; i++) {
336 scp = malloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
337 scp->hc = &chan_map[i];
338 scp->sc = sc;
339 scp->dev = device_add_child(dev, "pcm", -1);
340 device_set_ivars(scp->dev, scp);
341 }
342
343 hdspe_map_dmabuf(sc);
344
345 return (bus_generic_attach(dev));
346 }
347
348 static void
hdspe_dmafree(struct sc_info * sc)349 hdspe_dmafree(struct sc_info *sc)
350 {
351
352 bus_dmamap_unload(sc->dmat, sc->rmap);
353 bus_dmamap_unload(sc->dmat, sc->pmap);
354 bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap);
355 bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap);
356 sc->rbuf = sc->pbuf = NULL;
357 }
358
359 static int
hdspe_detach(device_t dev)360 hdspe_detach(device_t dev)
361 {
362 struct sc_info *sc;
363 int err;
364
365 sc = device_get_softc(dev);
366 if (sc == NULL) {
367 device_printf(dev,"Can't detach: softc is null.\n");
368 return (0);
369 }
370
371 err = device_delete_children(dev);
372 if (err)
373 return (err);
374
375 hdspe_dmafree(sc);
376
377 if (sc->ih)
378 bus_teardown_intr(dev, sc->irq, sc->ih);
379 if (sc->dmat)
380 bus_dma_tag_destroy(sc->dmat);
381 if (sc->irq)
382 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
383 if (sc->cs)
384 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), sc->cs);
385 if (sc->lock)
386 snd_mtxfree(sc->lock);
387
388 return (0);
389 }
390
391 static device_method_t hdspe_methods[] = {
392 DEVMETHOD(device_probe, hdspe_probe),
393 DEVMETHOD(device_attach, hdspe_attach),
394 DEVMETHOD(device_detach, hdspe_detach),
395 { 0, 0 }
396 };
397
398 static driver_t hdspe_driver = {
399 "hdspe",
400 hdspe_methods,
401 PCM_SOFTC_SIZE,
402 };
403
404 static devclass_t hdspe_devclass;
405
406 DRIVER_MODULE(snd_hdspe, pci, hdspe_driver, hdspe_devclass, 0, 0);
407