| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MachineLocation.h | 47 unsigned getReg() const { return Register; } in getReg() function
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| H A D | MCInst.h | 69 unsigned getReg() const { in getReg() function
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | MIRVRegNamerUtils.h | 45 Register getReg() const { return Reg; } in getReg() function
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | LiveRangeEdit.h | 147 Register getReg() const { return getParent().reg(); } in getReg() function
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| H A D | ScheduleDAG.h | 218 unsigned getReg() const { in getReg() function
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| H A D | MachineInstrBuilder.h | 94 Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); } in getReg() function
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| H A D | CallingConvLower.h | 77 static CCValAssign getReg(unsigned ValNo, MVT ValVT, in getReg() function
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| H A D | MachineOperand.h | 359 Register getReg() const { in getReg() function
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| H A D | MachineFrameInfo.h | 60 Register getReg() const { return Reg; } in getReg() function
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 361 Register getReg() const { in getReg() function
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| H A D | GenericMachineInstrs.h | 32 Register getReg(unsigned Idx) const { return getOperand(Idx).getReg(); } in getReg() function
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| H A D | MachineIRBuilder.h | 106 Register getReg() const { in getReg() function 178 Register getReg() const { in getReg() function
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsOptimizePICCall.cpp | 306 unsigned OptimizePICCall::getReg(ValueType Entry) { in getReg() function in OptimizePICCall
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 149 unsigned getReg() const override { in getReg() function
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 186 unsigned getReg() const override { in getReg() function in __anon37a612fe0111::MSP430Operand
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/AsmParser/ |
| H A D | LoongArchAsmParser.cpp | 172 unsigned getReg() const override { in getReg() function in __anon1ba74a0a0111::LoongArchOperand
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| /llvm-project-15.0.7/libunwind/src/ |
| H A D | UnwindCursor.hpp | 433 virtual unw_word_t getReg(int) { _LIBUNWIND_ABORT("getReg not implemented"); } in getReg() function in libunwind::AbstractUnwindCursor 695 unw_word_t UnwindCursor<A, R>::getReg(int regNum) { in getReg() function in libunwind::UnwindCursor 1315 unw_word_t UnwindCursor<A, R>::getReg(int regNum) { in getReg() function in libunwind::UnwindCursor
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 197 unsigned getReg() const override { in getReg() function in __anonc58108e20111::AVROperand
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | FastISelEmitter.cpp | 98 static OpKind getReg() { OpKind K; K.Repr = OK_Reg; return K; } in getReg() function in __anon7553c2e00311::OperandsSignature::OpKind
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| H A D | CodeGenRegisters.cpp | 224 const CodeGenRegister *getReg() const { assert(isValid()); return *RegI; } in getReg() function in __anoncff4b8180111::RegUnitIterator 1289 CodeGenRegister *CodeGenRegBank::getReg(Record *Def) { in getReg() function in CodeGenRegBank
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/AsmParser/ |
| H A D | M68kAsmParser.cpp | 304 unsigned M68kOperand::getReg() const { in getReg() function in M68kOperand
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 87 unsigned getReg() const { in getReg() function in __anon05a1f9dc0111::WebAssemblyFastISel::Address
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 69 static unsigned getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo) { in getReg() function
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| /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 170 unsigned getReg() const override { in getReg() function
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 331 unsigned getReg() const override { in getReg() function in __anon07e578c20211::SparcOperand
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