1 /*-
2 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3 * Copyright (C) 1995, 1996 TooLs GmbH.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by TooLs GmbH.
17 * 4. The name of TooLs GmbH may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
32 */
33
34 #include <sys/cdefs.h>
35 #include <sys/param.h>
36 #include <sys/kdb.h>
37 #include <sys/proc.h>
38 #include <sys/ktr.h>
39 #include <sys/lock.h>
40 #include <sys/mutex.h>
41 #include <sys/ptrace.h>
42 #include <sys/reboot.h>
43 #include <sys/syscall.h>
44 #include <sys/sysent.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/uio.h>
48 #include <sys/signalvar.h>
49 #include <sys/vmmeter.h>
50
51 #include <security/audit/audit.h>
52
53 #include <vm/vm.h>
54 #include <vm/pmap.h>
55 #include <vm/vm_extern.h>
56 #include <vm/vm_param.h>
57 #include <vm/vm_kern.h>
58 #include <vm/vm_map.h>
59 #include <vm/vm_page.h>
60
61 #include <machine/_inttypes.h>
62 #include <machine/altivec.h>
63 #include <machine/cpu.h>
64 #include <machine/db_machdep.h>
65 #include <machine/fpu.h>
66 #include <machine/frame.h>
67 #include <machine/pcb.h>
68 #include <machine/psl.h>
69 #include <machine/slb.h>
70 #include <machine/spr.h>
71 #include <machine/sr.h>
72 #include <machine/trap.h>
73
74 /* Below matches setjmp.S */
75 #define FAULTBUF_LR 21
76 #define FAULTBUF_R1 1
77 #define FAULTBUF_R2 2
78 #define FAULTBUF_CR 22
79 #define FAULTBUF_R14 3
80
81 #define MOREARGS(sp) ((caddr_t)((uintptr_t)(sp) + \
82 sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
83
84 static void trap_fatal(struct trapframe *frame);
85 static void printtrap(u_int vector, struct trapframe *frame, int isfatal,
86 int user);
87 static bool trap_pfault(struct trapframe *frame, bool user, int *signo,
88 int *ucode);
89 static int fix_unaligned(struct thread *td, struct trapframe *frame);
90 static int handle_onfault(struct trapframe *frame);
91 static void syscall(struct trapframe *frame);
92
93 #if defined(__powerpc64__) && defined(AIM)
94 static void normalize_inputs(void);
95 #endif
96
97 extern vm_offset_t __startkernel;
98
99 extern int copy_fault(void);
100 extern int fusufault(void);
101
102 #ifdef KDB
103 int db_trap_glue(struct trapframe *); /* Called from trap_subr.S */
104 #endif
105
106 struct powerpc_exception {
107 u_int vector;
108 char *name;
109 };
110
111 #ifdef KDTRACE_HOOKS
112 #include <sys/dtrace_bsd.h>
113
114 int (*dtrace_invop_jump_addr)(struct trapframe *);
115 #endif
116
117 static struct powerpc_exception powerpc_exceptions[] = {
118 { EXC_CRIT, "critical input" },
119 { EXC_RST, "system reset" },
120 { EXC_MCHK, "machine check" },
121 { EXC_DSI, "data storage interrupt" },
122 { EXC_DSE, "data segment exception" },
123 { EXC_ISI, "instruction storage interrupt" },
124 { EXC_ISE, "instruction segment exception" },
125 { EXC_EXI, "external interrupt" },
126 { EXC_ALI, "alignment" },
127 { EXC_PGM, "program" },
128 { EXC_HEA, "hypervisor emulation assistance" },
129 { EXC_FPU, "floating-point unavailable" },
130 { EXC_APU, "auxiliary proc unavailable" },
131 { EXC_DECR, "decrementer" },
132 { EXC_FIT, "fixed-interval timer" },
133 { EXC_WDOG, "watchdog timer" },
134 { EXC_SC, "system call" },
135 { EXC_TRC, "trace" },
136 { EXC_FPA, "floating-point assist" },
137 { EXC_DEBUG, "debug" },
138 { EXC_PERF, "performance monitoring" },
139 { EXC_VEC, "altivec unavailable" },
140 { EXC_VSX, "vsx unavailable" },
141 { EXC_FAC, "facility unavailable" },
142 { EXC_ITMISS, "instruction tlb miss" },
143 { EXC_DLMISS, "data load tlb miss" },
144 { EXC_DSMISS, "data store tlb miss" },
145 { EXC_BPT, "instruction breakpoint" },
146 { EXC_SMI, "system management" },
147 { EXC_VECAST_G4, "altivec assist" },
148 { EXC_THRM, "thermal management" },
149 { EXC_RUNMODETRC, "run mode/trace" },
150 { EXC_SOFT_PATCH, "soft patch exception" },
151 { EXC_LAST, NULL }
152 };
153
154 static int uprintf_signal;
155 SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RWTUN,
156 &uprintf_signal, 0,
157 "Print debugging information on trap signal to ctty");
158
159 #define ESR_BITMASK \
160 "\20" \
161 "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP" \
162 "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE" \
163 "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \
164 "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
165 #define MCSR_BITMASK \
166 "\20" \
167 "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7" \
168 "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF" \
169 "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23" \
170 "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
171 #define MSSSR_BITMASK \
172 "\20" \
173 "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \
174 "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG" \
175 "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23" \
176 "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
177
178 static const char *
trapname(u_int vector)179 trapname(u_int vector)
180 {
181 struct powerpc_exception *pe;
182
183 for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
184 if (pe->vector == vector)
185 return (pe->name);
186 }
187
188 return ("unknown");
189 }
190
191 static inline bool
frame_is_trap_inst(struct trapframe * frame)192 frame_is_trap_inst(struct trapframe *frame)
193 {
194 #ifdef AIM
195 return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP);
196 #else
197 return ((frame->cpu.booke.esr & ESR_PTR) != 0);
198 #endif
199 }
200
201 void
trap(struct trapframe * frame)202 trap(struct trapframe *frame)
203 {
204 struct thread *td;
205 struct proc *p;
206 #ifdef KDTRACE_HOOKS
207 uint32_t inst;
208 #endif
209 int sig, type, user;
210 u_int ucode;
211 ksiginfo_t ksi;
212 register_t addr, fscr;
213
214 VM_CNT_INC(v_trap);
215
216 #ifdef KDB
217 if (kdb_active) {
218 kdb_reenter();
219 return;
220 }
221 #endif
222
223 td = curthread;
224 p = td->td_proc;
225
226 type = ucode = frame->exc;
227 sig = 0;
228 user = frame->srr1 & PSL_PR;
229 addr = 0;
230
231 CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
232 trapname(type), user ? "user" : "kernel");
233
234 #ifdef KDTRACE_HOOKS
235 /*
236 * A trap can occur while DTrace executes a probe. Before
237 * executing the probe, DTrace blocks re-scheduling and sets
238 * a flag in its per-cpu flags to indicate that it doesn't
239 * want to fault. On returning from the probe, the no-fault
240 * flag is cleared and finally re-scheduling is enabled.
241 *
242 * If the DTrace kernel module has registered a trap handler,
243 * call it and if it returns non-zero, assume that it has
244 * handled the trap and modified the trap frame so that this
245 * function can return normally.
246 */
247 if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
248 return;
249 #endif
250
251 if (user) {
252 td->td_pticks = 0;
253 td->td_frame = frame;
254 addr = frame->srr0;
255 if (td->td_cowgen != atomic_load_int(&p->p_cowgen))
256 thread_cow_update(td);
257
258 /* User Mode Traps */
259 switch (type) {
260 case EXC_RUNMODETRC:
261 case EXC_TRC:
262 frame->srr1 &= ~PSL_SE;
263 sig = SIGTRAP;
264 ucode = TRAP_TRACE;
265 break;
266
267 #if defined(__powerpc64__) && defined(AIM)
268 case EXC_DSE:
269 addr = frame->dar;
270 /* FALLTHROUGH */
271 case EXC_ISE:
272 /* DSE/ISE are automatically fatal with radix pmap. */
273 if (radix_mmu ||
274 handle_user_slb_spill(&p->p_vmspace->vm_pmap,
275 addr) != 0){
276 sig = SIGSEGV;
277 ucode = SEGV_MAPERR;
278 }
279 break;
280 #endif
281 case EXC_DSI:
282 addr = frame->dar;
283 /* FALLTHROUGH */
284 case EXC_ISI:
285 if (trap_pfault(frame, true, &sig, &ucode))
286 sig = 0;
287 break;
288
289 case EXC_SC:
290 syscall(frame);
291 break;
292
293 case EXC_FPU:
294 KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
295 ("FPU already enabled for thread"));
296 enable_fpu(td);
297 break;
298
299 case EXC_VEC:
300 KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
301 ("Altivec already enabled for thread"));
302 enable_vec(td);
303 break;
304
305 case EXC_VSX:
306 KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
307 ("VSX already enabled for thread"));
308 if (!(td->td_pcb->pcb_flags & PCB_VEC))
309 enable_vec(td);
310 if (td->td_pcb->pcb_flags & PCB_FPU)
311 save_fpu(td);
312 td->td_pcb->pcb_flags |= PCB_VSX;
313 enable_fpu(td);
314 break;
315
316 case EXC_FAC:
317 fscr = mfspr(SPR_FSCR);
318 switch (fscr & FSCR_IC_MASK) {
319 case FSCR_IC_HTM:
320 CTR0(KTR_TRAP,
321 "Hardware Transactional Memory subsystem disabled");
322 sig = SIGILL;
323 ucode = ILL_ILLOPC;
324 break;
325 case FSCR_IC_DSCR:
326 td->td_pcb->pcb_flags |= PCB_CFSCR | PCB_CDSCR;
327 fscr |= FSCR_DSCR;
328 mtspr(SPR_DSCR, 0);
329 break;
330 case FSCR_IC_EBB:
331 td->td_pcb->pcb_flags |= PCB_CFSCR;
332 fscr |= FSCR_EBB;
333 mtspr(SPR_EBBHR, 0);
334 mtspr(SPR_EBBRR, 0);
335 mtspr(SPR_BESCR, 0);
336 break;
337 case FSCR_IC_TAR:
338 td->td_pcb->pcb_flags |= PCB_CFSCR;
339 fscr |= FSCR_TAR;
340 mtspr(SPR_TAR, 0);
341 break;
342 case FSCR_IC_LM:
343 td->td_pcb->pcb_flags |= PCB_CFSCR;
344 fscr |= FSCR_LM;
345 mtspr(SPR_LMRR, 0);
346 mtspr(SPR_LMSER, 0);
347 break;
348 default:
349 sig = SIGILL;
350 ucode = ILL_ILLOPC;
351 }
352 mtspr(SPR_FSCR, fscr & ~FSCR_IC_MASK);
353 break;
354 case EXC_HEA:
355 sig = SIGILL;
356 ucode = ILL_ILLOPC;
357 break;
358
359 case EXC_VECAST_E:
360 case EXC_VECAST_G4:
361 case EXC_VECAST_G5:
362 /*
363 * We get a VPU assist exception for IEEE mode
364 * vector operations on denormalized floats.
365 * Emulating this is a giant pain, so for now,
366 * just switch off IEEE mode and treat them as
367 * zero.
368 */
369
370 save_vec(td);
371 td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
372 enable_vec(td);
373 break;
374
375 case EXC_ALI:
376 if (fix_unaligned(td, frame) != 0) {
377 sig = SIGBUS;
378 ucode = BUS_ADRALN;
379 addr = frame->dar;
380 }
381 else
382 frame->srr0 += 4;
383 break;
384
385 case EXC_DEBUG: /* Single stepping */
386 mtspr(SPR_DBSR, mfspr(SPR_DBSR));
387 frame->srr1 &= ~PSL_DE;
388 frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
389 sig = SIGTRAP;
390 ucode = TRAP_TRACE;
391 break;
392
393 case EXC_PGM:
394 /* Identify the trap reason */
395 if (frame_is_trap_inst(frame)) {
396 #ifdef KDTRACE_HOOKS
397 inst = fuword32((const void *)frame->srr0);
398 if (inst == 0x0FFFDDDD &&
399 dtrace_pid_probe_ptr != NULL) {
400 (*dtrace_pid_probe_ptr)(frame);
401 break;
402 }
403 #endif
404 sig = SIGTRAP;
405 ucode = TRAP_BRKPT;
406 break;
407 }
408
409 if ((frame->srr1 & EXC_PGM_FPENABLED) &&
410 (td->td_pcb->pcb_flags & PCB_FPU))
411 sig = SIGFPE;
412 else
413 sig = ppc_instr_emulate(frame, td);
414
415 if (sig == SIGILL) {
416 if (frame->srr1 & EXC_PGM_PRIV)
417 ucode = ILL_PRVOPC;
418 else if (frame->srr1 & EXC_PGM_ILLEGAL)
419 ucode = ILL_ILLOPC;
420 } else if (sig == SIGFPE) {
421 ucode = get_fpu_exception(td);
422 }
423
424 break;
425
426 case EXC_MCHK:
427 sig = cpu_machine_check(td, frame, &ucode);
428 printtrap(frame->exc, frame, 0, (frame->srr1 & PSL_PR));
429 break;
430
431 #if defined(__powerpc64__) && defined(AIM)
432 case EXC_SOFT_PATCH:
433 /*
434 * Point to the instruction that generated the exception to execute it again,
435 * and normalize the register values.
436 */
437 frame->srr0 -= 4;
438 normalize_inputs();
439 break;
440 #endif
441
442 default:
443 trap_fatal(frame);
444 }
445 } else {
446 /* Kernel Mode Traps */
447
448 KASSERT(cold || td->td_ucred != NULL,
449 ("kernel trap doesn't have ucred"));
450 switch (type) {
451 case EXC_PGM:
452 #ifdef KDTRACE_HOOKS
453 if (frame_is_trap_inst(frame)) {
454 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
455 if (dtrace_invop_jump_addr != NULL) {
456 dtrace_invop_jump_addr(frame);
457 return;
458 }
459 }
460 }
461 #endif
462 #ifdef KDB
463 if (db_trap_glue(frame))
464 return;
465 #endif
466 break;
467 #if defined(__powerpc64__) && defined(AIM)
468 case EXC_DSE:
469 /* DSE on radix mmu is automatically fatal. */
470 if (radix_mmu)
471 break;
472 if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0 &&
473 (frame->dar & SEGMENT_MASK) == USER_ADDR) {
474 __asm __volatile ("slbmte %0, %1" ::
475 "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
476 "r"(USER_SLB_SLBE));
477 return;
478 }
479 break;
480 #endif
481 case EXC_DSI:
482 if (trap_pfault(frame, false, NULL, NULL))
483 return;
484 break;
485 case EXC_MCHK:
486 if (handle_onfault(frame))
487 return;
488 break;
489 default:
490 break;
491 }
492 trap_fatal(frame);
493 }
494
495 if (sig != 0) {
496 ksiginfo_init_trap(&ksi);
497 ksi.ksi_signo = sig;
498 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
499 ksi.ksi_addr = (void *)addr;
500 ksi.ksi_trapno = type;
501 if (uprintf_signal) {
502 uprintf("pid %d comm %s: signal %d code %d type 0x%x "
503 "addr 0x%lx r1 0x%lx srr0 0x%lx srr1 0x%lx\n",
504 p->p_pid, p->p_comm, sig, ucode, type,
505 (u_long)addr, (u_long)frame->fixreg[1],
506 (u_long)frame->srr0, (u_long)frame->srr1);
507 }
508
509 trapsignal(td, &ksi);
510 }
511
512 userret(td, frame);
513 }
514
515 static void
trap_fatal(struct trapframe * frame)516 trap_fatal(struct trapframe *frame)
517 {
518 #ifdef KDB
519 bool handled;
520 #endif
521
522 printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
523 #ifdef KDB
524 if (debugger_on_trap) {
525 kdb_why = KDB_WHY_TRAP;
526 handled = kdb_trap(frame->exc, 0, frame);
527 kdb_why = KDB_WHY_UNSET;
528 if (handled)
529 return;
530 }
531 #endif
532 panic("%s trap", trapname(frame->exc));
533 }
534
535 static void
cpu_printtrap(u_int vector,struct trapframe * frame,int isfatal,int user)536 cpu_printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
537 {
538 #ifdef AIM
539 uint16_t ver;
540
541 switch (vector) {
542 case EXC_MCHK:
543 ver = mfpvr() >> 16;
544 if (MPC745X_P(ver))
545 printf(" msssr0 = 0x%b\n",
546 (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
547 case EXC_DSE:
548 case EXC_DSI:
549 case EXC_DTMISS:
550 printf(" dsisr = 0x%lx\n",
551 (u_long)frame->cpu.aim.dsisr);
552 break;
553 }
554 #elif defined(BOOKE)
555 vm_paddr_t pa;
556
557 switch (vector) {
558 case EXC_MCHK:
559 pa = mfspr(SPR_MCARU);
560 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
561 printf(" mcsr = 0x%b\n",
562 (int)mfspr(SPR_MCSR), MCSR_BITMASK);
563 printf(" mcar = 0x%jx\n", (uintmax_t)pa);
564 }
565 printf(" esr = 0x%b\n",
566 (int)frame->cpu.booke.esr, ESR_BITMASK);
567 #endif
568 }
569
570 static void
printtrap(u_int vector,struct trapframe * frame,int isfatal,int user)571 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
572 {
573
574 printf("\n");
575 printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
576 user ? "user" : "kernel");
577 printf("\n");
578 printf(" exception = 0x%x (%s)\n", vector, trapname(vector));
579 switch (vector) {
580 case EXC_DSE:
581 case EXC_DSI:
582 case EXC_DTMISS:
583 case EXC_ALI:
584 case EXC_MCHK:
585 printf(" virtual address = 0x%" PRIxPTR "\n", frame->dar);
586 break;
587 case EXC_ISE:
588 case EXC_ISI:
589 case EXC_ITMISS:
590 printf(" virtual address = 0x%" PRIxPTR "\n", frame->srr0);
591 break;
592 }
593 cpu_printtrap(vector, frame, isfatal, user);
594 printf(" srr0 = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
595 frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
596 printf(" srr1 = 0x%lx\n", (u_long)frame->srr1);
597 printf(" current msr = 0x%" PRIxPTR "\n", mfmsr());
598 printf(" lr = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
599 frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
600 printf(" frame = %p\n", frame);
601 printf(" curthread = %p\n", curthread);
602 if (curthread != NULL)
603 printf(" pid = %d, comm = %s\n",
604 curthread->td_proc->p_pid, curthread->td_name);
605 printf("\n");
606 }
607
608 /*
609 * Handles a fatal fault when we have onfault state to recover. Returns
610 * non-zero if there was onfault recovery state available.
611 */
612 static int
handle_onfault(struct trapframe * frame)613 handle_onfault(struct trapframe *frame)
614 {
615 struct thread *td;
616 jmp_buf *fb;
617
618 td = curthread;
619 #if defined(__powerpc64__) || defined(BOOKE)
620 uintptr_t dispatch = (uintptr_t)td->td_pcb->pcb_onfault;
621
622 if (dispatch == 0)
623 return (0);
624 /* Short-circuit radix and Book-E paths. */
625 switch (dispatch) {
626 case COPYFAULT:
627 frame->srr0 = (uintptr_t)copy_fault;
628 return (1);
629 case FUSUFAULT:
630 frame->srr0 = (uintptr_t)fusufault;
631 return (1);
632 default:
633 break;
634 }
635 #endif
636 fb = td->td_pcb->pcb_onfault;
637 if (fb != NULL) {
638 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
639 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
640 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
641 frame->fixreg[3] = 1;
642 frame->cr = (*fb)->_jb[FAULTBUF_CR];
643 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
644 18 * sizeof(register_t));
645 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
646 return (1);
647 }
648 return (0);
649 }
650
651 int
cpu_fetch_syscall_args(struct thread * td)652 cpu_fetch_syscall_args(struct thread *td)
653 {
654 struct proc *p;
655 struct trapframe *frame;
656 struct syscall_args *sa;
657 caddr_t params;
658 size_t argsz;
659 int error, n, narg, i;
660
661 p = td->td_proc;
662 frame = td->td_frame;
663 sa = &td->td_sa;
664
665 sa->code = frame->fixreg[0];
666 sa->original_code = sa->code;
667 params = (caddr_t)(frame->fixreg + FIRSTARG);
668 n = NARGREG;
669
670 if (sa->code == SYS_syscall) {
671 /*
672 * code is first argument,
673 * followed by actual args.
674 */
675 sa->code = *(register_t *) params;
676 params += sizeof(register_t);
677 n -= 1;
678 } else if (sa->code == SYS___syscall) {
679 /*
680 * Like syscall, but code is a quad,
681 * so as to maintain quad alignment
682 * for the rest of the args.
683 */
684 if (SV_PROC_FLAG(p, SV_ILP32)) {
685 params += sizeof(register_t);
686 sa->code = *(register_t *) params;
687 params += sizeof(register_t);
688 n -= 2;
689 } else {
690 sa->code = *(register_t *) params;
691 params += sizeof(register_t);
692 n -= 1;
693 }
694 }
695
696 if (sa->code >= p->p_sysent->sv_size)
697 sa->callp = &nosys_sysent;
698 else
699 sa->callp = &p->p_sysent->sv_table[sa->code];
700
701 narg = sa->callp->sy_narg;
702
703 if (SV_PROC_FLAG(p, SV_ILP32)) {
704 argsz = sizeof(uint32_t);
705
706 for (i = 0; i < n; i++)
707 sa->args[i] = ((u_register_t *)(params))[i] &
708 0xffffffff;
709 } else {
710 argsz = sizeof(uint64_t);
711
712 for (i = 0; i < n; i++)
713 sa->args[i] = ((u_register_t *)(params))[i];
714 }
715
716 if (narg > n)
717 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
718 (narg - n) * argsz);
719 else
720 error = 0;
721
722 #ifdef __powerpc64__
723 if (SV_PROC_FLAG(p, SV_ILP32) && narg > n) {
724 /* Expand the size of arguments copied from the stack */
725
726 for (i = narg; i >= n; i--)
727 sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
728 }
729 #endif
730
731 if (error == 0) {
732 td->td_retval[0] = 0;
733 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
734 }
735 return (error);
736 }
737
738 #include "../../kern/subr_syscall.c"
739
740 void
syscall(struct trapframe * frame)741 syscall(struct trapframe *frame)
742 {
743 struct thread *td;
744
745 td = curthread;
746 td->td_frame = frame;
747
748 #if defined(__powerpc64__) && defined(AIM)
749 /*
750 * Speculatively restore last user SLB segment, which we know is
751 * invalid already, since we are likely to do copyin()/copyout().
752 */
753 if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0)
754 __asm __volatile ("slbmte %0, %1; isync" ::
755 "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
756 #endif
757
758 syscallenter(td);
759 syscallret(td);
760 }
761
762 static bool
trap_pfault(struct trapframe * frame,bool user,int * signo,int * ucode)763 trap_pfault(struct trapframe *frame, bool user, int *signo, int *ucode)
764 {
765 vm_offset_t eva;
766 struct thread *td;
767 struct proc *p;
768 vm_map_t map;
769 vm_prot_t ftype;
770 int rv, is_user;
771
772 td = curthread;
773 p = td->td_proc;
774 if (frame->exc == EXC_ISI) {
775 eva = frame->srr0;
776 ftype = VM_PROT_EXECUTE;
777 if (frame->srr1 & SRR1_ISI_PFAULT)
778 ftype |= VM_PROT_READ;
779 } else {
780 eva = frame->dar;
781 #ifdef BOOKE
782 if (frame->cpu.booke.esr & ESR_ST)
783 #else
784 if (frame->cpu.aim.dsisr & DSISR_STORE)
785 #endif
786 ftype = VM_PROT_WRITE;
787 else
788 ftype = VM_PROT_READ;
789 }
790 #if defined(__powerpc64__) && defined(AIM)
791 if (radix_mmu && pmap_nofault(&p->p_vmspace->vm_pmap, eva, ftype) == 0)
792 return (true);
793 #endif
794
795 if (__predict_false((td->td_pflags & TDP_NOFAULTING) == 0)) {
796 /*
797 * If we get a page fault while in a critical section, then
798 * it is most likely a fatal kernel page fault. The kernel
799 * is already going to panic trying to get a sleep lock to
800 * do the VM lookup, so just consider it a fatal trap so the
801 * kernel can print out a useful trap message and even get
802 * to the debugger.
803 *
804 * If we get a page fault while holding a non-sleepable
805 * lock, then it is most likely a fatal kernel page fault.
806 * If WITNESS is enabled, then it's going to whine about
807 * bogus LORs with various VM locks, so just skip to the
808 * fatal trap handling directly.
809 */
810 if (td->td_critnest != 0 ||
811 WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL,
812 "Kernel page fault") != 0) {
813 trap_fatal(frame);
814 return (false);
815 }
816 }
817 if (user) {
818 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace NULL"));
819 map = &p->p_vmspace->vm_map;
820 } else {
821 rv = pmap_decode_kernel_ptr(eva, &is_user, &eva);
822 if (rv != 0)
823 return (false);
824
825 if (is_user)
826 map = &p->p_vmspace->vm_map;
827 else
828 map = kernel_map;
829 }
830
831 /* Fault in the page. */
832 rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode);
833 /*
834 * XXXDTRACE: add dtrace_doubletrap_func here?
835 */
836
837 if (rv == KERN_SUCCESS)
838 return (true);
839
840 if (!user && handle_onfault(frame))
841 return (true);
842
843 return (false);
844 }
845
846 /*
847 * For now, this only deals with the particular unaligned access case
848 * that gcc tends to generate. Eventually it should handle all of the
849 * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
850 */
851
852 static int
fix_unaligned(struct thread * td,struct trapframe * frame)853 fix_unaligned(struct thread *td, struct trapframe *frame)
854 {
855 struct thread *fputhread;
856 #ifdef BOOKE
857 uint32_t inst;
858 #endif
859 int indicator, reg;
860 double *fpr;
861
862 #ifdef __SPE__
863 indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
864 if (indicator & ESR_SPE) {
865 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
866 return (-1);
867 reg = EXC_ALI_INST_RST(inst);
868 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
869 fputhread = PCPU_GET(vecthread);
870
871 /* Juggle the SPE to ensure that we've initialized
872 * the registers, and that their current state is in
873 * the PCB.
874 */
875 if (fputhread != td) {
876 if (fputhread)
877 save_vec(fputhread);
878 enable_vec(td);
879 }
880 save_vec(td);
881
882 if (!(indicator & ESR_ST)) {
883 if (copyin((void *)frame->dar, fpr,
884 sizeof(double)) != 0)
885 return (-1);
886 frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
887 enable_vec(td);
888 } else {
889 td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
890 if (copyout(fpr, (void *)frame->dar,
891 sizeof(double)) != 0)
892 return (-1);
893 }
894 return (0);
895 }
896 #else
897 #ifdef BOOKE
898 indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD;
899 #else
900 indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
901 #endif
902
903 switch (indicator) {
904 case EXC_ALI_LFD:
905 case EXC_ALI_STFD:
906 #ifdef BOOKE
907 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
908 return (-1);
909 reg = EXC_ALI_INST_RST(inst);
910 #else
911 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
912 #endif
913 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
914 fputhread = PCPU_GET(fputhread);
915
916 /* Juggle the FPU to ensure that we've initialized
917 * the FPRs, and that their current state is in
918 * the PCB.
919 */
920 if (fputhread != td) {
921 if (fputhread)
922 save_fpu(fputhread);
923 enable_fpu(td);
924 }
925 save_fpu(td);
926
927 if (indicator == EXC_ALI_LFD) {
928 if (copyin((void *)frame->dar, fpr,
929 sizeof(double)) != 0)
930 return (-1);
931 enable_fpu(td);
932 } else {
933 if (copyout(fpr, (void *)frame->dar,
934 sizeof(double)) != 0)
935 return (-1);
936 }
937 return (0);
938 break;
939 }
940 #endif
941
942 return (-1);
943 }
944
945 #if defined(__powerpc64__) && defined(AIM)
946 #define MSKNSHL(x, m, n) "(((" #x ") & " #m ") << " #n ")"
947 #define MSKNSHR(x, m, n) "(((" #x ") & " #m ") >> " #n ")"
948
949 /* xvcpsgndp instruction, built in opcode format.
950 * This can be changed to use mnemonic after a toolchain update.
951 */
952 #define XVCPSGNDP(xt, xa, xb) \
953 __asm __volatile(".long (" \
954 MSKNSHL(60, 0x3f, 26) " | " \
955 MSKNSHL(xt, 0x1f, 21) " | " \
956 MSKNSHL(xa, 0x1f, 16) " | " \
957 MSKNSHL(xb, 0x1f, 11) " | " \
958 MSKNSHL(240, 0xff, 3) " | " \
959 MSKNSHR(xa, 0x20, 3) " | " \
960 MSKNSHR(xa, 0x20, 4) " | " \
961 MSKNSHR(xa, 0x20, 5) ")")
962
963 /* Macros to normalize 1 or 10 VSX registers */
964 #define NORM(x) XVCPSGNDP(x, x, x)
965 #define NORM10(x) \
966 NORM(x ## 0); NORM(x ## 1); NORM(x ## 2); NORM(x ## 3); NORM(x ## 4); \
967 NORM(x ## 5); NORM(x ## 6); NORM(x ## 7); NORM(x ## 8); NORM(x ## 9)
968
969 static void
normalize_inputs(void)970 normalize_inputs(void)
971 {
972 register_t msr;
973
974 /* enable VSX */
975 msr = mfmsr();
976 mtmsr(msr | PSL_VSX);
977
978 NORM(0); NORM(1); NORM(2); NORM(3); NORM(4);
979 NORM(5); NORM(6); NORM(7); NORM(8); NORM(9);
980 NORM10(1); NORM10(2); NORM10(3); NORM10(4); NORM10(5);
981 NORM(60); NORM(61); NORM(62); NORM(63);
982
983 /* restore MSR */
984 mtmsr(msr);
985 }
986 #endif
987
988 #ifdef KDB
989 int
db_trap_glue(struct trapframe * frame)990 db_trap_glue(struct trapframe *frame)
991 {
992
993 if (!(frame->srr1 & PSL_PR)
994 && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
995 || frame_is_trap_inst(frame)
996 || frame->exc == EXC_BPT
997 || frame->exc == EXC_DEBUG
998 || frame->exc == EXC_DSI)) {
999 int type = frame->exc;
1000
1001 /* Ignore DTrace traps. */
1002 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
1003 return (0);
1004 if (frame_is_trap_inst(frame)) {
1005 type = T_BREAKPOINT;
1006 }
1007 return (kdb_trap(type, 0, frame));
1008 }
1009
1010 return (0);
1011 }
1012 #endif
1013