1# RUN: llvm-mc %s -triple=riscv32 -mattr=+f -riscv-no-aliases \
2# RUN:     | FileCheck -check-prefix=CHECK-INST %s
3# RUN: llvm-mc %s -triple=riscv32 -mattr=+f \
4# RUN:     | FileCheck -check-prefix=CHECK-ALIAS %s
5# RUN: llvm-mc %s -triple=riscv64 -mattr=+f -riscv-no-aliases \
6# RUN:     | FileCheck -check-prefix=CHECK-INST %s
7# RUN: llvm-mc %s -triple=riscv64 -mattr=+f \
8# RUN:     | FileCheck -check-prefix=CHECK-ALIAS %s
9# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
10# RUN:     | llvm-objdump -d --mattr=+f -M no-aliases - \
11# RUN:     | FileCheck -check-prefix=CHECK-INST %s
12# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
13# RUN:     | llvm-objdump -d --mattr=+f - \
14# RUN:     | FileCheck -check-prefix=CHECK-ALIAS %s
15# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
16# RUN:     | llvm-objdump -d --mattr=+f -M no-aliases - \
17# RUN:     | FileCheck -check-prefix=CHECK-INST %s
18# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
19# RUN:     | llvm-objdump -d --mattr=+f - \
20# RUN:     | FileCheck -check-prefix=CHECK-ALIAS %s
21
22##===----------------------------------------------------------------------===##
23## Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20)
24##===----------------------------------------------------------------------===##
25
26# CHECK-INST: flw ft0, 0(a0)
27# CHECK-ALIAS:  flw ft0, 0(a0)
28flw f0, (a0)
29# CHECK-INST: fsw ft0, 0(a0)
30# CHECK-ALIAS: fsw ft0, 0(a0)
31fsw f0, (a0)
32
33# CHECK-INST: fsgnj.s ft0, ft1, ft1
34# CHECK-ALIAS: fmv.s ft0, ft1
35fmv.s f0, f1
36# CHECK-INST: fsgnjx.s ft1, ft2, ft2
37# CHECK-ALIAS: fabs.s ft1, ft2
38fabs.s f1, f2
39# CHECK-INST: fsgnjn.s ft2, ft3, ft3
40# CHECK-ALIAS: fneg.s ft2, ft3
41fneg.s f2, f3
42
43# CHECK-INST: flt.s tp, ft6, ft5
44# CHECK-ALIAS: flt.s tp, ft6, ft5
45fgt.s x4, f5, f6
46# CHECK-INST: fle.s t2, fs1, fs0
47# CHECK-ALIAS: fle.s t2, fs1, fs0
48fge.s x7, f8, f9
49
50# The following instructions actually alias instructions from the base ISA.
51# However, it only makes sense to support them when the F extension is enabled.
52# CHECK-INST: csrrs t0, fcsr, zero
53# CHECK-ALIAS: frcsr t0
54frcsr x5
55# CHECK-INST: csrrw t1, fcsr, t2
56# CHECK-ALIAS: fscsr t1, t2
57fscsr x6, x7
58# CHECK-INST: csrrw  zero, fcsr, t3
59# CHECK-ALIAS: fscsr t3
60fscsr x28
61
62# These are obsolete aliases of frcsr/fscsr. They are accepted by the assembler
63# but the disassembler should always print them as the equivalent, new aliases.
64# CHECK-INST: csrrs t4, fcsr, zero
65# CHECK-ALIAS: frcsr t4
66frsr x29
67# CHECK-INST: csrrw t5, fcsr, t6
68# CHECK-ALIAS: fscsr t5, t6
69fssr x30, x31
70# CHECK-INST: csrrw zero, fcsr, s0
71# CHECK-ALIAS: fscsr s0
72fssr x8
73
74# CHECK-INST: csrrs t4, frm, zero
75# CHECK-ALIAS: frrm t4
76frrm x29
77# CHECK-INST: csrrw  t5, frm, t4
78# CHECK-ALIAS: fsrm t5, t4
79fsrm x30, x29
80# CHECK-INST: csrrw  zero, frm, t6
81# CHECK-ALIAS: fsrm t6
82fsrm x31
83# CHECK-INST: csrrwi a0, frm, 31
84# CHECK-ALIAS: fsrmi a0, 31
85fsrmi x10, 0x1f
86# CHECK-INST: csrrwi  zero, frm, 30
87# CHECK-ALIAS: fsrmi 30
88fsrmi 0x1e
89
90# CHECK-INST: csrrs a1, fflags, zero
91# CHECK-ALIAS: frflags a1
92frflags x11
93# CHECK-INST: csrrw a2, fflags, a1
94# CHECK-ALIAS: fsflags a2, a1
95fsflags x12, x11
96# CHECK-INST: csrrw zero, fflags, a3
97# CHECK-ALIAS: fsflags a3
98fsflags x13
99# CHECK-INST: csrrwi a4, fflags, 29
100# CHECK-ALIAS: fsflagsi a4, 29
101fsflagsi x14, 0x1d
102# CHECK-INST: csrrwi zero, fflags, 28
103# CHECK-ALIAS: fsflagsi 28
104fsflagsi 0x1c
105
106# CHECK-INST: fmv.x.w a2, fs7
107# CHECK-ALIAS: fmv.x.w a2, fs7
108fmv.x.s a2, fs7
109# CHECK-INST: fmv.w.x ft1, a6
110# CHECK-ALIAS: fmv.w.x ft1, a6
111fmv.s.x ft1, a6
112
113# CHECK-INST: flw ft0, 0(a0)
114# CHECK-ALIAS: flw ft0, 0(a0)
115flw f0, (x10)
116# CHECK-INST: fsw ft0, 0(a0)
117# CHECK-ALIAS: fsw ft0, 0(a0)
118fsw f0, (x10)
119
120##===----------------------------------------------------------------------===##
121## Aliases which omit the rounding mode.
122##===----------------------------------------------------------------------===##
123
124# CHECK-INST: fmadd.s fa0, fa1, fa2, fa3, dyn
125# CHECK-ALIAS: fmadd.s fa0, fa1, fa2, fa3{{[[:space:]]}}
126fmadd.s f10, f11, f12, f13
127# CHECK-INST: fmsub.s fa4, fa5, fa6, fa7, dyn
128# CHECK-ALIAS: fmsub.s fa4, fa5, fa6, fa7{{[[:space:]]}}
129fmsub.s f14, f15, f16, f17
130# CHECK-INST: fnmsub.s fs2, fs3, fs4, fs5, dyn
131# CHECK-ALIAS: fnmsub.s fs2, fs3, fs4, fs5{{[[:space:]]}}
132fnmsub.s f18, f19, f20, f21
133# CHECK-INST: fnmadd.s fs6, fs7, fs8, fs9, dyn
134# CHECK-ALIAS: fnmadd.s fs6, fs7, fs8, fs9{{[[:space:]]}}
135fnmadd.s f22, f23, f24, f25
136# CHECK-INST: fadd.s fs10, fs11, ft8, dyn
137# CHECK-ALIAS: fadd.s fs10, fs11, ft8{{[[:space:]]}}
138fadd.s f26, f27, f28
139# CHECK-INST: fsub.s ft9, ft10, ft11, dyn
140# CHECK-ALIAS: fsub.s ft9, ft10, ft11{{[[:space:]]}}
141fsub.s f29, f30, f31
142# CHECK-INST: fmul.s ft0, ft1, ft2, dyn
143# CHECK-ALIAS: fmul.s ft0, ft1, ft2{{[[:space:]]}}
144fmul.s ft0, ft1, ft2
145# CHECK-INST: fdiv.s ft3, ft4, ft5, dyn
146# CHECK-ALIAS: fdiv.s ft3, ft4, ft5{{[[:space:]]}}
147fdiv.s ft3, ft4, ft5
148# CHECK-INST: fsqrt.s ft6, ft7, dyn
149# CHECK-ALIAS: fsqrt.s ft6, ft7{{[[:space:]]}}
150fsqrt.s ft6, ft7
151# CHECK-INST: fcvt.w.s a0, fs5, dyn
152# CHECK-ALIAS: fcvt.w.s a0, fs5{{[[:space:]]}}
153fcvt.w.s a0, fs5
154# CHECK-INST: fcvt.wu.s a1, fs6, dyn
155# CHECK-ALIAS: fcvt.wu.s a1, fs6{{[[:space:]]}}
156fcvt.wu.s a1, fs6
157# CHECK-INST: fcvt.s.w ft11, a4, dyn
158# CHECK-ALIAS: fcvt.s.w ft11, a4{{[[:space:]]}}
159fcvt.s.w ft11, a4
160# CHECK-INST: fcvt.s.wu ft0, a5, dyn
161# CHECK-ALIAS: fcvt.s.wu ft0, a5{{[[:space:]]}}
162fcvt.s.wu ft0, a5
163