1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2004 John Baldwin <[email protected]>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 /*
33 * The ELCR is a register that controls the trigger mode and polarity of
34 * EISA and ISA interrupts. In FreeBSD 3.x and 4.x, the ELCR was only
35 * consulted for determining the appropriate trigger mode of EISA
36 * interrupts when using an APIC. However, it seems that almost all
37 * systems that include PCI also include an ELCR that manages the ISA
38 * IRQs 0 through 15. Thus, we check for the presence of an ELCR on
39 * every machine by checking to see if the values found at bootup are
40 * sane. Note that the polarity of ISA and EISA IRQs are linked to the
41 * trigger mode. All edge triggered IRQs use active-hi polarity, and
42 * all level triggered interrupts use active-lo polarity.
43 *
44 * The format of the ELCR is simple: it is a 16-bit bitmap where bit 0
45 * controls IRQ 0, bit 1 controls IRQ 1, etc. If the bit is zero, the
46 * associated IRQ is edge triggered. If the bit is one, the IRQ is
47 * level triggered.
48 */
49
50 #include <sys/param.h>
51 #include <sys/bus.h>
52 #include <sys/systm.h>
53 #include <machine/intr_machdep.h>
54
55 #define ELCR_PORT 0x4d0
56 #define ELCR_MASK(irq) (1 << (irq))
57
58 static int elcr_status;
59 int elcr_found;
60
61 /*
62 * Check to see if we have what looks like a valid ELCR. We do this by
63 * verifying that IRQs 0, 1, 2, and 13 are all edge triggered.
64 */
65 int
elcr_probe(void)66 elcr_probe(void)
67 {
68 int i;
69
70 elcr_status = inb(ELCR_PORT) | inb(ELCR_PORT + 1) << 8;
71 if ((elcr_status & (ELCR_MASK(0) | ELCR_MASK(1) | ELCR_MASK(2) |
72 ELCR_MASK(8) | ELCR_MASK(13))) != 0)
73 return (ENXIO);
74 if (bootverbose) {
75 printf("ELCR Found. ISA IRQs programmed as:\n");
76 for (i = 0; i < 16; i++)
77 printf(" %2d", i);
78 printf("\n");
79 for (i = 0; i < 16; i++)
80 if (elcr_status & ELCR_MASK(i))
81 printf(" L");
82 else
83 printf(" E");
84 printf("\n");
85 }
86 if (resource_disabled("elcr", 0))
87 return (ENXIO);
88 elcr_found = 1;
89 return (0);
90 }
91
92 /*
93 * Returns 1 for level trigger, 0 for edge.
94 */
95 enum intr_trigger
elcr_read_trigger(u_int irq)96 elcr_read_trigger(u_int irq)
97 {
98
99 KASSERT(elcr_found, ("%s: no ELCR was found!", __func__));
100 KASSERT(irq <= 15, ("%s: invalid IRQ %u", __func__, irq));
101 if (elcr_status & ELCR_MASK(irq))
102 return (INTR_TRIGGER_LEVEL);
103 else
104 return (INTR_TRIGGER_EDGE);
105 }
106
107 /*
108 * Set the trigger mode for a specified IRQ. Mode of 0 means edge triggered,
109 * and a mode of 1 means level triggered.
110 */
111 void
elcr_write_trigger(u_int irq,enum intr_trigger trigger)112 elcr_write_trigger(u_int irq, enum intr_trigger trigger)
113 {
114 int new_status;
115
116 KASSERT(elcr_found, ("%s: no ELCR was found!", __func__));
117 KASSERT(irq <= 15, ("%s: invalid IRQ %u", __func__, irq));
118 if (trigger == INTR_TRIGGER_LEVEL)
119 new_status = elcr_status | ELCR_MASK(irq);
120 else
121 new_status = elcr_status & ~ELCR_MASK(irq);
122 if (new_status == elcr_status)
123 return;
124 elcr_status = new_status;
125 if (irq >= 8)
126 outb(ELCR_PORT + 1, elcr_status >> 8);
127 else
128 outb(ELCR_PORT, elcr_status & 0xff);
129 }
130
131 void
elcr_resume(void)132 elcr_resume(void)
133 {
134
135 KASSERT(elcr_found, ("%s: no ELCR was found!", __func__));
136 outb(ELCR_PORT, elcr_status & 0xff);
137 outb(ELCR_PORT + 1, elcr_status >> 8);
138 }
139