1 /*-
2 * Copyright (c) 2018 Emmanuel Vadot <[email protected]>
3 * Copyright (c) 2016 Jared McNeill <[email protected]>
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /*
28 * X-Powers AXP803/813/818 PMU for Allwinner SoCs
29 */
30
31 #include <sys/cdefs.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/eventhandler.h>
35 #include <sys/bus.h>
36 #include <sys/rman.h>
37 #include <sys/kernel.h>
38 #include <sys/reboot.h>
39 #include <sys/gpio.h>
40 #include <sys/module.h>
41 #include <machine/bus.h>
42
43 #include <dev/iicbus/iicbus.h>
44 #include <dev/iicbus/iiconf.h>
45
46 #include <dev/gpio/gpiobusvar.h>
47
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50
51 #include <dev/extres/regulator/regulator.h>
52
53 #include "gpio_if.h"
54 #include "iicbus_if.h"
55 #include "regdev_if.h"
56
57 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator");
58
59 #define AXP_POWERSRC 0x00
60 #define AXP_POWERSRC_ACIN (1 << 7)
61 #define AXP_POWERSRC_VBUS (1 << 5)
62 #define AXP_POWERSRC_VBAT (1 << 3)
63 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */
64 #define AXP_POWERSRC_SHORTED (1 << 1)
65 #define AXP_POWERSRC_STARTUP (1 << 0)
66 #define AXP_POWERMODE 0x01
67 #define AXP_POWERMODE_BAT_CHARGING (1 << 6)
68 #define AXP_POWERMODE_BAT_PRESENT (1 << 5)
69 #define AXP_POWERMODE_BAT_VALID (1 << 4)
70 #define AXP_ICTYPE 0x03
71 #define AXP_POWERCTL1 0x10
72 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */
73 #define AXP_POWERCTL1_DCDC6 (1 << 5)
74 #define AXP_POWERCTL1_DCDC5 (1 << 4)
75 #define AXP_POWERCTL1_DCDC4 (1 << 3)
76 #define AXP_POWERCTL1_DCDC3 (1 << 2)
77 #define AXP_POWERCTL1_DCDC2 (1 << 1)
78 #define AXP_POWERCTL1_DCDC1 (1 << 0)
79 #define AXP_POWERCTL2 0x12
80 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */
81 #define AXP_POWERCTL2_DLDO4 (1 << 6)
82 #define AXP_POWERCTL2_DLDO3 (1 << 5)
83 #define AXP_POWERCTL2_DLDO2 (1 << 4)
84 #define AXP_POWERCTL2_DLDO1 (1 << 3)
85 #define AXP_POWERCTL2_ELDO3 (1 << 2)
86 #define AXP_POWERCTL2_ELDO2 (1 << 1)
87 #define AXP_POWERCTL2_ELDO1 (1 << 0)
88 #define AXP_POWERCTL3 0x13
89 #define AXP_POWERCTL3_ALDO3 (1 << 7)
90 #define AXP_POWERCTL3_ALDO2 (1 << 6)
91 #define AXP_POWERCTL3_ALDO1 (1 << 5)
92 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */
93 #define AXP_POWERCTL3_FLDO2 (1 << 3)
94 #define AXP_POWERCTL3_FLDO1 (1 << 2)
95 #define AXP_VOLTCTL_DLDO1 0x15
96 #define AXP_VOLTCTL_DLDO2 0x16
97 #define AXP_VOLTCTL_DLDO3 0x17
98 #define AXP_VOLTCTL_DLDO4 0x18
99 #define AXP_VOLTCTL_ELDO1 0x19
100 #define AXP_VOLTCTL_ELDO2 0x1A
101 #define AXP_VOLTCTL_ELDO3 0x1B
102 #define AXP_VOLTCTL_FLDO1 0x1C
103 #define AXP_VOLTCTL_FLDO2 0x1D
104 #define AXP_VOLTCTL_DCDC1 0x20
105 #define AXP_VOLTCTL_DCDC2 0x21
106 #define AXP_VOLTCTL_DCDC3 0x22
107 #define AXP_VOLTCTL_DCDC4 0x23
108 #define AXP_VOLTCTL_DCDC5 0x24
109 #define AXP_VOLTCTL_DCDC6 0x25
110 #define AXP_VOLTCTL_DCDC7 0x26
111 #define AXP_VOLTCTL_ALDO1 0x28
112 #define AXP_VOLTCTL_ALDO2 0x29
113 #define AXP_VOLTCTL_ALDO3 0x2A
114 #define AXP_VOLTCTL_STATUS (1 << 7)
115 #define AXP_VOLTCTL_MASK 0x7f
116 #define AXP_POWERBAT 0x32
117 #define AXP_POWERBAT_SHUTDOWN (1 << 7)
118 #define AXP_CHARGERCTL1 0x33
119 #define AXP_CHARGERCTL1_MIN 0
120 #define AXP_CHARGERCTL1_MAX 13
121 #define AXP_CHARGERCTL1_CMASK 0xf
122 #define AXP_IRQEN1 0x40
123 #define AXP_IRQEN1_ACIN_HI (1 << 6)
124 #define AXP_IRQEN1_ACIN_LO (1 << 5)
125 #define AXP_IRQEN1_VBUS_HI (1 << 3)
126 #define AXP_IRQEN1_VBUS_LO (1 << 2)
127 #define AXP_IRQEN2 0x41
128 #define AXP_IRQEN2_BAT_IN (1 << 7)
129 #define AXP_IRQEN2_BAT_NO (1 << 6)
130 #define AXP_IRQEN2_BATCHGC (1 << 3)
131 #define AXP_IRQEN2_BATCHGD (1 << 2)
132 #define AXP_IRQEN3 0x42
133 #define AXP_IRQEN4 0x43
134 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1)
135 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0)
136 #define AXP_IRQEN5 0x44
137 #define AXP_IRQEN5_POKSIRQ (1 << 4)
138 #define AXP_IRQEN5_POKLIRQ (1 << 3)
139 #define AXP_IRQEN6 0x45
140 #define AXP_IRQSTAT1 0x48
141 #define AXP_IRQSTAT1_ACIN_HI (1 << 6)
142 #define AXP_IRQSTAT1_ACIN_LO (1 << 5)
143 #define AXP_IRQSTAT1_VBUS_HI (1 << 3)
144 #define AXP_IRQSTAT1_VBUS_LO (1 << 2)
145 #define AXP_IRQSTAT2 0x49
146 #define AXP_IRQSTAT2_BAT_IN (1 << 7)
147 #define AXP_IRQSTAT2_BAT_NO (1 << 6)
148 #define AXP_IRQSTAT2_BATCHGC (1 << 3)
149 #define AXP_IRQSTAT2_BATCHGD (1 << 2)
150 #define AXP_IRQSTAT3 0x4a
151 #define AXP_IRQSTAT4 0x4b
152 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1)
153 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0)
154 #define AXP_IRQSTAT5 0x4c
155 #define AXP_IRQSTAT5_POKSIRQ (1 << 4)
156 #define AXP_IRQEN5_POKLIRQ (1 << 3)
157 #define AXP_IRQSTAT6 0x4d
158 #define AXP_BATSENSE_HI 0x78
159 #define AXP_BATSENSE_LO 0x79
160 #define AXP_BATCHG_HI 0x7a
161 #define AXP_BATCHG_LO 0x7b
162 #define AXP_BATDISCHG_HI 0x7c
163 #define AXP_BATDISCHG_LO 0x7d
164 #define AXP_GPIO0_CTRL 0x90
165 #define AXP_GPIO0LDO_CTRL 0x91
166 #define AXP_GPIO1_CTRL 0x92
167 #define AXP_GPIO1LDO_CTRL 0x93
168 #define AXP_GPIO_FUNC (0x7 << 0)
169 #define AXP_GPIO_FUNC_SHIFT 0
170 #define AXP_GPIO_FUNC_DRVLO 0
171 #define AXP_GPIO_FUNC_DRVHI 1
172 #define AXP_GPIO_FUNC_INPUT 2
173 #define AXP_GPIO_FUNC_LDO_ON 3
174 #define AXP_GPIO_FUNC_LDO_OFF 4
175 #define AXP_GPIO_SIGBIT 0x94
176 #define AXP_GPIO_PD 0x97
177 #define AXP_FUEL_GAUGECTL 0xb8
178 #define AXP_FUEL_GAUGECTL_EN (1 << 7)
179
180 #define AXP_BAT_CAP 0xb9
181 #define AXP_BAT_CAP_VALID (1 << 7)
182 #define AXP_BAT_CAP_PERCENT 0x7f
183
184 #define AXP_BAT_MAX_CAP_HI 0xe0
185 #define AXP_BAT_MAX_CAP_VALID (1 << 7)
186 #define AXP_BAT_MAX_CAP_LO 0xe1
187
188 #define AXP_BAT_COULOMB_HI 0xe2
189 #define AXP_BAT_COULOMB_VALID (1 << 7)
190 #define AXP_BAT_COULOMB_LO 0xe3
191
192 #define AXP_BAT_CAP_WARN 0xe6
193 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */
194 #define AXP_BAP_CAP_WARN_LV1BASE 5 /* 5-20%, 1% per step */
195 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */
196
197 /* Sensor conversion macros */
198 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4)
199 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf)
200 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo))
201
202 static const struct {
203 const char *name;
204 uint8_t ctrl_reg;
205 } axp8xx_pins[] = {
206 { "GPIO0", AXP_GPIO0_CTRL },
207 { "GPIO1", AXP_GPIO1_CTRL },
208 };
209
210 enum AXP8XX_TYPE {
211 AXP803 = 1,
212 AXP813,
213 };
214
215 static struct ofw_compat_data compat_data[] = {
216 { "x-powers,axp803", AXP803 },
217 { "x-powers,axp813", AXP813 },
218 { "x-powers,axp818", AXP813 },
219 { NULL, 0 }
220 };
221
222 static struct resource_spec axp8xx_spec[] = {
223 { SYS_RES_IRQ, 0, RF_ACTIVE },
224 { -1, 0 }
225 };
226
227 struct axp8xx_regdef {
228 intptr_t id;
229 char *name;
230 char *supply_name;
231 uint8_t enable_reg;
232 uint8_t enable_mask;
233 uint8_t enable_value;
234 uint8_t disable_value;
235 uint8_t voltage_reg;
236 int voltage_min;
237 int voltage_max;
238 int voltage_step1;
239 int voltage_nstep1;
240 int voltage_step2;
241 int voltage_nstep2;
242 };
243
244 enum axp8xx_reg_id {
245 AXP8XX_REG_ID_DCDC1 = 100,
246 AXP8XX_REG_ID_DCDC2,
247 AXP8XX_REG_ID_DCDC3,
248 AXP8XX_REG_ID_DCDC4,
249 AXP8XX_REG_ID_DCDC5,
250 AXP8XX_REG_ID_DCDC6,
251 AXP813_REG_ID_DCDC7,
252 AXP803_REG_ID_DC1SW,
253 AXP8XX_REG_ID_DLDO1,
254 AXP8XX_REG_ID_DLDO2,
255 AXP8XX_REG_ID_DLDO3,
256 AXP8XX_REG_ID_DLDO4,
257 AXP8XX_REG_ID_ELDO1,
258 AXP8XX_REG_ID_ELDO2,
259 AXP8XX_REG_ID_ELDO3,
260 AXP8XX_REG_ID_ALDO1,
261 AXP8XX_REG_ID_ALDO2,
262 AXP8XX_REG_ID_ALDO3,
263 AXP8XX_REG_ID_FLDO1,
264 AXP8XX_REG_ID_FLDO2,
265 AXP813_REG_ID_FLDO3,
266 AXP8XX_REG_ID_GPIO0_LDO,
267 AXP8XX_REG_ID_GPIO1_LDO,
268 };
269
270 static struct axp8xx_regdef axp803_regdefs[] = {
271 {
272 .id = AXP803_REG_ID_DC1SW,
273 .name = "dc1sw",
274 .enable_reg = AXP_POWERCTL2,
275 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW,
276 .enable_value = AXP_POWERCTL2_DC1SW,
277 },
278 };
279
280 static struct axp8xx_regdef axp813_regdefs[] = {
281 {
282 .id = AXP813_REG_ID_DCDC7,
283 .name = "dcdc7",
284 .enable_reg = AXP_POWERCTL1,
285 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7,
286 .enable_value = AXP_POWERCTL1_DCDC7,
287 .voltage_reg = AXP_VOLTCTL_DCDC7,
288 .voltage_min = 600,
289 .voltage_max = 1520,
290 .voltage_step1 = 10,
291 .voltage_nstep1 = 50,
292 .voltage_step2 = 20,
293 .voltage_nstep2 = 21,
294 },
295 };
296
297 static struct axp8xx_regdef axp8xx_common_regdefs[] = {
298 {
299 .id = AXP8XX_REG_ID_DCDC1,
300 .name = "dcdc1",
301 .enable_reg = AXP_POWERCTL1,
302 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1,
303 .enable_value = AXP_POWERCTL1_DCDC1,
304 .voltage_reg = AXP_VOLTCTL_DCDC1,
305 .voltage_min = 1600,
306 .voltage_max = 3400,
307 .voltage_step1 = 100,
308 .voltage_nstep1 = 18,
309 },
310 {
311 .id = AXP8XX_REG_ID_DCDC2,
312 .name = "dcdc2",
313 .enable_reg = AXP_POWERCTL1,
314 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2,
315 .enable_value = AXP_POWERCTL1_DCDC2,
316 .voltage_reg = AXP_VOLTCTL_DCDC2,
317 .voltage_min = 500,
318 .voltage_max = 1300,
319 .voltage_step1 = 10,
320 .voltage_nstep1 = 70,
321 .voltage_step2 = 20,
322 .voltage_nstep2 = 5,
323 },
324 {
325 .id = AXP8XX_REG_ID_DCDC3,
326 .name = "dcdc3",
327 .enable_reg = AXP_POWERCTL1,
328 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3,
329 .enable_value = AXP_POWERCTL1_DCDC3,
330 .voltage_reg = AXP_VOLTCTL_DCDC3,
331 .voltage_min = 500,
332 .voltage_max = 1300,
333 .voltage_step1 = 10,
334 .voltage_nstep1 = 70,
335 .voltage_step2 = 20,
336 .voltage_nstep2 = 5,
337 },
338 {
339 .id = AXP8XX_REG_ID_DCDC4,
340 .name = "dcdc4",
341 .enable_reg = AXP_POWERCTL1,
342 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4,
343 .enable_value = AXP_POWERCTL1_DCDC4,
344 .voltage_reg = AXP_VOLTCTL_DCDC4,
345 .voltage_min = 500,
346 .voltage_max = 1300,
347 .voltage_step1 = 10,
348 .voltage_nstep1 = 70,
349 .voltage_step2 = 20,
350 .voltage_nstep2 = 5,
351 },
352 {
353 .id = AXP8XX_REG_ID_DCDC5,
354 .name = "dcdc5",
355 .enable_reg = AXP_POWERCTL1,
356 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5,
357 .enable_value = AXP_POWERCTL1_DCDC5,
358 .voltage_reg = AXP_VOLTCTL_DCDC5,
359 .voltage_min = 800,
360 .voltage_max = 1840,
361 .voltage_step1 = 10,
362 .voltage_nstep1 = 42,
363 .voltage_step2 = 20,
364 .voltage_nstep2 = 36,
365 },
366 {
367 .id = AXP8XX_REG_ID_DCDC6,
368 .name = "dcdc6",
369 .enable_reg = AXP_POWERCTL1,
370 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6,
371 .enable_value = AXP_POWERCTL1_DCDC6,
372 .voltage_reg = AXP_VOLTCTL_DCDC6,
373 .voltage_min = 600,
374 .voltage_max = 1520,
375 .voltage_step1 = 10,
376 .voltage_nstep1 = 50,
377 .voltage_step2 = 20,
378 .voltage_nstep2 = 21,
379 },
380 {
381 .id = AXP8XX_REG_ID_DLDO1,
382 .name = "dldo1",
383 .enable_reg = AXP_POWERCTL2,
384 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1,
385 .enable_value = AXP_POWERCTL2_DLDO1,
386 .voltage_reg = AXP_VOLTCTL_DLDO1,
387 .voltage_min = 700,
388 .voltage_max = 3300,
389 .voltage_step1 = 100,
390 .voltage_nstep1 = 26,
391 },
392 {
393 .id = AXP8XX_REG_ID_DLDO2,
394 .name = "dldo2",
395 .enable_reg = AXP_POWERCTL2,
396 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2,
397 .enable_value = AXP_POWERCTL2_DLDO2,
398 .voltage_reg = AXP_VOLTCTL_DLDO2,
399 .voltage_min = 700,
400 .voltage_max = 4200,
401 .voltage_step1 = 100,
402 .voltage_nstep1 = 27,
403 .voltage_step2 = 200,
404 .voltage_nstep2 = 4,
405 },
406 {
407 .id = AXP8XX_REG_ID_DLDO3,
408 .name = "dldo3",
409 .enable_reg = AXP_POWERCTL2,
410 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3,
411 .enable_value = AXP_POWERCTL2_DLDO3,
412 .voltage_reg = AXP_VOLTCTL_DLDO3,
413 .voltage_min = 700,
414 .voltage_max = 3300,
415 .voltage_step1 = 100,
416 .voltage_nstep1 = 26,
417 },
418 {
419 .id = AXP8XX_REG_ID_DLDO4,
420 .name = "dldo4",
421 .enable_reg = AXP_POWERCTL2,
422 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4,
423 .enable_value = AXP_POWERCTL2_DLDO4,
424 .voltage_reg = AXP_VOLTCTL_DLDO4,
425 .voltage_min = 700,
426 .voltage_max = 3300,
427 .voltage_step1 = 100,
428 .voltage_nstep1 = 26,
429 },
430 {
431 .id = AXP8XX_REG_ID_ALDO1,
432 .name = "aldo1",
433 .enable_reg = AXP_POWERCTL3,
434 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1,
435 .enable_value = AXP_POWERCTL3_ALDO1,
436 .voltage_reg = AXP_VOLTCTL_ALDO1,
437 .voltage_min = 700,
438 .voltage_max = 3300,
439 .voltage_step1 = 100,
440 .voltage_nstep1 = 26,
441 },
442 {
443 .id = AXP8XX_REG_ID_ALDO2,
444 .name = "aldo2",
445 .enable_reg = AXP_POWERCTL3,
446 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2,
447 .enable_value = AXP_POWERCTL3_ALDO2,
448 .voltage_reg = AXP_VOLTCTL_ALDO2,
449 .voltage_min = 700,
450 .voltage_max = 3300,
451 .voltage_step1 = 100,
452 .voltage_nstep1 = 26,
453 },
454 {
455 .id = AXP8XX_REG_ID_ALDO3,
456 .name = "aldo3",
457 .enable_reg = AXP_POWERCTL3,
458 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3,
459 .enable_value = AXP_POWERCTL3_ALDO3,
460 .voltage_reg = AXP_VOLTCTL_ALDO3,
461 .voltage_min = 700,
462 .voltage_max = 3300,
463 .voltage_step1 = 100,
464 .voltage_nstep1 = 26,
465 },
466 {
467 .id = AXP8XX_REG_ID_ELDO1,
468 .name = "eldo1",
469 .enable_reg = AXP_POWERCTL2,
470 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1,
471 .enable_value = AXP_POWERCTL2_ELDO1,
472 .voltage_reg = AXP_VOLTCTL_ELDO1,
473 .voltage_min = 700,
474 .voltage_max = 1900,
475 .voltage_step1 = 50,
476 .voltage_nstep1 = 24,
477 },
478 {
479 .id = AXP8XX_REG_ID_ELDO2,
480 .name = "eldo2",
481 .enable_reg = AXP_POWERCTL2,
482 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2,
483 .enable_value = AXP_POWERCTL2_ELDO2,
484 .voltage_reg = AXP_VOLTCTL_ELDO2,
485 .voltage_min = 700,
486 .voltage_max = 1900,
487 .voltage_step1 = 50,
488 .voltage_nstep1 = 24,
489 },
490 {
491 .id = AXP8XX_REG_ID_ELDO3,
492 .name = "eldo3",
493 .enable_reg = AXP_POWERCTL2,
494 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3,
495 .enable_value = AXP_POWERCTL2_ELDO3,
496 .voltage_reg = AXP_VOLTCTL_ELDO3,
497 .voltage_min = 700,
498 .voltage_max = 1900,
499 .voltage_step1 = 50,
500 .voltage_nstep1 = 24,
501 },
502 {
503 .id = AXP8XX_REG_ID_FLDO1,
504 .name = "fldo1",
505 .enable_reg = AXP_POWERCTL3,
506 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1,
507 .enable_value = AXP_POWERCTL3_FLDO1,
508 .voltage_reg = AXP_VOLTCTL_FLDO1,
509 .voltage_min = 700,
510 .voltage_max = 1450,
511 .voltage_step1 = 50,
512 .voltage_nstep1 = 15,
513 },
514 {
515 .id = AXP8XX_REG_ID_FLDO2,
516 .name = "fldo2",
517 .enable_reg = AXP_POWERCTL3,
518 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2,
519 .enable_value = AXP_POWERCTL3_FLDO2,
520 .voltage_reg = AXP_VOLTCTL_FLDO2,
521 .voltage_min = 700,
522 .voltage_max = 1450,
523 .voltage_step1 = 50,
524 .voltage_nstep1 = 15,
525 },
526 {
527 .id = AXP8XX_REG_ID_GPIO0_LDO,
528 .name = "ldo-io0",
529 .enable_reg = AXP_GPIO0_CTRL,
530 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
531 .enable_value = AXP_GPIO_FUNC_LDO_ON,
532 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
533 .voltage_reg = AXP_GPIO0LDO_CTRL,
534 .voltage_min = 700,
535 .voltage_max = 3300,
536 .voltage_step1 = 100,
537 .voltage_nstep1 = 26,
538 },
539 {
540 .id = AXP8XX_REG_ID_GPIO1_LDO,
541 .name = "ldo-io1",
542 .enable_reg = AXP_GPIO1_CTRL,
543 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
544 .enable_value = AXP_GPIO_FUNC_LDO_ON,
545 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
546 .voltage_reg = AXP_GPIO1LDO_CTRL,
547 .voltage_min = 700,
548 .voltage_max = 3300,
549 .voltage_step1 = 100,
550 .voltage_nstep1 = 26,
551 },
552 };
553
554 enum axp8xx_sensor {
555 AXP_SENSOR_ACIN_PRESENT,
556 AXP_SENSOR_VBUS_PRESENT,
557 AXP_SENSOR_BATT_PRESENT,
558 AXP_SENSOR_BATT_CHARGING,
559 AXP_SENSOR_BATT_CHARGE_STATE,
560 AXP_SENSOR_BATT_VOLTAGE,
561 AXP_SENSOR_BATT_CHARGE_CURRENT,
562 AXP_SENSOR_BATT_DISCHARGE_CURRENT,
563 AXP_SENSOR_BATT_CAPACITY_PERCENT,
564 AXP_SENSOR_BATT_MAXIMUM_CAPACITY,
565 AXP_SENSOR_BATT_CURRENT_CAPACITY,
566 };
567
568 enum battery_capacity_state {
569 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */
570 BATT_CAPACITY_WARNING, /* warning cap in battery */
571 BATT_CAPACITY_CRITICAL, /* critical cap in battery */
572 BATT_CAPACITY_HIGH, /* high cap in battery */
573 BATT_CAPACITY_MAX, /* maximum cap in battery */
574 BATT_CAPACITY_LOW /* low cap in battery */
575 };
576
577 struct axp8xx_sensors {
578 int id;
579 const char *name;
580 const char *desc;
581 const char *format;
582 };
583
584 static const struct axp8xx_sensors axp8xx_common_sensors[] = {
585 {
586 .id = AXP_SENSOR_ACIN_PRESENT,
587 .name = "acin",
588 .format = "I",
589 .desc = "ACIN Present",
590 },
591 {
592 .id = AXP_SENSOR_VBUS_PRESENT,
593 .name = "vbus",
594 .format = "I",
595 .desc = "VBUS Present",
596 },
597 {
598 .id = AXP_SENSOR_BATT_PRESENT,
599 .name = "bat",
600 .format = "I",
601 .desc = "Battery Present",
602 },
603 {
604 .id = AXP_SENSOR_BATT_CHARGING,
605 .name = "batcharging",
606 .format = "I",
607 .desc = "Battery Charging",
608 },
609 {
610 .id = AXP_SENSOR_BATT_CHARGE_STATE,
611 .name = "batchargestate",
612 .format = "I",
613 .desc = "Battery Charge State",
614 },
615 {
616 .id = AXP_SENSOR_BATT_VOLTAGE,
617 .name = "batvolt",
618 .format = "I",
619 .desc = "Battery Voltage",
620 },
621 {
622 .id = AXP_SENSOR_BATT_CHARGE_CURRENT,
623 .name = "batchargecurrent",
624 .format = "I",
625 .desc = "Average Battery Charging Current",
626 },
627 {
628 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT,
629 .name = "batdischargecurrent",
630 .format = "I",
631 .desc = "Average Battery Discharging Current",
632 },
633 {
634 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT,
635 .name = "batcapacitypercent",
636 .format = "I",
637 .desc = "Battery Capacity Percentage",
638 },
639 {
640 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY,
641 .name = "batmaxcapacity",
642 .format = "I",
643 .desc = "Battery Maximum Capacity",
644 },
645 {
646 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY,
647 .name = "batcurrentcapacity",
648 .format = "I",
649 .desc = "Battery Current Capacity",
650 },
651 };
652
653 struct axp8xx_config {
654 const char *name;
655 int batsense_step; /* uV */
656 int charge_step; /* uA */
657 int discharge_step; /* uA */
658 int maxcap_step; /* uAh */
659 int coulomb_step; /* uAh */
660 };
661
662 static struct axp8xx_config axp803_config = {
663 .name = "AXP803",
664 .batsense_step = 1100,
665 .charge_step = 1000,
666 .discharge_step = 1000,
667 .maxcap_step = 1456,
668 .coulomb_step = 1456,
669 };
670
671 struct axp8xx_softc;
672
673 struct axp8xx_reg_sc {
674 struct regnode *regnode;
675 device_t base_dev;
676 struct axp8xx_regdef *def;
677 phandle_t xref;
678 struct regnode_std_param *param;
679 };
680
681 struct axp8xx_softc {
682 struct resource *res;
683 uint16_t addr;
684 void *ih;
685 device_t gpiodev;
686 struct mtx mtx;
687 int busy;
688
689 int type;
690
691 /* Configs */
692 const struct axp8xx_config *config;
693
694 /* Sensors */
695 const struct axp8xx_sensors *sensors;
696 int nsensors;
697
698 /* Regulators */
699 struct axp8xx_reg_sc **regs;
700 int nregs;
701
702 /* Warning, shutdown thresholds */
703 int warn_thres;
704 int shut_thres;
705 };
706
707 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx)
708 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
709 static int axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
710 int max_uvolt, int *udelay);
711
712 static int
axp8xx_read(device_t dev,uint8_t reg,uint8_t * data,uint8_t size)713 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
714 {
715 struct axp8xx_softc *sc;
716 struct iic_msg msg[2];
717
718 sc = device_get_softc(dev);
719
720 msg[0].slave = sc->addr;
721 msg[0].flags = IIC_M_WR;
722 msg[0].len = 1;
723 msg[0].buf = ®
724
725 msg[1].slave = sc->addr;
726 msg[1].flags = IIC_M_RD;
727 msg[1].len = size;
728 msg[1].buf = data;
729
730 return (iicbus_transfer(dev, msg, 2));
731 }
732
733 static int
axp8xx_write(device_t dev,uint8_t reg,uint8_t val)734 axp8xx_write(device_t dev, uint8_t reg, uint8_t val)
735 {
736 struct axp8xx_softc *sc;
737 struct iic_msg msg[2];
738
739 sc = device_get_softc(dev);
740
741 msg[0].slave = sc->addr;
742 msg[0].flags = IIC_M_WR;
743 msg[0].len = 1;
744 msg[0].buf = ®
745
746 msg[1].slave = sc->addr;
747 msg[1].flags = IIC_M_WR;
748 msg[1].len = 1;
749 msg[1].buf = &val;
750
751 return (iicbus_transfer(dev, msg, 2));
752 }
753
754 static int
axp8xx_regnode_init(struct regnode * regnode)755 axp8xx_regnode_init(struct regnode *regnode)
756 {
757 struct regnode_std_param *param;
758 int rv, udelay;
759
760 param = regnode_get_stdparam(regnode);
761 if (param->min_uvolt == 0)
762 return (0);
763
764 /*
765 * Set the regulator at the correct voltage
766 * Do not enable it, this is will be done either by a
767 * consumer or by regnode_set_constraint if boot_on is true
768 */
769 rv = axp8xx_regnode_set_voltage(regnode, param->min_uvolt,
770 param->max_uvolt, &udelay);
771 if (rv != 0)
772 DELAY(udelay);
773
774 return (rv);
775 }
776
777 static int
axp8xx_regnode_enable(struct regnode * regnode,bool enable,int * udelay)778 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay)
779 {
780 struct axp8xx_reg_sc *sc;
781 uint8_t val;
782
783 sc = regnode_get_softc(regnode);
784
785 if (bootverbose)
786 device_printf(sc->base_dev, "%sable %s (%s)\n",
787 enable ? "En" : "Dis",
788 regnode_get_name(regnode),
789 sc->def->name);
790
791 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
792 val &= ~sc->def->enable_mask;
793 if (enable)
794 val |= sc->def->enable_value;
795 else {
796 if (sc->def->disable_value)
797 val |= sc->def->disable_value;
798 else
799 val &= ~sc->def->enable_value;
800 }
801 axp8xx_write(sc->base_dev, sc->def->enable_reg, val);
802
803 *udelay = 0;
804
805 return (0);
806 }
807
808 static void
axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc * sc,uint8_t val,int * uv)809 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv)
810 {
811 if (val < sc->def->voltage_nstep1)
812 *uv = sc->def->voltage_min + val * sc->def->voltage_step1;
813 else
814 *uv = sc->def->voltage_min +
815 (sc->def->voltage_nstep1 * sc->def->voltage_step1) +
816 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2);
817 *uv *= 1000;
818 }
819
820 static int
axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc * sc,int min_uvolt,int max_uvolt,uint8_t * val)821 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt,
822 int max_uvolt, uint8_t *val)
823 {
824 uint8_t nval;
825 int nstep, uvolt;
826
827 nval = 0;
828 uvolt = sc->def->voltage_min * 1000;
829
830 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt;
831 nstep++) {
832 ++nval;
833 uvolt += (sc->def->voltage_step1 * 1000);
834 }
835 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt;
836 nstep++) {
837 ++nval;
838 uvolt += (sc->def->voltage_step2 * 1000);
839 }
840 if (uvolt > max_uvolt)
841 return (EINVAL);
842
843 *val = nval;
844 return (0);
845 }
846
847 static int
axp8xx_regnode_status(struct regnode * regnode,int * status)848 axp8xx_regnode_status(struct regnode *regnode, int *status)
849 {
850 struct axp8xx_reg_sc *sc;
851 uint8_t val;
852
853 sc = regnode_get_softc(regnode);
854
855 *status = 0;
856 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
857 if (val & sc->def->enable_mask)
858 *status = REGULATOR_STATUS_ENABLED;
859
860 return (0);
861 }
862
863 static int
axp8xx_regnode_set_voltage(struct regnode * regnode,int min_uvolt,int max_uvolt,int * udelay)864 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
865 int max_uvolt, int *udelay)
866 {
867 struct axp8xx_reg_sc *sc;
868 uint8_t val;
869
870 sc = regnode_get_softc(regnode);
871
872 if (bootverbose)
873 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n",
874 regnode_get_name(regnode),
875 sc->def->name,
876 min_uvolt, max_uvolt);
877
878 if (sc->def->voltage_step1 == 0)
879 return (ENXIO);
880
881 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0)
882 return (ERANGE);
883
884 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val);
885
886 *udelay = 0;
887
888 return (0);
889 }
890
891 static int
axp8xx_regnode_get_voltage(struct regnode * regnode,int * uvolt)892 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt)
893 {
894 struct axp8xx_reg_sc *sc;
895 uint8_t val;
896
897 sc = regnode_get_softc(regnode);
898
899 if (!sc->def->voltage_step1 || !sc->def->voltage_step2)
900 return (ENXIO);
901
902 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
903 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt);
904
905 return (0);
906 }
907
908 static regnode_method_t axp8xx_regnode_methods[] = {
909 /* Regulator interface */
910 REGNODEMETHOD(regnode_init, axp8xx_regnode_init),
911 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable),
912 REGNODEMETHOD(regnode_status, axp8xx_regnode_status),
913 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage),
914 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage),
915 REGNODEMETHOD(regnode_check_voltage, regnode_method_check_voltage),
916 REGNODEMETHOD_END
917 };
918 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods,
919 sizeof(struct axp8xx_reg_sc), regnode_class);
920
921 static void
axp8xx_shutdown(void * devp,int howto)922 axp8xx_shutdown(void *devp, int howto)
923 {
924 device_t dev;
925
926 if ((howto & RB_POWEROFF) == 0)
927 return;
928
929 dev = devp;
930
931 if (bootverbose)
932 device_printf(dev, "Shutdown Axp8xx\n");
933
934 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN);
935 }
936
937 static int
axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS)938 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS)
939 {
940 device_t dev = arg1;
941 uint8_t data;
942 int val, error;
943
944 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1);
945 if (error != 0)
946 return (error);
947
948 if (bootverbose)
949 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data);
950 val = (data & AXP_CHARGERCTL1_CMASK);
951 error = sysctl_handle_int(oidp, &val, 0, req);
952 if (error || !req->newptr) /* error || read request */
953 return (error);
954
955 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX))
956 return (EINVAL);
957
958 val |= (data & (AXP_CHARGERCTL1_CMASK << 4));
959 axp8xx_write(dev, AXP_CHARGERCTL1, val);
960
961 return (0);
962 }
963
964 static int
axp8xx_sysctl(SYSCTL_HANDLER_ARGS)965 axp8xx_sysctl(SYSCTL_HANDLER_ARGS)
966 {
967 struct axp8xx_softc *sc;
968 device_t dev = arg1;
969 enum axp8xx_sensor sensor = arg2;
970 const struct axp8xx_config *c;
971 uint8_t data;
972 int val, i, found, batt_val;
973 uint8_t lo, hi;
974
975 sc = device_get_softc(dev);
976 c = sc->config;
977
978 for (found = 0, i = 0; i < sc->nsensors; i++) {
979 if (sc->sensors[i].id == sensor) {
980 found = 1;
981 break;
982 }
983 }
984
985 if (found == 0)
986 return (ENOENT);
987
988 switch (sensor) {
989 case AXP_SENSOR_ACIN_PRESENT:
990 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0)
991 val = !!(data & AXP_POWERSRC_ACIN);
992 break;
993 case AXP_SENSOR_VBUS_PRESENT:
994 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0)
995 val = !!(data & AXP_POWERSRC_VBUS);
996 break;
997 case AXP_SENSOR_BATT_PRESENT:
998 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) {
999 if (data & AXP_POWERMODE_BAT_VALID)
1000 val = !!(data & AXP_POWERMODE_BAT_PRESENT);
1001 }
1002 break;
1003 case AXP_SENSOR_BATT_CHARGING:
1004 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0)
1005 val = !!(data & AXP_POWERMODE_BAT_CHARGING);
1006 break;
1007 case AXP_SENSOR_BATT_CHARGE_STATE:
1008 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 &&
1009 (data & AXP_BAT_CAP_VALID) != 0) {
1010 batt_val = (data & AXP_BAT_CAP_PERCENT);
1011 if (batt_val <= sc->shut_thres)
1012 val = BATT_CAPACITY_CRITICAL;
1013 else if (batt_val <= sc->warn_thres)
1014 val = BATT_CAPACITY_WARNING;
1015 else
1016 val = BATT_CAPACITY_NORMAL;
1017 }
1018 break;
1019 case AXP_SENSOR_BATT_CAPACITY_PERCENT:
1020 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 &&
1021 (data & AXP_BAT_CAP_VALID) != 0)
1022 val = (data & AXP_BAT_CAP_PERCENT);
1023 break;
1024 case AXP_SENSOR_BATT_VOLTAGE:
1025 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 &&
1026 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) {
1027 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
1028 val *= c->batsense_step;
1029 }
1030 break;
1031 case AXP_SENSOR_BATT_CHARGE_CURRENT:
1032 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 &&
1033 (data & AXP_POWERSRC_CHARING) != 0 &&
1034 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 &&
1035 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) {
1036 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
1037 val *= c->charge_step;
1038 }
1039 break;
1040 case AXP_SENSOR_BATT_DISCHARGE_CURRENT:
1041 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 &&
1042 (data & AXP_POWERSRC_CHARING) == 0 &&
1043 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 &&
1044 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) {
1045 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
1046 val *= c->discharge_step;
1047 }
1048 break;
1049 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY:
1050 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 &&
1051 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) {
1052 val = AXP_SENSOR_COULOMB(hi, lo);
1053 val *= c->maxcap_step;
1054 }
1055 break;
1056 case AXP_SENSOR_BATT_CURRENT_CAPACITY:
1057 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 &&
1058 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) {
1059 val = AXP_SENSOR_COULOMB(hi, lo);
1060 val *= c->coulomb_step;
1061 }
1062 break;
1063 }
1064
1065 return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
1066 }
1067
1068 static void
axp8xx_intr(void * arg)1069 axp8xx_intr(void *arg)
1070 {
1071 device_t dev;
1072 uint8_t val;
1073 int error;
1074
1075 dev = arg;
1076
1077 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1);
1078 if (error != 0)
1079 return;
1080
1081 if (val) {
1082 if (bootverbose)
1083 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val);
1084 if (val & AXP_IRQSTAT1_ACIN_HI)
1085 devctl_notify("PMU", "AC", "plugged", NULL);
1086 if (val & AXP_IRQSTAT1_ACIN_LO)
1087 devctl_notify("PMU", "AC", "unplugged", NULL);
1088 if (val & AXP_IRQSTAT1_VBUS_HI)
1089 devctl_notify("PMU", "USB", "plugged", NULL);
1090 if (val & AXP_IRQSTAT1_VBUS_LO)
1091 devctl_notify("PMU", "USB", "unplugged", NULL);
1092 /* Acknowledge */
1093 axp8xx_write(dev, AXP_IRQSTAT1, val);
1094 }
1095
1096 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1);
1097 if (error != 0)
1098 return;
1099
1100 if (val) {
1101 if (bootverbose)
1102 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val);
1103 if (val & AXP_IRQSTAT2_BATCHGD)
1104 devctl_notify("PMU", "Battery", "charged", NULL);
1105 if (val & AXP_IRQSTAT2_BATCHGC)
1106 devctl_notify("PMU", "Battery", "charging", NULL);
1107 if (val & AXP_IRQSTAT2_BAT_NO)
1108 devctl_notify("PMU", "Battery", "absent", NULL);
1109 if (val & AXP_IRQSTAT2_BAT_IN)
1110 devctl_notify("PMU", "Battery", "plugged", NULL);
1111 /* Acknowledge */
1112 axp8xx_write(dev, AXP_IRQSTAT2, val);
1113 }
1114
1115 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1);
1116 if (error != 0)
1117 return;
1118
1119 if (val) {
1120 /* Acknowledge */
1121 axp8xx_write(dev, AXP_IRQSTAT3, val);
1122 }
1123
1124 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1);
1125 if (error != 0)
1126 return;
1127
1128 if (val) {
1129 if (bootverbose)
1130 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val);
1131 if (val & AXP_IRQSTAT4_BATLVL_LO0)
1132 devctl_notify("PMU", "Battery", "shutdown-threshold", NULL);
1133 if (val & AXP_IRQSTAT4_BATLVL_LO1)
1134 devctl_notify("PMU", "Battery", "warning-threshold", NULL);
1135 /* Acknowledge */
1136 axp8xx_write(dev, AXP_IRQSTAT4, val);
1137 }
1138
1139 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1);
1140 if (error != 0)
1141 return;
1142
1143 if (val != 0) {
1144 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) {
1145 if (bootverbose)
1146 device_printf(dev, "Power button pressed\n");
1147 shutdown_nice(RB_POWEROFF);
1148 }
1149 /* Acknowledge */
1150 axp8xx_write(dev, AXP_IRQSTAT5, val);
1151 }
1152
1153 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1);
1154 if (error != 0)
1155 return;
1156
1157 if (val) {
1158 /* Acknowledge */
1159 axp8xx_write(dev, AXP_IRQSTAT6, val);
1160 }
1161 }
1162
1163 static device_t
axp8xx_gpio_get_bus(device_t dev)1164 axp8xx_gpio_get_bus(device_t dev)
1165 {
1166 struct axp8xx_softc *sc;
1167
1168 sc = device_get_softc(dev);
1169
1170 return (sc->gpiodev);
1171 }
1172
1173 static int
axp8xx_gpio_pin_max(device_t dev,int * maxpin)1174 axp8xx_gpio_pin_max(device_t dev, int *maxpin)
1175 {
1176 *maxpin = nitems(axp8xx_pins) - 1;
1177
1178 return (0);
1179 }
1180
1181 static int
axp8xx_gpio_pin_getname(device_t dev,uint32_t pin,char * name)1182 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
1183 {
1184 if (pin >= nitems(axp8xx_pins))
1185 return (EINVAL);
1186
1187 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name);
1188
1189 return (0);
1190 }
1191
1192 static int
axp8xx_gpio_pin_getcaps(device_t dev,uint32_t pin,uint32_t * caps)1193 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
1194 {
1195 if (pin >= nitems(axp8xx_pins))
1196 return (EINVAL);
1197
1198 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
1199
1200 return (0);
1201 }
1202
1203 static int
axp8xx_gpio_pin_getflags(device_t dev,uint32_t pin,uint32_t * flags)1204 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
1205 {
1206 struct axp8xx_softc *sc;
1207 uint8_t data, func;
1208 int error;
1209
1210 if (pin >= nitems(axp8xx_pins))
1211 return (EINVAL);
1212
1213 sc = device_get_softc(dev);
1214
1215 AXP_LOCK(sc);
1216 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1217 if (error == 0) {
1218 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1219 if (func == AXP_GPIO_FUNC_INPUT)
1220 *flags = GPIO_PIN_INPUT;
1221 else if (func == AXP_GPIO_FUNC_DRVLO ||
1222 func == AXP_GPIO_FUNC_DRVHI)
1223 *flags = GPIO_PIN_OUTPUT;
1224 else
1225 *flags = 0;
1226 }
1227 AXP_UNLOCK(sc);
1228
1229 return (error);
1230 }
1231
1232 static int
axp8xx_gpio_pin_setflags(device_t dev,uint32_t pin,uint32_t flags)1233 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
1234 {
1235 struct axp8xx_softc *sc;
1236 uint8_t data;
1237 int error;
1238
1239 if (pin >= nitems(axp8xx_pins))
1240 return (EINVAL);
1241
1242 sc = device_get_softc(dev);
1243
1244 AXP_LOCK(sc);
1245 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1246 if (error == 0) {
1247 data &= ~AXP_GPIO_FUNC;
1248 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) {
1249 if ((flags & GPIO_PIN_OUTPUT) == 0)
1250 data |= AXP_GPIO_FUNC_INPUT;
1251 }
1252 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1253 }
1254 AXP_UNLOCK(sc);
1255
1256 return (error);
1257 }
1258
1259 static int
axp8xx_gpio_pin_get(device_t dev,uint32_t pin,unsigned int * val)1260 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
1261 {
1262 struct axp8xx_softc *sc;
1263 uint8_t data, func;
1264 int error;
1265
1266 if (pin >= nitems(axp8xx_pins))
1267 return (EINVAL);
1268
1269 sc = device_get_softc(dev);
1270
1271 AXP_LOCK(sc);
1272 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1273 if (error == 0) {
1274 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1275 switch (func) {
1276 case AXP_GPIO_FUNC_DRVLO:
1277 *val = 0;
1278 break;
1279 case AXP_GPIO_FUNC_DRVHI:
1280 *val = 1;
1281 break;
1282 case AXP_GPIO_FUNC_INPUT:
1283 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1);
1284 if (error == 0)
1285 *val = (data & (1 << pin)) ? 1 : 0;
1286 break;
1287 default:
1288 error = EIO;
1289 break;
1290 }
1291 }
1292 AXP_UNLOCK(sc);
1293
1294 return (error);
1295 }
1296
1297 static int
axp8xx_gpio_pin_set(device_t dev,uint32_t pin,unsigned int val)1298 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
1299 {
1300 struct axp8xx_softc *sc;
1301 uint8_t data, func;
1302 int error;
1303
1304 if (pin >= nitems(axp8xx_pins))
1305 return (EINVAL);
1306
1307 sc = device_get_softc(dev);
1308
1309 AXP_LOCK(sc);
1310 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1311 if (error == 0) {
1312 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1313 switch (func) {
1314 case AXP_GPIO_FUNC_DRVLO:
1315 case AXP_GPIO_FUNC_DRVHI:
1316 data &= ~AXP_GPIO_FUNC;
1317 data |= (val << AXP_GPIO_FUNC_SHIFT);
1318 break;
1319 default:
1320 error = EIO;
1321 break;
1322 }
1323 }
1324 if (error == 0)
1325 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1326 AXP_UNLOCK(sc);
1327
1328 return (error);
1329 }
1330
1331 static int
axp8xx_gpio_pin_toggle(device_t dev,uint32_t pin)1332 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin)
1333 {
1334 struct axp8xx_softc *sc;
1335 uint8_t data, func;
1336 int error;
1337
1338 if (pin >= nitems(axp8xx_pins))
1339 return (EINVAL);
1340
1341 sc = device_get_softc(dev);
1342
1343 AXP_LOCK(sc);
1344 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1345 if (error == 0) {
1346 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1347 switch (func) {
1348 case AXP_GPIO_FUNC_DRVLO:
1349 data &= ~AXP_GPIO_FUNC;
1350 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT);
1351 break;
1352 case AXP_GPIO_FUNC_DRVHI:
1353 data &= ~AXP_GPIO_FUNC;
1354 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT);
1355 break;
1356 default:
1357 error = EIO;
1358 break;
1359 }
1360 }
1361 if (error == 0)
1362 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1363 AXP_UNLOCK(sc);
1364
1365 return (error);
1366 }
1367
1368 static int
axp8xx_gpio_map_gpios(device_t bus,phandle_t dev,phandle_t gparent,int gcells,pcell_t * gpios,uint32_t * pin,uint32_t * flags)1369 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent,
1370 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags)
1371 {
1372 if (gpios[0] >= nitems(axp8xx_pins))
1373 return (EINVAL);
1374
1375 *pin = gpios[0];
1376 *flags = gpios[1];
1377
1378 return (0);
1379 }
1380
1381 static phandle_t
axp8xx_get_node(device_t dev,device_t bus)1382 axp8xx_get_node(device_t dev, device_t bus)
1383 {
1384 return (ofw_bus_get_node(dev));
1385 }
1386
1387 static struct axp8xx_reg_sc *
axp8xx_reg_attach(device_t dev,phandle_t node,struct axp8xx_regdef * def)1388 axp8xx_reg_attach(device_t dev, phandle_t node,
1389 struct axp8xx_regdef *def)
1390 {
1391 struct axp8xx_reg_sc *reg_sc;
1392 struct regnode_init_def initdef;
1393 struct regnode *regnode;
1394
1395 memset(&initdef, 0, sizeof(initdef));
1396 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0)
1397 return (NULL);
1398 if (initdef.std_param.min_uvolt == 0)
1399 initdef.std_param.min_uvolt = def->voltage_min * 1000;
1400 if (initdef.std_param.max_uvolt == 0)
1401 initdef.std_param.max_uvolt = def->voltage_max * 1000;
1402 initdef.id = def->id;
1403 initdef.ofw_node = node;
1404 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef);
1405 if (regnode == NULL) {
1406 device_printf(dev, "cannot create regulator\n");
1407 return (NULL);
1408 }
1409
1410 reg_sc = regnode_get_softc(regnode);
1411 reg_sc->regnode = regnode;
1412 reg_sc->base_dev = dev;
1413 reg_sc->def = def;
1414 reg_sc->xref = OF_xref_from_node(node);
1415 reg_sc->param = regnode_get_stdparam(regnode);
1416
1417 regnode_register(regnode);
1418
1419 return (reg_sc);
1420 }
1421
1422 static int
axp8xx_regdev_map(device_t dev,phandle_t xref,int ncells,pcell_t * cells,intptr_t * num)1423 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells,
1424 intptr_t *num)
1425 {
1426 struct axp8xx_softc *sc;
1427 int i;
1428
1429 sc = device_get_softc(dev);
1430 for (i = 0; i < sc->nregs; i++) {
1431 if (sc->regs[i] == NULL)
1432 continue;
1433 if (sc->regs[i]->xref == xref) {
1434 *num = sc->regs[i]->def->id;
1435 return (0);
1436 }
1437 }
1438
1439 return (ENXIO);
1440 }
1441
1442 static int
axp8xx_probe(device_t dev)1443 axp8xx_probe(device_t dev)
1444 {
1445 if (!ofw_bus_status_okay(dev))
1446 return (ENXIO);
1447
1448 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data)
1449 {
1450 case AXP803:
1451 device_set_desc(dev, "X-Powers AXP803 Power Management Unit");
1452 break;
1453 case AXP813:
1454 device_set_desc(dev, "X-Powers AXP813 Power Management Unit");
1455 break;
1456 default:
1457 return (ENXIO);
1458 }
1459
1460 return (BUS_PROBE_DEFAULT);
1461 }
1462
1463 static int
axp8xx_attach(device_t dev)1464 axp8xx_attach(device_t dev)
1465 {
1466 struct axp8xx_softc *sc;
1467 struct axp8xx_reg_sc *reg;
1468 uint8_t chip_id, val;
1469 phandle_t rnode, child;
1470 int error, i;
1471
1472 sc = device_get_softc(dev);
1473
1474 sc->addr = iicbus_get_addr(dev);
1475 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
1476
1477 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res);
1478 if (error != 0) {
1479 device_printf(dev, "cannot allocate resources for device\n");
1480 return (error);
1481 }
1482
1483 if (bootverbose) {
1484 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1);
1485 device_printf(dev, "chip ID 0x%02x\n", chip_id);
1486 }
1487
1488 sc->nregs = nitems(axp8xx_common_regdefs);
1489 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
1490 switch (sc->type) {
1491 case AXP803:
1492 sc->nregs += nitems(axp803_regdefs);
1493 break;
1494 case AXP813:
1495 sc->nregs += nitems(axp813_regdefs);
1496 break;
1497 }
1498 sc->config = &axp803_config;
1499 sc->sensors = axp8xx_common_sensors;
1500 sc->nsensors = nitems(axp8xx_common_sensors);
1501
1502 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs,
1503 M_AXP8XX_REG, M_WAITOK | M_ZERO);
1504
1505 /* Attach known regulators that exist in the DT */
1506 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators");
1507 if (rnode > 0) {
1508 for (i = 0; i < sc->nregs; i++) {
1509 char *regname;
1510 struct axp8xx_regdef *regdef;
1511
1512 if (i <= nitems(axp8xx_common_regdefs)) {
1513 regname = axp8xx_common_regdefs[i].name;
1514 regdef = &axp8xx_common_regdefs[i];
1515 } else {
1516 int off;
1517
1518 off = i - nitems(axp8xx_common_regdefs);
1519 switch (sc->type) {
1520 case AXP803:
1521 regname = axp803_regdefs[off].name;
1522 regdef = &axp803_regdefs[off];
1523 break;
1524 case AXP813:
1525 regname = axp813_regdefs[off].name;
1526 regdef = &axp813_regdefs[off];
1527 break;
1528 }
1529 }
1530 child = ofw_bus_find_child(rnode,
1531 regname);
1532 if (child == 0)
1533 continue;
1534 reg = axp8xx_reg_attach(dev, child,
1535 regdef);
1536 if (reg == NULL) {
1537 device_printf(dev,
1538 "cannot attach regulator %s\n",
1539 regname);
1540 continue;
1541 }
1542 sc->regs[i] = reg;
1543 }
1544 }
1545
1546 /* Add sensors */
1547 for (i = 0; i < sc->nsensors; i++) {
1548 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1549 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1550 OID_AUTO, sc->sensors[i].name,
1551 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT,
1552 dev, sc->sensors[i].id, axp8xx_sysctl,
1553 sc->sensors[i].format,
1554 sc->sensors[i].desc);
1555 }
1556 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1557 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1558 OID_AUTO, "batchargecurrentstep",
1559 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
1560 dev, 0, axp8xx_sysctl_chargecurrent,
1561 "I", "Battery Charging Current Step, "
1562 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, "
1563 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, "
1564 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, "
1565 "12: 2600mA, 13: 2800mA");
1566
1567 /* Get thresholds */
1568 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) {
1569 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4;
1570 sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE;
1571 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2);
1572 if (bootverbose) {
1573 device_printf(dev,
1574 "Raw reg val: 0x%02x\n", val);
1575 device_printf(dev,
1576 "Warning threshold: 0x%02x\n", sc->warn_thres);
1577 device_printf(dev,
1578 "Shutdown threshold: 0x%02x\n", sc->shut_thres);
1579 }
1580 }
1581
1582 /* Enable interrupts */
1583 axp8xx_write(dev, AXP_IRQEN1,
1584 AXP_IRQEN1_VBUS_LO |
1585 AXP_IRQEN1_VBUS_HI |
1586 AXP_IRQEN1_ACIN_LO |
1587 AXP_IRQEN1_ACIN_HI);
1588 axp8xx_write(dev, AXP_IRQEN2,
1589 AXP_IRQEN2_BATCHGD |
1590 AXP_IRQEN2_BATCHGC |
1591 AXP_IRQEN2_BAT_NO |
1592 AXP_IRQEN2_BAT_IN);
1593 axp8xx_write(dev, AXP_IRQEN3, 0);
1594 axp8xx_write(dev, AXP_IRQEN4,
1595 AXP_IRQEN4_BATLVL_LO0 |
1596 AXP_IRQEN4_BATLVL_LO1);
1597 axp8xx_write(dev, AXP_IRQEN5,
1598 AXP_IRQEN5_POKSIRQ |
1599 AXP_IRQEN5_POKLIRQ);
1600 axp8xx_write(dev, AXP_IRQEN6, 0);
1601
1602 /* Install interrupt handler */
1603 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE,
1604 NULL, axp8xx_intr, dev, &sc->ih);
1605 if (error != 0) {
1606 device_printf(dev, "cannot setup interrupt handler\n");
1607 return (error);
1608 }
1609
1610 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev,
1611 SHUTDOWN_PRI_LAST);
1612
1613 sc->gpiodev = gpiobus_attach_bus(dev);
1614
1615 return (0);
1616 }
1617
1618 static device_method_t axp8xx_methods[] = {
1619 /* Device interface */
1620 DEVMETHOD(device_probe, axp8xx_probe),
1621 DEVMETHOD(device_attach, axp8xx_attach),
1622
1623 /* GPIO interface */
1624 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus),
1625 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max),
1626 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname),
1627 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps),
1628 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags),
1629 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags),
1630 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get),
1631 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set),
1632 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle),
1633 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios),
1634
1635 /* Regdev interface */
1636 DEVMETHOD(regdev_map, axp8xx_regdev_map),
1637
1638 /* OFW bus interface */
1639 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node),
1640
1641 DEVMETHOD_END
1642 };
1643
1644 static driver_t axp8xx_driver = {
1645 "axp8xx_pmu",
1646 axp8xx_methods,
1647 sizeof(struct axp8xx_softc),
1648 };
1649
1650 extern driver_t ofw_gpiobus_driver, gpioc_driver;
1651
1652 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, 0, 0,
1653 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1654 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 0, 0,
1655 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1656 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, 0, 0);
1657 MODULE_VERSION(axp8xx, 1);
1658 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1);
1659 SIMPLEBUS_PNP_INFO(compat_data);
1660