1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2020 Broadcom
3  * All rights reserved.
4  */
5 
6 #ifndef _HCAPI_CFA_P4_H_
7 #define _HCAPI_CFA_P4_H_
8 
9 #include "cfa_p40_hw.h"
10 
11 /** CFA phase 4 fix formatted table(layout) ID definition
12  *
13  */
14 enum cfa_p4_tbl_id {
15 	CFA_P4_TBL_L2CTXT_TCAM = 0,
16 	CFA_P4_TBL_L2CTXT_REMAP,
17 	CFA_P4_TBL_PROF_TCAM,
18 	CFA_P4_TBL_PROF_TCAM_REMAP,
19 	CFA_P4_TBL_WC_TCAM,
20 	CFA_P4_TBL_WC_TCAM_REC,
21 	CFA_P4_TBL_WC_TCAM_REMAP,
22 	CFA_P4_TBL_VEB_TCAM,
23 	CFA_P4_TBL_SP_TCAM,
24 	CFA_P4_TBL_PROF_SPIF_DFLT_L2CTXT,
25 	CFA_P4_TBL_PROF_PARIF_DFLT_ACT_REC_PTR,
26 	CFA_P4_TBL_PROF_PARIF_ERR_ACT_REC_PTR,
27 	CFA_P4_TBL_LKUP_PARIF_DFLT_ACT_REC_PTR,
28 	CFA_P4_TBL_MAX
29 };
30 
31 #define CFA_P4_PROF_MAX_KEYS 4
32 enum cfa_p4_mac_sel_mode {
33 	CFA_P4_MAC_SEL_MODE_FIRST = 0,
34 	CFA_P4_MAC_SEL_MODE_LOWEST = 1,
35 };
36 
37 struct cfa_p4_prof_key_cfg {
38 	uint8_t mac_sel[CFA_P4_PROF_MAX_KEYS];
39 #define CFA_P4_PROF_MAC_SEL_DMAC0 (1 << 0)
40 #define CFA_P4_PROF_MAC_SEL_T_MAC0 (1 << 1)
41 #define CFA_P4_PROF_MAC_SEL_OUTERMOST_MAC0 (1 << 2)
42 #define CFA_P4_PROF_MAC_SEL_DMAC1 (1 << 3)
43 #define CFA_P4_PROF_MAC_SEL_T_MAC1 (1 << 4)
44 #define CFA_P4_PROF_MAC_OUTERMOST_MAC1 (1 << 5)
45 	uint8_t pass_cnt;
46 	enum cfa_p4_mac_sel_mode mode;
47 };
48 
49 /**
50  * CFA action layout definition
51  */
52 
53 #define CFA_P4_ACTION_MAX_LAYOUT_SIZE 184
54 
55 /**
56  * Action object template structure
57  *
58  * Template structure presents data fields that are necessary to know
59  * at the beginning of Action Builder (AB) processing. Like before the
60  * AB compilation. One such example could be a template that is
61  * flexible in size (Encap Record) and the presence of these fields
62  * allows for determining the template size as well as where the
63  * fields are located in the record.
64  *
65  * The template may also present fields that are not made visible to
66  * the caller by way of the action fields.
67  *
68  * Template fields also allow for additional checking on user visible
69  * fields. One such example could be the encap pointer behavior on a
70  * CFA_P4_ACT_OBJ_TYPE_ACT or CFA_P4_ACT_OBJ_TYPE_ACT_SRAM.
71  */
72 struct cfa_p4_action_template {
73 	/** Action Object type
74 	 *
75 	 * Controls the type of the Action Template
76 	 */
77 	enum {
78 		/** Select this type to build an Action Record Object
79 		 */
80 		CFA_P4_ACT_OBJ_TYPE_ACT,
81 		/** Select this type to build an Action Statistics
82 		 * Object
83 		 */
84 		CFA_P4_ACT_OBJ_TYPE_STAT,
85 		/** Select this type to build a SRAM Action Record
86 		 * Object.
87 		 */
88 		CFA_P4_ACT_OBJ_TYPE_ACT_SRAM,
89 		/** Select this type to build a SRAM Action
90 		 * Encapsulation Object.
91 		 */
92 		CFA_P4_ACT_OBJ_TYPE_ENCAP_SRAM,
93 		/** Select this type to build a SRAM Action Modify
94 		 * Object, with IPv4 capability.
95 		 */
96 		/* In case of Stingray the term Modify is used for the 'NAT
97 		 * action'. Action builder is leveraged to fill in the NAT
98 		 * object which then can be referenced by the action
99 		 * record.
100 		 */
101 		CFA_P4_ACT_OBJ_TYPE_MODIFY_IPV4_SRAM,
102 		/** Select this type to build a SRAM Action Source
103 		 * Property Object.
104 		 */
105 		/* In case of Stingray this is not a 'pure' action record.
106 		 * Action builder is leveraged to full in the Source Property
107 		 * object which can then be referenced by the action
108 		 * record.
109 		 */
110 		CFA_P4_ACT_OBJ_TYPE_SRC_PROP_SRAM,
111 		/** Select this type to build a SRAM Action Statistics
112 		 * Object
113 		 */
114 		CFA_P4_ACT_OBJ_TYPE_STAT_SRAM,
115 	} obj_type;
116 
117 	/** Action Control
118 	 *
119 	 * Controls the internals of the Action Template
120 	 *
121 	 * act is valid when:
122 	 * (obj_type == CFA_P4_ACT_OBJ_TYPE_ACT)
123 	 */
124 	/*
125 	 * Stat and encap are always inline for EEM as table scope
126 	 * allocation does not allow for separate Stats allocation,
127 	 * but has the xx_inline flags as to be forward compatible
128 	 * with Stingray 2, always treated as TRUE.
129 	 */
130 	struct {
131 		/** Set to CFA_HCAPI_TRUE to enable statistics
132 		 */
133 		uint8_t stat_enable;
134 		/** Set to CFA_HCAPI_TRUE to enable statistics to be inlined
135 		 */
136 		uint8_t stat_inline;
137 
138 		/** Set to CFA_HCAPI_TRUE to enable encapsulation
139 		 */
140 		uint8_t encap_enable;
141 		/** Set to CFA_HCAPI_TRUE to enable encapsulation to be inlined
142 		 */
143 		uint8_t encap_inline;
144 	} act;
145 
146 	/** Modify Setting
147 	 *
148 	 * Controls the type of the Modify Action the template is
149 	 * describing
150 	 *
151 	 * modify is valid when:
152 	 * (obj_type == CFA_P4_ACT_OBJ_TYPE_MODIFY_SRAM)
153 	 */
154 	enum {
155 		/** Set to enable Modify of Source IPv4 Address
156 		 */
157 		CFA_P4_MR_REPLACE_SOURCE_IPV4 = 0,
158 		/** Set to enable Modify of Destination IPv4 Address
159 		 */
160 		CFA_P4_MR_REPLACE_DEST_IPV4
161 	} modify;
162 
163 	/** Encap Control
164 	 * Controls the type of encapsulation the template is
165 	 * describing
166 	 *
167 	 * encap is valid when:
168 	 * ((obj_type == CFA_P4_ACT_OBJ_TYPE_ACT) &&
169 	 *   act.encap_enable) ||
170 	 * ((obj_type == CFA_P4_ACT_OBJ_TYPE_SRC_PROP_SRAM)
171 	 */
172 	struct {
173 		/* Direction is required as Stingray Encap on RX is
174 		 * limited to l2 and VTAG only.
175 		 */
176 		/** Receive or Transmit direction
177 		 */
178 		uint8_t direction;
179 		/** Set to CFA_HCAPI_TRUE to enable L2 capability in the
180 		 *  template
181 		 */
182 		uint8_t l2_enable;
183 		/** vtag controls the Encap Vector - VTAG Encoding, 4 bits
184 		 *
185 		 * <ul>
186 		 * <li> CFA_P4_ACT_ENCAP_VTAGS_PUSH_0, default, no VLAN
187 		 *      Tags applied
188 		 * <li> CFA_P4_ACT_ENCAP_VTAGS_PUSH_1, adds capability to
189 		 *      set 1 VLAN Tag. Action Template compile adds
190 		 *      the following field to the action object
191 		 *      ::TF_ER_VLAN1
192 		 * <li> CFA_P4_ACT_ENCAP_VTAGS_PUSH_2, adds capability to
193 		 *      set 2 VLAN Tags. Action Template compile adds
194 		 *      the following fields to the action object
195 		 *      ::TF_ER_VLAN1 and ::TF_ER_VLAN2
196 		 * </ul>
197 		 */
198 		enum { CFA_P4_ACT_ENCAP_VTAGS_PUSH_0 = 0,
199 		       CFA_P4_ACT_ENCAP_VTAGS_PUSH_1,
200 		       CFA_P4_ACT_ENCAP_VTAGS_PUSH_2 } vtag;
201 
202 		/*
203 		 * The remaining fields are NOT supported when
204 		 * direction is RX and ((obj_type ==
205 		 * CFA_P4_ACT_OBJ_TYPE_ACT) && act.encap_enable).
206 		 * ab_compile_layout will perform the checking and
207 		 * skip remaining fields.
208 		 */
209 		/** L3 Encap controls the Encap Vector - L3 Encoding,
210 		 *  3 bits. Defines the type of L3 Encapsulation the
211 		 *  template is describing.
212 		 * <ul>
213 		 * <li> CFA_P4_ACT_ENCAP_L3_NONE, default, no L3
214 		 *      Encapsulation processing.
215 		 * <li> CFA_P4_ACT_ENCAP_L3_IPV4, enables L3 IPv4
216 		 *      Encapsulation.
217 		 * <li> CFA_P4_ACT_ENCAP_L3_IPV6, enables L3 IPv6
218 		 *      Encapsulation.
219 		 * <li> CFA_P4_ACT_ENCAP_L3_MPLS_8847, enables L3 MPLS
220 		 *      8847 Encapsulation.
221 		 * <li> CFA_P4_ACT_ENCAP_L3_MPLS_8848, enables L3 MPLS
222 		 *      8848 Encapsulation.
223 		 * </ul>
224 		 */
225 		enum {
226 			/** Set to disable any L3 encapsulation
227 			 * processing, default
228 			 */
229 			CFA_P4_ACT_ENCAP_L3_NONE = 0,
230 			/** Set to enable L3 IPv4 encapsulation
231 			 */
232 			CFA_P4_ACT_ENCAP_L3_IPV4 = 4,
233 			/** Set to enable L3 IPv6 encapsulation
234 			 */
235 			CFA_P4_ACT_ENCAP_L3_IPV6 = 5,
236 			/** Set to enable L3 MPLS 8847 encapsulation
237 			 */
238 			CFA_P4_ACT_ENCAP_L3_MPLS_8847 = 6,
239 			/** Set to enable L3 MPLS 8848 encapsulation
240 			 */
241 			CFA_P4_ACT_ENCAP_L3_MPLS_8848 = 7
242 		} l3;
243 
244 #define CFA_P4_ACT_ENCAP_MAX_MPLS_LABELS 8
245 		/** 1-8 labels, valid when
246 		 * (l3 == CFA_P4_ACT_ENCAP_L3_MPLS_8847) ||
247 		 * (l3 == CFA_P4_ACT_ENCAP_L3_MPLS_8848)
248 		 *
249 		 * MAX number of MPLS Labels 8.
250 		 */
251 		uint8_t l3_num_mpls_labels;
252 
253 		/** Set to CFA_HCAPI_TRUE to enable L4 capability in the
254 		 * template.
255 		 *
256 		 * CFA_HCAPI_TRUE adds ::TF_EN_UDP_SRC_PORT and
257 		 * ::TF_EN_UDP_DST_PORT to the template.
258 		 */
259 		uint8_t l4_enable;
260 
261 		/** Tunnel Encap controls the Encap Vector - Tunnel
262 		 *  Encap, 3 bits. Defines the type of Tunnel
263 		 *  encapsulation the template is describing
264 		 * <ul>
265 		 * <li> CFA_P4_ACT_ENCAP_TNL_NONE, default, no Tunnel
266 		 *      Encapsulation processing.
267 		 * <li> CFA_P4_ACT_ENCAP_TNL_GENERIC_FULL
268 		 * <li> CFA_P4_ACT_ENCAP_TNL_VXLAN. NOTE: Expects
269 		 *      l4_enable set to CFA_P4_TRUE;
270 		 * <li> CFA_P4_ACT_ENCAP_TNL_NGE. NOTE: Expects l4_enable
271 		 *      set to CFA_P4_TRUE;
272 		 * <li> CFA_P4_ACT_ENCAP_TNL_NVGRE. NOTE: only valid if
273 		 *      l4_enable set to CFA_HCAPI_FALSE.
274 		 * <li> CFA_P4_ACT_ENCAP_TNL_GRE.NOTE: only valid if
275 		 *      l4_enable set to CFA_HCAPI_FALSE.
276 		 * <li> CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TL4
277 		 * <li> CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TNL
278 		 * </ul>
279 		 */
280 		enum {
281 			/** Set to disable Tunnel header encapsulation
282 			 * processing, default
283 			 */
284 			CFA_P4_ACT_ENCAP_TNL_NONE = 0,
285 			/** Set to enable Tunnel Generic Full header
286 			 * encapsulation
287 			 */
288 			CFA_P4_ACT_ENCAP_TNL_GENERIC_FULL,
289 			/** Set to enable VXLAN header encapsulation
290 			 */
291 			CFA_P4_ACT_ENCAP_TNL_VXLAN,
292 			/** Set to enable NGE (VXLAN2) header encapsulation
293 			 */
294 			CFA_P4_ACT_ENCAP_TNL_NGE,
295 			/** Set to enable NVGRE header encapsulation
296 			 */
297 			CFA_P4_ACT_ENCAP_TNL_NVGRE,
298 			/** Set to enable GRE header encapsulation
299 			 */
300 			CFA_P4_ACT_ENCAP_TNL_GRE,
301 			/** Set to enable Generic header after Tunnel
302 			 * L4 encapsulation
303 			 */
304 			CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TL4,
305 			/** Set to enable Generic header after Tunnel
306 			 * encapsulation
307 			 */
308 			CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TNL
309 		} tnl;
310 
311 		/** Number of bytes of generic tunnel header,
312 		 * valid when
313 		 * (tnl == CFA_P4_ACT_ENCAP_TNL_GENERIC_FULL) ||
314 		 * (tnl == CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TL4) ||
315 		 * (tnl == CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TNL)
316 		 */
317 		uint8_t tnl_generic_size;
318 		/** Number of 32b words of nge options,
319 		 * valid when
320 		 * (tnl == CFA_P4_ACT_ENCAP_TNL_NGE)
321 		 */
322 		uint8_t tnl_nge_op_len;
323 		/* Currently not planned */
324 		/* Custom Header */
325 		/*	uint8_t custom_enable; */
326 	} encap;
327 };
328 
329 /**
330  * Enumeration of SRAM entry types, used for allocation of
331  * fixed SRAM entities. The memory model for CFA HCAPI
332  * determines if an SRAM entry type is supported.
333  */
334 enum cfa_p4_action_sram_entry_type {
335 	/* NOTE: Any additions to this enum must be reflected on FW
336 	 * side as well.
337 	 */
338 
339 	/** SRAM Action Record */
340 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_FULL_ACTION,
341 
342 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_0_ACTION,
343 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_1_ACTION,
344 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_2_ACTION,
345 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_3_ACTION,
346 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_4_ACTION,
347 
348 	/** SRAM Action Encap 8 Bytes */
349 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_ENCAP_8B,
350 	/** SRAM Action Encap 16 Bytes */
351 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_ENCAP_16B,
352 	/** SRAM Action Encap 64 Bytes */
353 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_ENCAP_64B,
354 
355 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_MODIFY_PORT_SRC,
356 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_MODIFY_PORT_DEST,
357 
358 	/** SRAM Action Modify IPv4 Source */
359 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_MODIFY_IPV4_SRC,
360 	/** SRAM Action Modify IPv4 Destination */
361 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_MODIFY_IPV4_DEST,
362 
363 	/** SRAM Action Source Properties SMAC */
364 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_SP_SMAC,
365 	/** SRAM Action Source Properties SMAC IPv4 */
366 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_SP_SMAC_IPV4,
367 	/** SRAM Action Source Properties SMAC IPv6 */
368 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_SP_SMAC_IPV6,
369 	/** SRAM Action Statistics 64 Bits */
370 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_STATS_64,
371 	CFA_P4_ACTION_SRAM_ENTRY_TYPE_MAX
372 };
373 
374 /**
375  * SRAM Action Record structure holding either an action index or an
376  * action ptr.
377  */
378 union cfa_p4_action_sram_act_record {
379 	/** SRAM Action idx specifies the offset of the SRAM
380 	 * element within its SRAM Entry Type block. This
381 	 * index can be written into i.e. an L2 Context. Use
382 	 * this type for all SRAM Action Record types except
383 	 * SRAM Full Action records. Use act_ptr instead.
384 	 */
385 	uint16_t act_idx;
386 	/** SRAM Full Action is special in that it needs an
387 	 * action record pointer. This pointer can be written
388 	 * into i.e. a Wildcard TCAM entry.
389 	 */
390 	uint32_t act_ptr;
391 };
392 
393 /**
394  * cfa_p4_action_param parameter definition
395  */
396 struct cfa_p4_action_param {
397 	/**
398 	 * [in] receive or transmit direction
399 	 */
400 	uint8_t dir;
401 	/**
402 	 * [in] type of the sram allocation type
403 	 */
404 	enum cfa_p4_action_sram_entry_type type;
405 	/**
406 	 * [in] action record to set. The 'type' specified lists the
407 	 *	record definition to use in the passed in record.
408 	 */
409 	union cfa_p4_action_sram_act_record record;
410 	/**
411 	 * [in] number of elements in act_data
412 	 */
413 	uint32_t act_size;
414 	/**
415 	 * [in] ptr to array of action data
416 	 */
417 	uint64_t *act_data;
418 };
419 
420 /**
421  * EEM Key entry sizes
422  */
423 #define CFA_P4_EEM_KEY_MAX_SIZE 52
424 #define CFA_P4_EEM_KEY_RECORD_SIZE 64
425 
426 /**
427  * cfa_eem_entry_hdr
428  */
429 struct cfa_p4_eem_entry_hdr {
430 	uint32_t pointer;
431 	uint32_t word1;  /*
432 			  * The header is made up of two words,
433 			  * this is the first word. This field has multiple
434 			  * subfields, there is no suitable single name for
435 			  * it so just going with word1.
436 			  */
437 #define CFA_P4_EEM_ENTRY_VALID_SHIFT 31
438 #define CFA_P4_EEM_ENTRY_VALID_MASK 0x80000000
439 #define CFA_P4_EEM_ENTRY_L1_CACHEABLE_SHIFT 30
440 #define CFA_P4_EEM_ENTRY_L1_CACHEABLE_MASK 0x40000000
441 #define CFA_P4_EEM_ENTRY_STRENGTH_SHIFT 28
442 #define CFA_P4_EEM_ENTRY_STRENGTH_MASK 0x30000000
443 #define CFA_P4_EEM_ENTRY_RESERVED_SHIFT 17
444 #define CFA_P4_EEM_ENTRY_RESERVED_MASK 0x0FFE0000
445 #define CFA_P4_EEM_ENTRY_KEY_SIZE_SHIFT 8
446 #define CFA_P4_EEM_ENTRY_KEY_SIZE_MASK 0x0001FF00
447 #define CFA_P4_EEM_ENTRY_ACT_REC_SIZE_SHIFT 3
448 #define CFA_P4_EEM_ENTRY_ACT_REC_SIZE_MASK 0x000000F8
449 #define CFA_P4_EEM_ENTRY_ACT_REC_INT_SHIFT 2
450 #define CFA_P4_EEM_ENTRY_ACT_REC_INT_MASK 0x00000004
451 #define CFA_P4_EEM_ENTRY_EXT_FLOW_CTR_SHIFT 1
452 #define CFA_P4_EEM_ENTRY_EXT_FLOW_CTR_MASK 0x00000002
453 #define CFA_P4_EEM_ENTRY_ACT_PTR_MSB_SHIFT 0
454 #define CFA_P4_EEM_ENTRY_ACT_PTR_MSB_MASK 0x00000001
455 };
456 
457 /**
458  *  cfa_p4_eem_key_entry
459  */
460 struct cfa_p4_eem_64b_entry {
461 	/** Key is 448 bits - 56 bytes */
462 	uint8_t key[CFA_P4_EEM_KEY_RECORD_SIZE - sizeof(struct cfa_p4_eem_entry_hdr)];
463 	/** Header is 8 bytes long */
464 	struct cfa_p4_eem_entry_hdr hdr;
465 };
466 
467 #endif /* _CFA_HW_P4_H_ */
468