| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | aarch64-neon-vcmla.c | 13 float16x4_t test_vcmla_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { in test_vcmla_f16()
20 float32x2_t test_vcmla_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { in test_vcmla_f32()
27 float16x8_t test_vcmlaq_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { in test_vcmlaq_f16()
34 float32x4_t test_vcmlaq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { in test_vcmlaq_f32()
41 float64x2_t test_vcmlaq_f64(float64x2_t acc, float64x2_t lhs, float64x2_t rhs) { in test_vcmlaq_f64()
48 float16x4_t test_vcmla_rot90_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { in test_vcmla_rot90_f16()
55 float32x2_t test_vcmla_rot90_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { in test_vcmla_rot90_f32()
62 float16x8_t test_vcmlaq_rot90_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { in test_vcmlaq_rot90_f16()
69 float32x4_t test_vcmlaq_rot90_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { in test_vcmlaq_rot90_f32()
76 float64x2_t test_vcmlaq_rot90_f64(float64x2_t acc, float64x2_t lhs, float64x2_t rhs) { in test_vcmlaq_rot90_f64()
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| H A D | arm-cde-gpr.c | 25 uint32_t test_cx1a(uint32_t acc) { in test_cx1a()
58 uint64_t test_cx1da(uint64_t acc) { in test_cx1da()
76 uint32_t test_cx2a(uint32_t acc, uint32_t n) { in test_cx2a()
109 uint64_t test_cx2da(uint64_t acc, uint32_t n) { in test_cx2da()
127 uint32_t test_cx3a(uint32_t acc, uint32_t n, uint32_t m) { in test_cx3a()
160 uint64_t test_cx3da(uint64_t acc, uint32_t n, uint32_t m) { in test_cx3da()
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| H A D | arm-cde-vfp.c | 28 uint32_t test_vcx1a_u32(uint32_t acc) { in test_vcx1a_u32()
51 uint32_t test_vcx2a_u32(uint32_t acc, uint32_t n) { in test_vcx2a_u32()
76 uint32_t test_vcx3a_u32(uint32_t acc, uint32_t n, uint32_t m) { in test_vcx3a_u32()
97 uint64_t test_vcx1da_u64(uint64_t acc) { in test_vcx1da_u64()
120 uint64_t test_vcx2da_u64(uint64_t acc, uint64_t n) { in test_vcx2da_u64()
145 uint64_t test_vcx3da_u64(uint64_t acc, uint64_t n, uint64_t m) { in test_vcx3da_u64()
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| /llvm-project-15.0.7/clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/ |
| H A D | vwmacc.c | 12 vint16mf4_t test_vwmacc_vv_i16mf4(vint16mf4_t acc, vint8mf8_t op1, in test_vwmacc_vv_i16mf4()
32 vint16mf2_t test_vwmacc_vv_i16mf2(vint16mf2_t acc, vint8mf4_t op1, in test_vwmacc_vv_i16mf2()
152 vint32m1_t test_vwmacc_vv_i32m1(vint32m1_t acc, vint16mf2_t op1, in test_vwmacc_vv_i32m1()
232 vint64m1_t test_vwmacc_vv_i64m1(vint64m1_t acc, vint32mf2_t op1, in test_vwmacc_vv_i64m1()
462 vuint32m1_t test_vwmaccu_vx_u32m1(vuint32m1_t acc, uint16_t op1, in test_vwmaccu_vx_u32m1()
482 vuint32m2_t test_vwmaccu_vx_u32m2(vuint32m2_t acc, uint16_t op1, in test_vwmaccu_vx_u32m2()
502 vuint32m4_t test_vwmaccu_vx_u32m4(vuint32m4_t acc, uint16_t op1, in test_vwmaccu_vx_u32m4()
522 vuint32m8_t test_vwmaccu_vx_u32m8(vuint32m8_t acc, uint16_t op1, in test_vwmaccu_vx_u32m8()
542 vuint64m1_t test_vwmaccu_vx_u64m1(vuint64m1_t acc, uint32_t op1, in test_vwmaccu_vx_u64m1()
562 vuint64m2_t test_vwmaccu_vx_u64m2(vuint64m2_t acc, uint32_t op1, in test_vwmaccu_vx_u64m2()
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| H A D | vnmsac.c | 12 vint8mf8_t test_vnmsac_vv_i8mf8(vint8mf8_t acc, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vnmsac_vv_i8mf8()
21 vint8mf8_t test_vnmsac_vx_i8mf8(vint8mf8_t acc, int8_t op1, vint8mf8_t op2, size_t vl) { in test_vnmsac_vx_i8mf8()
39 vint8mf4_t test_vnmsac_vx_i8mf4(vint8mf4_t acc, int8_t op1, vint8mf4_t op2, size_t vl) { in test_vnmsac_vx_i8mf4()
57 vint8mf2_t test_vnmsac_vx_i8mf2(vint8mf2_t acc, int8_t op1, vint8mf2_t op2, size_t vl) { in test_vnmsac_vx_i8mf2()
66 vint8m1_t test_vnmsac_vv_i8m1(vint8m1_t acc, vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vnmsac_vv_i8m1()
75 vint8m1_t test_vnmsac_vx_i8m1(vint8m1_t acc, int8_t op1, vint8m1_t op2, size_t vl) { in test_vnmsac_vx_i8m1()
84 vint8m2_t test_vnmsac_vv_i8m2(vint8m2_t acc, vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vnmsac_vv_i8m2()
93 vint8m2_t test_vnmsac_vx_i8m2(vint8m2_t acc, int8_t op1, vint8m2_t op2, size_t vl) { in test_vnmsac_vx_i8m2()
102 vint8m4_t test_vnmsac_vv_i8m4(vint8m4_t acc, vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vnmsac_vv_i8m4()
111 vint8m4_t test_vnmsac_vx_i8m4(vint8m4_t acc, int8_t op1, vint8m4_t op2, size_t vl) { in test_vnmsac_vx_i8m4()
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| H A D | vnmsub.c | 12 vint8mf8_t test_vnmsub_vv_i8mf8(vint8mf8_t acc, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vnmsub_vv_i8mf8()
21 vint8mf8_t test_vnmsub_vx_i8mf8(vint8mf8_t acc, int8_t op1, vint8mf8_t op2, size_t vl) { in test_vnmsub_vx_i8mf8()
39 vint8mf4_t test_vnmsub_vx_i8mf4(vint8mf4_t acc, int8_t op1, vint8mf4_t op2, size_t vl) { in test_vnmsub_vx_i8mf4()
57 vint8mf2_t test_vnmsub_vx_i8mf2(vint8mf2_t acc, int8_t op1, vint8mf2_t op2, size_t vl) { in test_vnmsub_vx_i8mf2()
66 vint8m1_t test_vnmsub_vv_i8m1(vint8m1_t acc, vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vnmsub_vv_i8m1()
75 vint8m1_t test_vnmsub_vx_i8m1(vint8m1_t acc, int8_t op1, vint8m1_t op2, size_t vl) { in test_vnmsub_vx_i8m1()
84 vint8m2_t test_vnmsub_vv_i8m2(vint8m2_t acc, vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vnmsub_vv_i8m2()
93 vint8m2_t test_vnmsub_vx_i8m2(vint8m2_t acc, int8_t op1, vint8m2_t op2, size_t vl) { in test_vnmsub_vx_i8m2()
102 vint8m4_t test_vnmsub_vv_i8m4(vint8m4_t acc, vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vnmsub_vv_i8m4()
111 vint8m4_t test_vnmsub_vx_i8m4(vint8m4_t acc, int8_t op1, vint8m4_t op2, size_t vl) { in test_vnmsub_vx_i8m4()
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| H A D | vmacc.c | 12 vint8mf8_t test_vmacc_vv_i8mf8(vint8mf8_t acc, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmacc_vv_i8mf8()
21 vint8mf8_t test_vmacc_vx_i8mf8(vint8mf8_t acc, int8_t op1, vint8mf8_t op2, size_t vl) { in test_vmacc_vx_i8mf8()
39 vint8mf4_t test_vmacc_vx_i8mf4(vint8mf4_t acc, int8_t op1, vint8mf4_t op2, size_t vl) { in test_vmacc_vx_i8mf4()
57 vint8mf2_t test_vmacc_vx_i8mf2(vint8mf2_t acc, int8_t op1, vint8mf2_t op2, size_t vl) { in test_vmacc_vx_i8mf2()
66 vint8m1_t test_vmacc_vv_i8m1(vint8m1_t acc, vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmacc_vv_i8m1()
75 vint8m1_t test_vmacc_vx_i8m1(vint8m1_t acc, int8_t op1, vint8m1_t op2, size_t vl) { in test_vmacc_vx_i8m1()
84 vint8m2_t test_vmacc_vv_i8m2(vint8m2_t acc, vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmacc_vv_i8m2()
93 vint8m2_t test_vmacc_vx_i8m2(vint8m2_t acc, int8_t op1, vint8m2_t op2, size_t vl) { in test_vmacc_vx_i8m2()
102 vint8m4_t test_vmacc_vv_i8m4(vint8m4_t acc, vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmacc_vv_i8m4()
111 vint8m4_t test_vmacc_vx_i8m4(vint8m4_t acc, int8_t op1, vint8m4_t op2, size_t vl) { in test_vmacc_vx_i8m4()
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| H A D | vmadd.c | 12 vint8mf8_t test_vmadd_vv_i8mf8(vint8mf8_t acc, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmadd_vv_i8mf8()
21 vint8mf8_t test_vmadd_vx_i8mf8(vint8mf8_t acc, int8_t op1, vint8mf8_t op2, size_t vl) { in test_vmadd_vx_i8mf8()
39 vint8mf4_t test_vmadd_vx_i8mf4(vint8mf4_t acc, int8_t op1, vint8mf4_t op2, size_t vl) { in test_vmadd_vx_i8mf4()
57 vint8mf2_t test_vmadd_vx_i8mf2(vint8mf2_t acc, int8_t op1, vint8mf2_t op2, size_t vl) { in test_vmadd_vx_i8mf2()
66 vint8m1_t test_vmadd_vv_i8m1(vint8m1_t acc, vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmadd_vv_i8m1()
75 vint8m1_t test_vmadd_vx_i8m1(vint8m1_t acc, int8_t op1, vint8m1_t op2, size_t vl) { in test_vmadd_vx_i8m1()
84 vint8m2_t test_vmadd_vv_i8m2(vint8m2_t acc, vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmadd_vv_i8m2()
93 vint8m2_t test_vmadd_vx_i8m2(vint8m2_t acc, int8_t op1, vint8m2_t op2, size_t vl) { in test_vmadd_vx_i8m2()
102 vint8m4_t test_vmadd_vv_i8m4(vint8m4_t acc, vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmadd_vv_i8m4()
111 vint8m4_t test_vmadd_vx_i8m4(vint8m4_t acc, int8_t op1, vint8m4_t op2, size_t vl) { in test_vmadd_vx_i8m4()
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| H A D | vfmadd.c | 13 vfloat32mf2_t test_vfmadd_vv_f32mf2(vfloat32mf2_t acc, vfloat32mf2_t op1, in test_vfmadd_vv_f32mf2()
23 vfloat32mf2_t test_vfmadd_vf_f32mf2(vfloat32mf2_t acc, float op1, in test_vfmadd_vf_f32mf2()
33 vfloat32m1_t test_vfmadd_vv_f32m1(vfloat32m1_t acc, vfloat32m1_t op1, in test_vfmadd_vv_f32m1()
53 vfloat32m2_t test_vfmadd_vv_f32m2(vfloat32m2_t acc, vfloat32m2_t op1, in test_vfmadd_vv_f32m2()
73 vfloat32m4_t test_vfmadd_vv_f32m4(vfloat32m4_t acc, vfloat32m4_t op1, in test_vfmadd_vv_f32m4()
93 vfloat32m8_t test_vfmadd_vv_f32m8(vfloat32m8_t acc, vfloat32m8_t op1, in test_vfmadd_vv_f32m8()
113 vfloat64m1_t test_vfmadd_vv_f64m1(vfloat64m1_t acc, vfloat64m1_t op1, in test_vfmadd_vv_f64m1()
123 vfloat64m1_t test_vfmadd_vf_f64m1(vfloat64m1_t acc, double op1, in test_vfmadd_vf_f64m1()
143 vfloat64m2_t test_vfmadd_vf_f64m2(vfloat64m2_t acc, double op1, in test_vfmadd_vf_f64m2()
163 vfloat64m4_t test_vfmadd_vf_f64m4(vfloat64m4_t acc, double op1, in test_vfmadd_vf_f64m4()
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| H A D | vfnmsub.c | 13 vfloat32mf2_t test_vfnmsub_vv_f32mf2(vfloat32mf2_t acc, vfloat32mf2_t op1, in test_vfnmsub_vv_f32mf2()
23 vfloat32mf2_t test_vfnmsub_vf_f32mf2(vfloat32mf2_t acc, float op1, in test_vfnmsub_vf_f32mf2()
33 vfloat32m1_t test_vfnmsub_vv_f32m1(vfloat32m1_t acc, vfloat32m1_t op1, in test_vfnmsub_vv_f32m1()
43 vfloat32m1_t test_vfnmsub_vf_f32m1(vfloat32m1_t acc, float op1, in test_vfnmsub_vf_f32m1()
63 vfloat32m2_t test_vfnmsub_vf_f32m2(vfloat32m2_t acc, float op1, in test_vfnmsub_vf_f32m2()
83 vfloat32m4_t test_vfnmsub_vf_f32m4(vfloat32m4_t acc, float op1, in test_vfnmsub_vf_f32m4()
103 vfloat32m8_t test_vfnmsub_vf_f32m8(vfloat32m8_t acc, float op1, in test_vfnmsub_vf_f32m8()
123 vfloat64m1_t test_vfnmsub_vf_f64m1(vfloat64m1_t acc, double op1, in test_vfnmsub_vf_f64m1()
143 vfloat64m2_t test_vfnmsub_vf_f64m2(vfloat64m2_t acc, double op1, in test_vfnmsub_vf_f64m2()
163 vfloat64m4_t test_vfnmsub_vf_f64m4(vfloat64m4_t acc, double op1, in test_vfnmsub_vf_f64m4()
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| H A D | vfnmadd.c | 13 vfloat32mf2_t test_vfnmadd_vv_f32mf2(vfloat32mf2_t acc, vfloat32mf2_t op1, in test_vfnmadd_vv_f32mf2()
23 vfloat32mf2_t test_vfnmadd_vf_f32mf2(vfloat32mf2_t acc, float op1, in test_vfnmadd_vf_f32mf2()
33 vfloat32m1_t test_vfnmadd_vv_f32m1(vfloat32m1_t acc, vfloat32m1_t op1, in test_vfnmadd_vv_f32m1()
43 vfloat32m1_t test_vfnmadd_vf_f32m1(vfloat32m1_t acc, float op1, in test_vfnmadd_vf_f32m1()
63 vfloat32m2_t test_vfnmadd_vf_f32m2(vfloat32m2_t acc, float op1, in test_vfnmadd_vf_f32m2()
83 vfloat32m4_t test_vfnmadd_vf_f32m4(vfloat32m4_t acc, float op1, in test_vfnmadd_vf_f32m4()
103 vfloat32m8_t test_vfnmadd_vf_f32m8(vfloat32m8_t acc, float op1, in test_vfnmadd_vf_f32m8()
123 vfloat64m1_t test_vfnmadd_vf_f64m1(vfloat64m1_t acc, double op1, in test_vfnmadd_vf_f64m1()
143 vfloat64m2_t test_vfnmadd_vf_f64m2(vfloat64m2_t acc, double op1, in test_vfnmadd_vf_f64m2()
163 vfloat64m4_t test_vfnmadd_vf_f64m4(vfloat64m4_t acc, double op1, in test_vfnmadd_vf_f64m4()
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| H A D | vfnmsac.c | 13 vfloat32mf2_t test_vfnmsac_vv_f32mf2(vfloat32mf2_t acc, vfloat32mf2_t op1, in test_vfnmsac_vv_f32mf2()
23 vfloat32mf2_t test_vfnmsac_vf_f32mf2(vfloat32mf2_t acc, float op1, in test_vfnmsac_vf_f32mf2()
33 vfloat32m1_t test_vfnmsac_vv_f32m1(vfloat32m1_t acc, vfloat32m1_t op1, in test_vfnmsac_vv_f32m1()
43 vfloat32m1_t test_vfnmsac_vf_f32m1(vfloat32m1_t acc, float op1, in test_vfnmsac_vf_f32m1()
63 vfloat32m2_t test_vfnmsac_vf_f32m2(vfloat32m2_t acc, float op1, in test_vfnmsac_vf_f32m2()
83 vfloat32m4_t test_vfnmsac_vf_f32m4(vfloat32m4_t acc, float op1, in test_vfnmsac_vf_f32m4()
103 vfloat32m8_t test_vfnmsac_vf_f32m8(vfloat32m8_t acc, float op1, in test_vfnmsac_vf_f32m8()
123 vfloat64m1_t test_vfnmsac_vf_f64m1(vfloat64m1_t acc, double op1, in test_vfnmsac_vf_f64m1()
143 vfloat64m2_t test_vfnmsac_vf_f64m2(vfloat64m2_t acc, double op1, in test_vfnmsac_vf_f64m2()
163 vfloat64m4_t test_vfnmsac_vf_f64m4(vfloat64m4_t acc, double op1, in test_vfnmsac_vf_f64m4()
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| H A D | vfnmacc.c | 13 vfloat32mf2_t test_vfnmacc_vv_f32mf2(vfloat32mf2_t acc, vfloat32mf2_t op1, in test_vfnmacc_vv_f32mf2()
23 vfloat32mf2_t test_vfnmacc_vf_f32mf2(vfloat32mf2_t acc, float op1, in test_vfnmacc_vf_f32mf2()
33 vfloat32m1_t test_vfnmacc_vv_f32m1(vfloat32m1_t acc, vfloat32m1_t op1, in test_vfnmacc_vv_f32m1()
43 vfloat32m1_t test_vfnmacc_vf_f32m1(vfloat32m1_t acc, float op1, in test_vfnmacc_vf_f32m1()
63 vfloat32m2_t test_vfnmacc_vf_f32m2(vfloat32m2_t acc, float op1, in test_vfnmacc_vf_f32m2()
83 vfloat32m4_t test_vfnmacc_vf_f32m4(vfloat32m4_t acc, float op1, in test_vfnmacc_vf_f32m4()
103 vfloat32m8_t test_vfnmacc_vf_f32m8(vfloat32m8_t acc, float op1, in test_vfnmacc_vf_f32m8()
123 vfloat64m1_t test_vfnmacc_vf_f64m1(vfloat64m1_t acc, double op1, in test_vfnmacc_vf_f64m1()
143 vfloat64m2_t test_vfnmacc_vf_f64m2(vfloat64m2_t acc, double op1, in test_vfnmacc_vf_f64m2()
163 vfloat64m4_t test_vfnmacc_vf_f64m4(vfloat64m4_t acc, double op1, in test_vfnmacc_vf_f64m4()
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| H A D | vfmsac.c | 13 vfloat32mf2_t test_vfmsac_vv_f32mf2(vfloat32mf2_t acc, vfloat32mf2_t op1, in test_vfmsac_vv_f32mf2()
23 vfloat32mf2_t test_vfmsac_vf_f32mf2(vfloat32mf2_t acc, float op1, in test_vfmsac_vf_f32mf2()
33 vfloat32m1_t test_vfmsac_vv_f32m1(vfloat32m1_t acc, vfloat32m1_t op1, in test_vfmsac_vv_f32m1()
53 vfloat32m2_t test_vfmsac_vv_f32m2(vfloat32m2_t acc, vfloat32m2_t op1, in test_vfmsac_vv_f32m2()
73 vfloat32m4_t test_vfmsac_vv_f32m4(vfloat32m4_t acc, vfloat32m4_t op1, in test_vfmsac_vv_f32m4()
93 vfloat32m8_t test_vfmsac_vv_f32m8(vfloat32m8_t acc, vfloat32m8_t op1, in test_vfmsac_vv_f32m8()
113 vfloat64m1_t test_vfmsac_vv_f64m1(vfloat64m1_t acc, vfloat64m1_t op1, in test_vfmsac_vv_f64m1()
123 vfloat64m1_t test_vfmsac_vf_f64m1(vfloat64m1_t acc, double op1, in test_vfmsac_vf_f64m1()
143 vfloat64m2_t test_vfmsac_vf_f64m2(vfloat64m2_t acc, double op1, in test_vfmsac_vf_f64m2()
163 vfloat64m4_t test_vfmsac_vf_f64m4(vfloat64m4_t acc, double op1, in test_vfmsac_vf_f64m4()
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| H A D | vfmacc.c | 13 vfloat32mf2_t test_vfmacc_vv_f32mf2(vfloat32mf2_t acc, vfloat32mf2_t op1, in test_vfmacc_vv_f32mf2()
23 vfloat32mf2_t test_vfmacc_vf_f32mf2(vfloat32mf2_t acc, float op1, in test_vfmacc_vf_f32mf2()
33 vfloat32m1_t test_vfmacc_vv_f32m1(vfloat32m1_t acc, vfloat32m1_t op1, in test_vfmacc_vv_f32m1()
53 vfloat32m2_t test_vfmacc_vv_f32m2(vfloat32m2_t acc, vfloat32m2_t op1, in test_vfmacc_vv_f32m2()
73 vfloat32m4_t test_vfmacc_vv_f32m4(vfloat32m4_t acc, vfloat32m4_t op1, in test_vfmacc_vv_f32m4()
93 vfloat32m8_t test_vfmacc_vv_f32m8(vfloat32m8_t acc, vfloat32m8_t op1, in test_vfmacc_vv_f32m8()
113 vfloat64m1_t test_vfmacc_vv_f64m1(vfloat64m1_t acc, vfloat64m1_t op1, in test_vfmacc_vv_f64m1()
123 vfloat64m1_t test_vfmacc_vf_f64m1(vfloat64m1_t acc, double op1, in test_vfmacc_vf_f64m1()
143 vfloat64m2_t test_vfmacc_vf_f64m2(vfloat64m2_t acc, double op1, in test_vfmacc_vf_f64m2()
163 vfloat64m4_t test_vfmacc_vf_f64m4(vfloat64m4_t acc, double op1, in test_vfmacc_vf_f64m4()
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| H A D | vfmsub.c | 13 vfloat32mf2_t test_vfmsub_vv_f32mf2(vfloat32mf2_t acc, vfloat32mf2_t op1, in test_vfmsub_vv_f32mf2()
23 vfloat32mf2_t test_vfmsub_vf_f32mf2(vfloat32mf2_t acc, float op1, in test_vfmsub_vf_f32mf2()
33 vfloat32m1_t test_vfmsub_vv_f32m1(vfloat32m1_t acc, vfloat32m1_t op1, in test_vfmsub_vv_f32m1()
53 vfloat32m2_t test_vfmsub_vv_f32m2(vfloat32m2_t acc, vfloat32m2_t op1, in test_vfmsub_vv_f32m2()
73 vfloat32m4_t test_vfmsub_vv_f32m4(vfloat32m4_t acc, vfloat32m4_t op1, in test_vfmsub_vv_f32m4()
93 vfloat32m8_t test_vfmsub_vv_f32m8(vfloat32m8_t acc, vfloat32m8_t op1, in test_vfmsub_vv_f32m8()
113 vfloat64m1_t test_vfmsub_vv_f64m1(vfloat64m1_t acc, vfloat64m1_t op1, in test_vfmsub_vv_f64m1()
123 vfloat64m1_t test_vfmsub_vf_f64m1(vfloat64m1_t acc, double op1, in test_vfmsub_vf_f64m1()
143 vfloat64m2_t test_vfmsub_vf_f64m2(vfloat64m2_t acc, double op1, in test_vfmsub_vf_f64m2()
163 vfloat64m4_t test_vfmsub_vf_f64m4(vfloat64m4_t acc, double op1, in test_vfmsub_vf_f64m4()
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| H A D | vfwmacc.c | 13 vfloat64m1_t test_vfwmacc_vv_f64m1(vfloat64m1_t acc, vfloat32mf2_t op1, in test_vfwmacc_vv_f64m1()
23 vfloat64m1_t test_vfwmacc_vf_f64m1(vfloat64m1_t acc, float op1, in test_vfwmacc_vf_f64m1()
33 vfloat64m2_t test_vfwmacc_vv_f64m2(vfloat64m2_t acc, vfloat32m1_t op1, in test_vfwmacc_vv_f64m2()
43 vfloat64m2_t test_vfwmacc_vf_f64m2(vfloat64m2_t acc, float op1, in test_vfwmacc_vf_f64m2()
53 vfloat64m4_t test_vfwmacc_vv_f64m4(vfloat64m4_t acc, vfloat32m2_t op1, in test_vfwmacc_vv_f64m4()
63 vfloat64m4_t test_vfwmacc_vf_f64m4(vfloat64m4_t acc, float op1, in test_vfwmacc_vf_f64m4()
73 vfloat64m8_t test_vfwmacc_vv_f64m8(vfloat64m8_t acc, vfloat32m4_t op1, in test_vfwmacc_vv_f64m8()
83 vfloat64m8_t test_vfwmacc_vf_f64m8(vfloat64m8_t acc, float op1, in test_vfwmacc_vf_f64m8()
93 vfloat64m1_t test_vfwmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t acc, in test_vfwmacc_vv_f64m1_m()
104 vfloat64m1_t test_vfwmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t acc, in test_vfwmacc_vf_f64m1_m()
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| H A D | vfwmsac.c | 13 vfloat64m1_t test_vfwmsac_vv_f64m1(vfloat64m1_t acc, vfloat32mf2_t op1, in test_vfwmsac_vv_f64m1()
23 vfloat64m1_t test_vfwmsac_vf_f64m1(vfloat64m1_t acc, float op1, in test_vfwmsac_vf_f64m1()
33 vfloat64m2_t test_vfwmsac_vv_f64m2(vfloat64m2_t acc, vfloat32m1_t op1, in test_vfwmsac_vv_f64m2()
43 vfloat64m2_t test_vfwmsac_vf_f64m2(vfloat64m2_t acc, float op1, in test_vfwmsac_vf_f64m2()
53 vfloat64m4_t test_vfwmsac_vv_f64m4(vfloat64m4_t acc, vfloat32m2_t op1, in test_vfwmsac_vv_f64m4()
63 vfloat64m4_t test_vfwmsac_vf_f64m4(vfloat64m4_t acc, float op1, in test_vfwmsac_vf_f64m4()
73 vfloat64m8_t test_vfwmsac_vv_f64m8(vfloat64m8_t acc, vfloat32m4_t op1, in test_vfwmsac_vv_f64m8()
83 vfloat64m8_t test_vfwmsac_vf_f64m8(vfloat64m8_t acc, float op1, in test_vfwmsac_vf_f64m8()
93 vfloat64m1_t test_vfwmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t acc, in test_vfwmsac_vv_f64m1_m()
104 vfloat64m1_t test_vfwmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t acc, in test_vfwmsac_vf_f64m1_m()
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| H A D | vfwnmsac.c | 13 vfloat64m1_t test_vfwnmsac_vv_f64m1(vfloat64m1_t acc, vfloat32mf2_t op1, in test_vfwnmsac_vv_f64m1()
23 vfloat64m1_t test_vfwnmsac_vf_f64m1(vfloat64m1_t acc, float op1, in test_vfwnmsac_vf_f64m1()
33 vfloat64m2_t test_vfwnmsac_vv_f64m2(vfloat64m2_t acc, vfloat32m1_t op1, in test_vfwnmsac_vv_f64m2()
43 vfloat64m2_t test_vfwnmsac_vf_f64m2(vfloat64m2_t acc, float op1, in test_vfwnmsac_vf_f64m2()
53 vfloat64m4_t test_vfwnmsac_vv_f64m4(vfloat64m4_t acc, vfloat32m2_t op1, in test_vfwnmsac_vv_f64m4()
63 vfloat64m4_t test_vfwnmsac_vf_f64m4(vfloat64m4_t acc, float op1, in test_vfwnmsac_vf_f64m4()
73 vfloat64m8_t test_vfwnmsac_vv_f64m8(vfloat64m8_t acc, vfloat32m4_t op1, in test_vfwnmsac_vv_f64m8()
83 vfloat64m8_t test_vfwnmsac_vf_f64m8(vfloat64m8_t acc, float op1, in test_vfwnmsac_vf_f64m8()
93 vfloat64m1_t test_vfwnmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t acc, in test_vfwnmsac_vv_f64m1_m()
104 vfloat64m1_t test_vfwnmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t acc, in test_vfwnmsac_vf_f64m1_m()
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| H A D | vfwnmacc.c | 13 vfloat64m1_t test_vfwnmacc_vv_f64m1(vfloat64m1_t acc, vfloat32mf2_t op1, in test_vfwnmacc_vv_f64m1()
23 vfloat64m1_t test_vfwnmacc_vf_f64m1(vfloat64m1_t acc, float op1, in test_vfwnmacc_vf_f64m1()
33 vfloat64m2_t test_vfwnmacc_vv_f64m2(vfloat64m2_t acc, vfloat32m1_t op1, in test_vfwnmacc_vv_f64m2()
43 vfloat64m2_t test_vfwnmacc_vf_f64m2(vfloat64m2_t acc, float op1, in test_vfwnmacc_vf_f64m2()
53 vfloat64m4_t test_vfwnmacc_vv_f64m4(vfloat64m4_t acc, vfloat32m2_t op1, in test_vfwnmacc_vv_f64m4()
63 vfloat64m4_t test_vfwnmacc_vf_f64m4(vfloat64m4_t acc, float op1, in test_vfwnmacc_vf_f64m4()
73 vfloat64m8_t test_vfwnmacc_vv_f64m8(vfloat64m8_t acc, vfloat32m4_t op1, in test_vfwnmacc_vv_f64m8()
83 vfloat64m8_t test_vfwnmacc_vf_f64m8(vfloat64m8_t acc, float op1, in test_vfwnmacc_vf_f64m8()
93 vfloat64m1_t test_vfwnmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t acc, in test_vfwnmacc_vv_f64m1_m()
104 vfloat64m1_t test_vfwnmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t acc, in test_vfwnmacc_vf_f64m1_m()
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| /llvm-project-15.0.7/clang/test/CodeGen/RISCV/rvv-intrinsics/ |
| H A D | vwmacc.c | 12 vint16mf4_t test_vwmacc_vv_i16mf4(vint16mf4_t acc, vint8mf8_t op1, in test_vwmacc_vv_i16mf4()
32 vint16mf2_t test_vwmacc_vv_i16mf2(vint16mf2_t acc, vint8mf4_t op1, in test_vwmacc_vv_i16mf2()
152 vint32m1_t test_vwmacc_vv_i32m1(vint32m1_t acc, vint16mf2_t op1, in test_vwmacc_vv_i32m1()
232 vint64m1_t test_vwmacc_vv_i64m1(vint64m1_t acc, vint32mf2_t op1, in test_vwmacc_vv_i64m1()
462 vuint32m1_t test_vwmaccu_vx_u32m1(vuint32m1_t acc, uint16_t op1, in test_vwmaccu_vx_u32m1()
482 vuint32m2_t test_vwmaccu_vx_u32m2(vuint32m2_t acc, uint16_t op1, in test_vwmaccu_vx_u32m2()
502 vuint32m4_t test_vwmaccu_vx_u32m4(vuint32m4_t acc, uint16_t op1, in test_vwmaccu_vx_u32m4()
522 vuint32m8_t test_vwmaccu_vx_u32m8(vuint32m8_t acc, uint16_t op1, in test_vwmaccu_vx_u32m8()
542 vuint64m1_t test_vwmaccu_vx_u64m1(vuint64m1_t acc, uint32_t op1, in test_vwmaccu_vx_u64m1()
562 vuint64m2_t test_vwmaccu_vx_u64m2(vuint64m2_t acc, uint32_t op1, in test_vwmaccu_vx_u64m2()
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| H A D | vnmsub.c | 12 vint8mf8_t test_vnmsub_vv_i8mf8(vint8mf8_t acc, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vnmsub_vv_i8mf8()
21 vint8mf8_t test_vnmsub_vx_i8mf8(vint8mf8_t acc, int8_t op1, vint8mf8_t op2, size_t vl) { in test_vnmsub_vx_i8mf8()
39 vint8mf4_t test_vnmsub_vx_i8mf4(vint8mf4_t acc, int8_t op1, vint8mf4_t op2, size_t vl) { in test_vnmsub_vx_i8mf4()
57 vint8mf2_t test_vnmsub_vx_i8mf2(vint8mf2_t acc, int8_t op1, vint8mf2_t op2, size_t vl) { in test_vnmsub_vx_i8mf2()
66 vint8m1_t test_vnmsub_vv_i8m1(vint8m1_t acc, vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vnmsub_vv_i8m1()
75 vint8m1_t test_vnmsub_vx_i8m1(vint8m1_t acc, int8_t op1, vint8m1_t op2, size_t vl) { in test_vnmsub_vx_i8m1()
84 vint8m2_t test_vnmsub_vv_i8m2(vint8m2_t acc, vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vnmsub_vv_i8m2()
93 vint8m2_t test_vnmsub_vx_i8m2(vint8m2_t acc, int8_t op1, vint8m2_t op2, size_t vl) { in test_vnmsub_vx_i8m2()
102 vint8m4_t test_vnmsub_vv_i8m4(vint8m4_t acc, vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vnmsub_vv_i8m4()
111 vint8m4_t test_vnmsub_vx_i8m4(vint8m4_t acc, int8_t op1, vint8m4_t op2, size_t vl) { in test_vnmsub_vx_i8m4()
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| H A D | vmacc.c | 12 vint8mf8_t test_vmacc_vv_i8mf8(vint8mf8_t acc, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmacc_vv_i8mf8()
21 vint8mf8_t test_vmacc_vx_i8mf8(vint8mf8_t acc, int8_t op1, vint8mf8_t op2, size_t vl) { in test_vmacc_vx_i8mf8()
39 vint8mf4_t test_vmacc_vx_i8mf4(vint8mf4_t acc, int8_t op1, vint8mf4_t op2, size_t vl) { in test_vmacc_vx_i8mf4()
57 vint8mf2_t test_vmacc_vx_i8mf2(vint8mf2_t acc, int8_t op1, vint8mf2_t op2, size_t vl) { in test_vmacc_vx_i8mf2()
66 vint8m1_t test_vmacc_vv_i8m1(vint8m1_t acc, vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmacc_vv_i8m1()
75 vint8m1_t test_vmacc_vx_i8m1(vint8m1_t acc, int8_t op1, vint8m1_t op2, size_t vl) { in test_vmacc_vx_i8m1()
84 vint8m2_t test_vmacc_vv_i8m2(vint8m2_t acc, vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmacc_vv_i8m2()
93 vint8m2_t test_vmacc_vx_i8m2(vint8m2_t acc, int8_t op1, vint8m2_t op2, size_t vl) { in test_vmacc_vx_i8m2()
102 vint8m4_t test_vmacc_vv_i8m4(vint8m4_t acc, vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmacc_vv_i8m4()
111 vint8m4_t test_vmacc_vx_i8m4(vint8m4_t acc, int8_t op1, vint8m4_t op2, size_t vl) { in test_vmacc_vx_i8m4()
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| H A D | vmadd.c | 12 vint8mf8_t test_vmadd_vv_i8mf8(vint8mf8_t acc, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmadd_vv_i8mf8()
21 vint8mf8_t test_vmadd_vx_i8mf8(vint8mf8_t acc, int8_t op1, vint8mf8_t op2, size_t vl) { in test_vmadd_vx_i8mf8()
39 vint8mf4_t test_vmadd_vx_i8mf4(vint8mf4_t acc, int8_t op1, vint8mf4_t op2, size_t vl) { in test_vmadd_vx_i8mf4()
57 vint8mf2_t test_vmadd_vx_i8mf2(vint8mf2_t acc, int8_t op1, vint8mf2_t op2, size_t vl) { in test_vmadd_vx_i8mf2()
66 vint8m1_t test_vmadd_vv_i8m1(vint8m1_t acc, vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmadd_vv_i8m1()
75 vint8m1_t test_vmadd_vx_i8m1(vint8m1_t acc, int8_t op1, vint8m1_t op2, size_t vl) { in test_vmadd_vx_i8m1()
84 vint8m2_t test_vmadd_vv_i8m2(vint8m2_t acc, vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmadd_vv_i8m2()
93 vint8m2_t test_vmadd_vx_i8m2(vint8m2_t acc, int8_t op1, vint8m2_t op2, size_t vl) { in test_vmadd_vx_i8m2()
102 vint8m4_t test_vmadd_vv_i8m4(vint8m4_t acc, vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmadd_vv_i8m4()
111 vint8m4_t test_vmadd_vx_i8m4(vint8m4_t acc, int8_t op1, vint8m4_t op2, size_t vl) { in test_vmadd_vx_i8m4()
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| H A D | vnmsac.c | 12 vint8mf8_t test_vnmsac_vv_i8mf8(vint8mf8_t acc, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vnmsac_vv_i8mf8()
21 vint8mf8_t test_vnmsac_vx_i8mf8(vint8mf8_t acc, int8_t op1, vint8mf8_t op2, size_t vl) { in test_vnmsac_vx_i8mf8()
39 vint8mf4_t test_vnmsac_vx_i8mf4(vint8mf4_t acc, int8_t op1, vint8mf4_t op2, size_t vl) { in test_vnmsac_vx_i8mf4()
57 vint8mf2_t test_vnmsac_vx_i8mf2(vint8mf2_t acc, int8_t op1, vint8mf2_t op2, size_t vl) { in test_vnmsac_vx_i8mf2()
66 vint8m1_t test_vnmsac_vv_i8m1(vint8m1_t acc, vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vnmsac_vv_i8m1()
75 vint8m1_t test_vnmsac_vx_i8m1(vint8m1_t acc, int8_t op1, vint8m1_t op2, size_t vl) { in test_vnmsac_vx_i8m1()
84 vint8m2_t test_vnmsac_vv_i8m2(vint8m2_t acc, vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vnmsac_vv_i8m2()
93 vint8m2_t test_vnmsac_vx_i8m2(vint8m2_t acc, int8_t op1, vint8m2_t op2, size_t vl) { in test_vnmsac_vx_i8m2()
102 vint8m4_t test_vnmsac_vv_i8m4(vint8m4_t acc, vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vnmsac_vv_i8m4()
111 vint8m4_t test_vnmsac_vx_i8m4(vint8m4_t acc, int8_t op1, vint8m4_t op2, size_t vl) { in test_vnmsac_vx_i8m4()
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