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Searched defs:_reg (Results 1 – 25 of 63) sorted by relevance

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/freebsd-13.1/sys/dev/bhnd/cores/pmu/
H A Dbhnd_pmu_private.h36 #define BHND_PMU_WRITE_4(_sc, _reg, _val) \ argument
39 #define BHND_PMU_AND_4(_sc, _reg, _val) \ argument
42 #define BHND_PMU_OR_4(_sc, _reg, _val) \ argument
47 #define BHND_PMU_IND_READ(_sc, _src, _reg) \ argument
50 #define BHND_PMU_IND_WRITE(_sc, _src, _reg, _val, _mask) \ argument
56 #define BHND_PMU_CCTRL_READ(_sc, _reg) \ argument
58 #define BHND_PMU_CCTRL_WRITE(_sc, _reg, _val, _mask) \ argument
62 #define BHND_PMU_REGCTRL_READ(_sc, _reg) \ argument
64 #define BHND_PMU_REGCTRL_WRITE(_sc, _reg, _val, _mask) \ argument
68 #define BHND_PMU_PLL_READ(_sc, _reg) \ argument
[all …]
/freebsd-13.1/sys/arm/altera/socfpga/
H A Dsocfpga_common.h33 #define READ4(_sc, _reg) bus_read_4((_sc)->res[0], _reg) argument
34 #define READ2(_sc, _reg) bus_read_2((_sc)->res[0], _reg) argument
35 #define READ1(_sc, _reg) bus_read_1((_sc)->res[0], _reg) argument
36 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val) argument
37 #define WRITE2(_sc, _reg, _val) bus_write_2((_sc)->res[0], _reg, _val) argument
38 #define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val) argument
/freebsd-13.1/sys/arm/freescale/vybrid/
H A Dvf_common.h31 #define READ4(_sc, _reg) \ argument
33 #define WRITE4(_sc, _reg, _val) \ argument
35 #define READ2(_sc, _reg) \ argument
37 #define WRITE2(_sc, _reg, _val) \ argument
39 #define READ1(_sc, _reg) \ argument
41 #define WRITE1(_sc, _reg, _val) \ argument
H A Dvf_dmamux.h46 #define MUX_READ1(_sc, _mux, _reg) \ argument
49 #define MUX_WRITE1(_sc, _mux, _reg, _val) \ argument
H A Dvf_ehci.c112 #define PHY_READ4(_sc, _reg) \ argument
114 #define PHY_WRITE4(_sc, _reg, _val) \ argument
117 #define USBC_READ4(_sc, _reg) \ argument
119 #define USBC_WRITE4(_sc, _reg, _val) \ argument
H A Dvf_edma.h113 #define TCD_READ4(_sc, _reg) \ argument
115 #define TCD_WRITE4(_sc, _reg, _val) \ argument
117 #define TCD_READ2(_sc, _reg) \ argument
119 #define TCD_WRITE2(_sc, _reg, _val) \ argument
121 #define TCD_READ1(_sc, _reg) \ argument
123 #define TCD_WRITE1(_sc, _reg, _val) \ argument
/freebsd-13.1/sys/mips/broadcom/
H A Dbcm_machdep.h112 #define BCM_SOC_WRITE_4(_addr, _reg, _val) \ argument
115 #define BCM_CORE_ADDR(_bp, _name, _reg) \ argument
118 #define BCM_CORE_READ_4(_bp, _name, _reg) \ argument
120 #define BCM_CORE_WRITE_4(_bp, _name, _reg, _val) \ argument
123 #define BCM_CHIPC_READ_4(_bp, _reg) \ argument
125 #define BCM_CHIPC_WRITE_4(_bp, _reg, _val) \ argument
128 #define BCM_CPU_READ_4(_bp, _reg) \ argument
130 #define BCM_CPU_WRITE_4(_bp, _reg, _val) \ argument
133 #define BCM_PMU_READ_4(_bp, _reg) \ argument
135 #define BCM_PMU_WRITE_4(_bp, _reg, _val) \ argument
/freebsd-13.1/sys/dev/bhnd/cores/pci/
H A Dbhnd_pci_hostb.c178 #define BHND_PCI_READ_2(_sc, _reg) \ argument
181 #define BHND_PCI_READ_4(_sc, _reg) \ argument
184 #define BHND_PCI_WRITE_2(_sc, _reg, _val) \ argument
187 #define BHND_PCI_WRITE_4(_sc, _reg, _val) \ argument
190 #define BHND_PCI_PROTO_READ_4(_sc, _reg) \ argument
193 #define BHND_PCI_PROTO_WRITE_4(_sc, _reg, _val) \ argument
196 #define BHND_PCI_MDIO_READ(_sc, _phy, _reg) \ argument
199 #define BHND_PCI_MDIO_WRITE(_sc, _phy, _reg, _val) \ argument
202 #define BHND_PCI_MDIO_READ_EXT(_sc, _phy, _devaddr, _reg) \ argument
205 #define BHND_PCI_MDIO_WRITE_EXT(_sc, _phy, _devaddr, _reg, _val) \ argument
/freebsd-13.1/sys/dev/altera/pio/
H A Dpio.c60 #define READ4(_sc, _reg) bus_read_4((_sc)->res[0], _reg) argument
61 #define READ2(_sc, _reg) bus_read_2((_sc)->res[0], _reg) argument
62 #define READ1(_sc, _reg) bus_read_1((_sc)->res[0], _reg) argument
63 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val) argument
64 #define WRITE2(_sc, _reg, _val) bus_write_2((_sc)->res[0], _reg, _val) argument
65 #define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val) argument
/freebsd-13.1/sys/dev/beri/virtio/
H A Dvirtio.h33 #define READ2(_sc, _reg) \ argument
35 #define READ4(_sc, _reg) \ argument
37 #define WRITE2(_sc, _reg, _val) \ argument
39 #define WRITE4(_sc, _reg, _val) \ argument
/freebsd-13.1/sys/dev/ath/
H A Dah_osdep.h93 #define OS_REG_UNSWAPPED(_reg) \ argument
97 #define OS_REG_UNSWAPPED(_reg) (0) argument
132 #define OS_BUS_BARRIER_REG(_ah, _reg, _t) \ argument
139 #define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val) argument
140 #define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg) argument
/freebsd-13.1/sys/mips/ingenic/
H A Djz4780_common.h33 #define READ4(_sc, _reg) \ argument
35 #define WRITE4(_sc, _reg, _val) \ argument
H A Djz4780_intr.c91 #define READ4(_sc, _reg) bus_read_4((_sc)->pic_res[0], _reg) argument
92 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->pic_res[0], _reg, _val) argument
/freebsd-13.1/sys/dev/flash/
H A Dcqspi.c82 #define READ4(_sc, _reg) bus_read_4((_sc)->res[0], _reg) argument
83 #define READ2(_sc, _reg) bus_read_2((_sc)->res[0], _reg) argument
84 #define READ1(_sc, _reg) bus_read_1((_sc)->res[0], _reg) argument
85 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val) argument
86 #define WRITE2(_sc, _reg, _val) bus_write_2((_sc)->res[0], _reg, _val) argument
87 #define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val) argument
88 #define READ_DATA_4(_sc, _reg) bus_read_4((_sc)->res[1], _reg) argument
89 #define READ_DATA_1(_sc, _reg) bus_read_1((_sc)->res[1], _reg) argument
90 #define WRITE_DATA_4(_sc, _reg, _val) bus_write_4((_sc)->res[1], _reg, _val) argument
91 #define WRITE_DATA_1(_sc, _reg, _val) bus_write_1((_sc)->res[1], _reg, _val) argument
/freebsd-13.1/sys/mips/mediatek/
H A Dmtk_xhci.c251 #define RD4(_sc, _reg) bus_read_4((_sc)->sc_io_res, (_reg)) argument
252 #define WR4(_sc, _reg, _val) bus_write_4((_sc)->sc_io_res, (_reg), (_val)) argument
253 #define CLRSET4(_sc, _reg, _clr, _set) \ argument
/freebsd-13.1/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_attach.c595 #define REG_READ(_reg) *((volatile u_int32_t *)(_reg)) in ar9300_read_revisions() argument
610 #define REG_READ(_reg) *((volatile u_int32_t *)(_reg)) in ar9300_read_revisions() argument
774 #define REG_WRITE(_reg, _val) *((volatile u_int32_t *)(_reg)) = (_val); in ar9300_attach() argument
775 #define REG_READ(_reg) (*((volatile u_int32_t *)(_reg))) in ar9300_attach() argument
796 #define REG_READ(_reg) (*((volatile u_int32_t *)(_reg))) in ar9300_attach() argument
2323 #define REG_READ(_reg) *((volatile u_int32_t *)(_reg)) in ar9300_attach() argument
/freebsd-13.1/tools/tools/ath/common/
H A Dah_osdep.h61 #define OS_REG_WRITE(_ah, _reg, _val) argument
62 #define OS_REG_READ(_ah, _reg) 0 argument
/freebsd-13.1/sys/dev/axgbe/
H A Dxgbe-common.h1482 #define XGMAC_IOREAD(_pdata, _reg) \ argument
1490 #define XGMAC_IOWRITE(_pdata, _reg, _val) \ argument
1532 #define XGMAC_DMA_IOREAD(_channel, _reg) \ argument
1591 #define XSIR0_IOREAD(_pdata, _reg) \ argument
1611 #define XSIR1_IOREAD(_pdata, _reg) \ argument
1634 #define XRXTX_IOREAD(_pdata, _reg) \ argument
1667 #define XP_IOREAD(_pdata, _reg) \ argument
1675 #define XP_IOWRITE(_pdata, _reg, _val) \ argument
1701 #define XI2C_IOREAD(_pdata, _reg) \ argument
1709 #define XI2C_IOWRITE(_pdata, _reg, _val) \ argument
[all …]
/freebsd-13.1/sys/arm/freescale/imx/
H A Dimx6_audmux.c55 #define READ4(_sc, _reg) \ argument
57 #define WRITE4(_sc, _reg, _val) \ argument
H A Dimx6_sdma.c65 #define READ4(_sc, _reg) \ argument
67 #define WRITE4(_sc, _reg, _val) \ argument
/freebsd-13.1/sys/dev/altera/msgdma/
H A Dmsgdma.h70 #define READ4(_sc, _reg) \ argument
72 #define WRITE4(_sc, _reg, _val) \ argument
75 #define READ4_DESC(_sc, _reg) \ argument
77 #define WRITE4_DESC(_sc, _reg, _val) \ argument
/freebsd-13.1/sys/dev/sfxge/common/
H A Defx_impl.h868 #define EFX_CHECK_REG(_enp, _reg) \ argument
903 #define EFX_CHECK_REG(_enp, _reg) do { \ argument
908 #define EFX_BAR_READD(_enp, _reg, _edp, _lock) \ argument
919 #define EFX_BAR_WRITED(_enp, _reg, _edp, _lock) \ argument
930 #define EFX_BAR_READQ(_enp, _reg, _eqp) \ argument
942 #define EFX_BAR_WRITEQ(_enp, _reg, _eqp) \ argument
954 #define EFX_BAR_READO(_enp, _reg, _eop) \ argument
968 #define EFX_BAR_WRITEO(_enp, _reg, _eop) \ argument
1032 #define EFX_BAR_TBL_READQ(_enp, _reg, _index, _eqp) \ argument
1046 #define EFX_BAR_TBL_WRITEQ(_enp, _reg, _index, _eqp) \ argument
[all …]
/freebsd-13.1/sys/dev/mmc/host/
H A Ddwmmc_samsung.c48 #define WRITE4(_sc, _reg, _val) \ argument
/freebsd-13.1/sys/dev/xilinx/
H A Daxi_quad_spi.c67 #define READ4(_sc, _reg) \ argument
69 #define WRITE4(_sc, _reg, _val) \ argument
H A Daxidma.c64 #define READ4(_sc, _reg) \ argument
66 #define WRITE4(_sc, _reg, _val) \ argument
68 #define READ8(_sc, _reg) \ argument
70 #define WRITE8(_sc, _reg, _val) \ argument

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