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/xnu-11215/doc/observability/
H A Dmt_stackshot.md8 - **Initiating / Calling CPU**: The CPU which stackshot was called from.
9 - **Main CPU**: The CPU which populates workqueues and collects global state.
10 - **Auxiliary CPU**: A CPU which is not the main CPU.
16 When a stackshot is taken, the initiating CPU (the CPU from which stackshot was
27 main CPU).
101 ⎢ CPU 0 ⎥
104 ⎢ CPU 1 ⎥
107 ⎢ CPU 2 ⎥
124 CPU which can be seen from a debugger.
143 auxilliary CPU (i.e. a CPU other than the one which initiated the stackshot)
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H A Drecount.md3 CPU resource accounting interfaces and implementation.
8 It supports attributing counts to a specific level of the CPU topology (per-CPU and per-CPU kind).
17 …, Recount tracks its counters per-CPU kind (e.g. performance or efficiency) for threads, per-CPU f…
52 … each metric as a column and then uses rows for the groupings, like per-CPU or per-CPU kind values.
58 - `recount task <task-ptr> [...]` prints a table of per-CPU counts for tasks.
77 To count CPU resource usage, a `struct recount_usage` has the following fields:
85 - `ru_cycles`: the cycles run by a CPU with `CONFIG_PERVASIVE_CPI`
86 - `ru_instructions`: the instructions retired by a CPU with `CONFIG_PERVASIVE_CPI`
89 The CPU's previous snapshot, stored in the `_snaps_percpu` per-CPU variable, is subtracted from the…
90 The per-CPU variable is then updated with the current snapshot for the next switch.
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H A Dcpu_counters.md1 # CPU Counters
3 The xnu subsystems that manage CPU performance counters.
7 CPU performance counters are hardware registers that count events of interest to efficient CPU exec…
8 Counters that measure events closely correlated with each CPU's execution pipeline are managed by t…
10 … Monitoring Unit (UPMU), which measures effects that aren't necessarily correlated to a single CPU.
20 There are several subsystems that provide access to CPU counter hardware:
28 - cpc: The CPU Performance Counter subsystem provides a policy layer on top of kpc and Monotonic to…
34 - The Recount subsystem makes extensive use of the fixed CPMU counters to attribute CPU resources b…
41 And CPU counter values can be sampled by kperf on other triggers, like timers or kdebug events.
/xnu-11215/bsd/dev/dtrace/
H A Ddtrace_glue.c431 (omni->cyo_online)(omni->cyo_arg, CPU, &cH, &cT); in _cyclic_add_omni()
467 (omni->cyo_offline)(omni->cyo_arg, CPU, oarg); in _cyclic_remove_omni()
961 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = uaddr; in dtrace_copycheck()
975 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = src; in dtrace_copyin()
1000 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = src; in dtrace_copyinstr()
1014 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = dst; in dtrace_copyout()
1036 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = dst; in dtrace_copyoutstr()
1085 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = uaddr; in dtrace_fuword8()
1103 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = uaddr; in dtrace_fuword16()
1238 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = uaddr; in dtrace_tally_fault()
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H A Ddtrace.c3450 CPU_ON_INTR(CPU)) { in dtrace_dif_variable()
6182 a += CPU->cpu_id * sz; in dtrace_dif_emulate()
6200 regs[rd] = tmp[CPU->cpu_id]; in dtrace_dif_emulate()
6221 a += CPU->cpu_id * sz; in dtrace_dif_emulate()
6243 tmp[CPU->cpu_id] = regs[rd]; in dtrace_dif_emulate()
6762 dtrace_cpu_t *cpu = CPU; in dtrace_action_chill()
7077 cpuid = CPU->cpu_id; in dtrace_probe()
7078 onintr = CPU_ON_INTR(CPU); in dtrace_probe()
7455 CPU_ON_INTR(CPU)) { in dtrace_probe()
14725 *cpu = CPU->cpu_id; in dtrace_state_go()
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/xnu-11215/doc/scheduler/
H A Dsched_clutch_edge.md9 …CPU accounting at the thread level incentivizes creating more threads on the system. Also in the w…
68 …g on behalf of a specific workload. The goal of this level is to share the CPU among various user …
77 …s an interactivity score based on the ratio of voluntary blocking time and CPU usage time for the …
83 * **Clutch Bucket Group CPU Time**: Maintains the CPU time used by all threads of this clutch bucke…
87 …ows for a fair sharing of CPU among thread groups based on their recent behavior. Since the algori…
99 …CPU usage of individual threads. The load information is updated every scheduler tick and the thre…
148 * Calculate the ratio of CPU blocked and CPU used for the clutch bucket.
161 * thread priority = base priority - (thread CPU usage >> priority shift)
177 …ency access to CPU** for high QoS work. This property ensures that the high QoS threads experience…
248 …alance threads and idle out the current CPU waiting for the IPI'ed thread to reschedule the thread…
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/xnu-11215/bsd/dev/arm64/
H A Ddtrace_isa.c110 if (pArg->cpu == CPU->cpu_id || pArg->cpu == DTRACE_CPUALL) { in xcRemote()
193 volatile uint16_t *flags = (volatile uint16_t *) &cpu_core[CPU->cpu_id].cpuc_dtrace_flags; in dtrace_getustack_common()
231 volatile uint16_t *flags = (volatile uint16_t *) &cpu_core[CPU->cpu_id].cpuc_dtrace_flags; in dtrace_getupcstack()
341 volatile uint16_t *flags = (volatile uint16_t *) &cpu_core[CPU->cpu_id].cpuc_dtrace_flags; in dtrace_getufpstack()
473 int on_intr = CPU_ON_INTR(CPU); in dtrace_getpcstack()
476 uintptr_t caller = CPU->cpu_dtrace_caller; in dtrace_getpcstack()
H A Dfbt_arm.c118 if (0 == CPU->cpu_dtrace_invop_underway) { in fbt_invop()
119 CPU->cpu_dtrace_invop_underway = 1; /* Race not possible on in fbt_invop()
160 CPU->cpu_dtrace_caller = get_saved_state_lr(regs); in fbt_invop()
170 CPU->cpu_dtrace_caller = 0; in fbt_invop()
171 CPU->cpu_dtrace_invop_underway = 0; in fbt_invop()
H A Ddtrace_subr_arm.c117 rwp = &CPU->cpu_ft_lock; in dtrace_user_probe()
129 rwp = &CPU->cpu_ft_lock; in dtrace_user_probe()
H A Dfasttrap_isa.c196 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
968 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
/xnu-11215/bsd/dev/i386/
H A Ddtrace_isa.c144 if ( pArg->cpu == CPU->cpu_id || pArg->cpu == DTRACE_CPUALL ) { in xcRemote()
282 cpu_core[CPU->cpu_id].cpuc_dtrace_illval = ndx; in dtrace_getvmreg()
443 (volatile uint16_t *)&cpu_core[CPU->cpu_id].cpuc_dtrace_flags; in dtrace_getustack_common()
526 volatile uint16_t *flags = (volatile uint16_t *) &cpu_core[CPU->cpu_id].cpuc_dtrace_flags; in dtrace_adjust_stack()
565 missing_tos = cpu_core[CPU->cpu_id].cpuc_missing_tos; in dtrace_adjust_stack()
594 (volatile uint16_t *)&cpu_core[CPU->cpu_id].cpuc_dtrace_flags; in dtrace_getupcstack()
719 (volatile uint16_t *)&cpu_core[CPU->cpu_id].cpuc_dtrace_flags; in dtrace_getufpstack()
835 uintptr_t caller = CPU->cpu_dtrace_caller; in dtrace_getpcstack()
838 if ((on_intr = CPU_ON_INTR(CPU)) != 0) in dtrace_getpcstack()
H A Ddtrace_subr_x86.c136 rwp = &CPU->cpu_ft_lock; in dtrace_user_probe()
152 rwp = &CPU->cpu_ft_lock; in dtrace_user_probe()
H A Dfbt_x86.c113 … CPU->cpu_dtrace_caller = *(uintptr_t *)(((uintptr_t)(regs->isf.rsp))+sizeof(uint64_t)); // 8(%rsp) in fbt_invop()
116 CPU->cpu_dtrace_caller = 0; in fbt_invop()
120 CPU->cpu_dtrace_caller = 0; in fbt_invop()
H A Dfasttrap_isa.c684 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; in fasttrap_return_common()
736 cpu_core[CPU->cpu_id].cpuc_missing_tos = pc; in fasttrap_return_common()
750 cpu_core[CPU->cpu_id].cpuc_missing_tos = 0; in fasttrap_return_common()
991 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; in fasttrap_pid_probe32()
1555 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; in fasttrap_pid_probe64()
/xnu-11215/doc/arm/
H A Dsme.md68 `PSTATE.SM` moves the CPU in and out of a special execution mode called
72 things even more complicated, these transitions cause the CPU to zero out the
89 `PSTATE.{SM,ZA} = {0,0}` acts as a hint to the CPU that it may power down
110 case, the per-CPU `SMPRI_EL1` controls the relative priority of the SME
111 instructions issued by that CPU. ARM guarantees that higher `SMPRI_EL1` values
150 become illegal while the CPU is in streaming SVE mode. This poses a problem if
185 thread: the next time `PSTATE.ZA` is enabled, the CPU is architecturally
203 Accordingly xnu resets `SMPRI_EL1` to `0` during CPU initialization, and
228 register state, xnu tries to keep the guest matrix state resident in the CPU as
257 depend on whether the CPU is in streaming SVE mode (described later in the
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/xnu-11215/doc/building/
H A Dxnu_build_consolidation.md41 various CPU-specific parameters.
52 ### Performing CPU/Revision-specific checks at runtime
54 CPU and revision checks may be required at various places, although the focus here has been the app…
60 * On a subset of all of the CPU revisions.
73 type, CPU ID, revision(s), or a combination of these.
76 `MIDR_EL1` register against a CPU revision that is passed as a parameter to the macro, where applic…
110 * Similarly, deriving CPU physical IDs from the topology parser.
/xnu-11215/doc/primitives/
H A Dsched_cond.md42 This results in precious CPU cycles being spent in (A) to wake the thread despite the fact that
45 …the thread will still yield (D), thus spending precious CPU cycles setting itself up to block only
/xnu-11215/doc/lifecycle/
H A Dhibernation.md72 is in progress on this CPU.
79 * By the time regular sleep has completed, all CPUs but the boot CPU have been
80 halted, and we are running on the boot CPU's idle thread in the shutdown
226 + The boot CPU's idle thread preemption_count also has to be fixed up. This
230 * After the platform CPU init code is called, `hibernate_machine_init()` is
/xnu-11215/san/coverage/
H A Dkcov-blacklist-x86_6424 # sumac, x86, boostrap 2nd+ CPU
/xnu-11215/bsd/sys/
H A Ddtrace.h2608 (cpu_core[CPU->cpu_id].cpuc_dtrace_flags & (flag))
2611 (cpu_core[CPU->cpu_id].cpuc_dtrace_flags |= (flag))
2614 (cpu_core[CPU->cpu_id].cpuc_dtrace_flags &= ~(flag))
H A Ddtrace_glue.h147 #define CPU (&(cpu_list[cpu_number()])) /* Pointer to current CPU */ macro
/xnu-11215/iokit/DriverKit/
H A DIODMACommand.iig169 * @brief Perform CPU access to the DMA mapping.
H A DIOService.iig342 * consumption and maximize battery life by still allowing some level of CPU power management.
/xnu-11215/
H A DREADME.md462 1. *CPU Characteristics* If the code you are guarding has specific
463 characterstics that will vary only based on the CPU architecture being
/xnu-11215/osfmk/conf/
H A Dfiles355 # This includes stubs for exported functions without CPU counter support.

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