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Searched refs:tmp2 (Results 1 – 21 of 21) sorted by relevance

/wasmtime-44.0.1/cranelift/filetests/filetests/isa/riscv64/
H A Dbitrev.clif14 ; brev8 a0,a4##tmp=a3 tmp2=a2 step=a1 ty=i8
84 ; brev8 a2,a4##tmp=a3 tmp2=a0 step=a1 ty=i64
190 ; brev8 a2,a4##tmp=a3 tmp2=a0 step=a1 ty=i64
296 ; brev8 a0,a4##tmp=a3 tmp2=a2 step=a1 ty=i64
400 ; brev8 a3,a5##tmp=a4 tmp2=a1 step=a2 ty=i64
436 ; brev8 a1,a5##tmp=a4 tmp2=a2 step=a0 ty=i64
H A Dbr_table.clif32 ; br_table a0,[MachLabel(6),MachLabel(5),MachLabel(1),MachLabel(2),MachLabel(3)]##tmp1=a2,tmp2=a1
H A Dbitops-float.clif33 ; br_table a0,[MachLabel(1),MachLabel(2)]##tmp1=a2,tmp2=a1
/wasmtime-44.0.1/cranelift/codegen/src/isa/riscv64/inst/
H A Demit.rs1387 tmp2, in emit_uncompressed()
1465 rs2: tmp2.to_reg(), in emit_uncompressed()
1493 rd: tmp2, in emit_uncompressed()
1504 rs2: tmp2.to_reg(), in emit_uncompressed()
2419 tmp2, in emit_uncompressed()
2437 rd: tmp2, in emit_uncompressed()
2438 rs: tmp2.to_reg(), in emit_uncompressed()
2480 rs2: tmp2.to_reg(), in emit_uncompressed()
2528 rd: tmp2, in emit_uncompressed()
2529 rs: tmp2.to_reg(), in emit_uncompressed()
[all …]
H A Dmod.rs277 index, tmp1, tmp2, .. in riscv64_get_operands()
281 collector.reg_early_def(tmp2); in riscv64_get_operands()
553 tmp2, in riscv64_get_operands()
559 collector.reg_early_def(tmp2); in riscv64_get_operands()
1050 tmp2, in print_with_state()
1056 let tmp2 = format_reg(tmp2.to_reg()); in print_with_state() localVariable
1115 tmp2, in print_with_state()
1124 format_reg(tmp2.to_reg()), in print_with_state()
H A Demit_tests.rs2228 tmp2: writable_a0(), in riscv64_worst_case_instruction_size()
/wasmtime-44.0.1/cranelift/codegen/src/isa/x64/inst/
H A Dmod.rs710 idx, tmp1, tmp2, .. in pretty_print()
714 let tmp2 = pretty_print_reg(tmp2.to_reg(), 8); in pretty_print() localVariable
1085 idx, tmp1, tmp2, .. in x64_get_operands()
1092 collector.reg_def(tmp2); in x64_get_operands()
H A Demit.rs561 let (tmp1, tmp2) = { in emit()
635 asm::inst::leaq_rm::new(tmp2, amode).emit(sink, info, state); in emit()
639 tmp2.to_reg(), in emit()
687 tmp2, in emit()
725 tmp2, in emit()
730 asm::inst::addq_rm::new(tmp1, tmp2).emit(sink, info, state); in emit()
/wasmtime-44.0.1/cranelift/codegen/src/isa/riscv64/lower/
H A Disle.rs595 let tmp2 = self.temp_writable_reg(I64); in lower_br_table() localVariable
599 tmp2, in lower_br_table()
/wasmtime-44.0.1/winch/codegen/src/isa/x64/
H A Dmasm.rs2244 let tmp2 = context.any_fpr(this)?; in v128_mul() localVariable
2252 .xmm_vpmuldq_rrr(tmp1.inner(), rhs.reg, writable!(tmp2)); in v128_mul()
2264 .xmm_vpadd_rrr(tmp1.inner(), tmp2, tmp1.writable(), OperandSize::S64); in v128_mul()
2271 this.asm.xmm_vpmuludq_rrr(lhs.reg, rhs.reg, writable!(tmp2)); in v128_mul()
2276 .xmm_vpadd_rrr(tmp1.inner(), tmp2, writable!(lhs.reg), OperandSize::S64); in v128_mul()
2279 context.free_reg(tmp2); in v128_mul()
H A Dasm.rs1635 tmp2: Reg,
1640 tmp2: Writable::from_reg(tmp2.into()),
/wasmtime-44.0.1/winch/codegen/src/isa/aarch64/
H A Dasm.rs852 tmp2: Reg, in jmp_table()
860 rtmp2: Writable::from_reg(tmp2.into()), in jmp_table()
/wasmtime-44.0.1/cranelift/codegen/src/isa/x64/
H A Dlower.isle3924 (tmp2 Xmm (xmm_zero $F32X4))
3925 (dst Xmm (x64_maxps src tmp2))
3927 ;; Set tmp2 to INT_MAX+1. It is important to note here that after it looks
3933 (tmp2 Xmm (x64_pcmpeqd tmp2 tmp2))
3934 (tmp2 Xmm (x64_psrld tmp2 (xmi_imm 1)))
3935 (tmp2 Xmm (x64_cvtdq2ps tmp2))
3944 (tmp1 Xmm (x64_subps tmp1 tmp2))
3948 (tmp2 Xmm (x64_cmpps tmp2 tmp1 (FcmpImm.LessThanOrEqual)))
3956 (tmp1 Xmm (x64_pxor tmp1 tmp2))
3957 (tmp2 Xmm (xmm_zero $I32X4))
[all …]
H A Dinst.isle169 (tmp2 WritableReg)
3378 (tmp2 WritableGpr (temp_writable_gpr)))
3381 (MInst.JmpTableSeq idx tmp1 tmp2 default_target jt_targets))))
/wasmtime-44.0.1/crates/cranelift/src/func_environ/stack_switching/
H A Dinstructions.rs1887 let tmp2 = in translate_switch() localVariable
1893 .store(flags, tmp2, switchee_last_ancestor_cc, offset); in translate_switch()
/wasmtime-44.0.1/cranelift/codegen/src/isa/aarch64/
H A Dlower.isle874 ;; xtn tmp2.2s, rm.2d
876 ;; umlal rd.2d, tmp2.2s, tmp1.2s
902 ;; tmp2 = |g|e|
903 (tmp2 Reg (xtn rm (ScalarSize.Size32)))
912 (result Reg (umlal32 shift tmp2 tmp1 false)))
2122 (tmp2 Reg (bic ty y c)))
2123 (orr ty tmp1 tmp2)))
H A Dinst.isle1006 ;; temporary registers such as the spilltmp and tmp2 registers. This also
4941 ;; cset tmp2, cond
4942 ;; csel dst, tmp1, tmp2, eq
4959 (let ((tmp2 WritableReg (temp_writable_reg $I64))
4962 (MInst.CSet tmp2 cond)
4963 (MInst.CSel dst (Cond.Eq) tmp1 tmp2)
/wasmtime-44.0.1/cranelift/codegen/src/isa/s390x/
H A Dinst.isle3276 (tmp2 WritableReg (temp_writable_reg ty))
3278 (inst2 MInst (MInst.CMov32SImm16 tmp2 cond tmp1 imm_true))
3279 (dst ValueRegs (value_reg tmp2)))
3283 (tmp2 WritableReg (temp_writable_reg ty))
3285 (inst2 MInst (MInst.CMov64SImm16 tmp2 cond tmp1 imm_true))
3286 (dst ValueRegs (value_reg tmp2)))
/wasmtime-44.0.1/cranelift/codegen/src/isa/riscv64/
H A Dinst.isle235 (tmp2 WritableReg)
286 (tmp2 WritableReg)
3055 (tmp2 WritableXReg (temp_writable_xreg))
3058 (_ Unit (emit (MInst.Brev8 rs ty step tmp tmp2 rd))))
H A Dlower.isle1165 (tmp2 XReg (gen_select_xreg (cmp_ltz tmp) (rv_not tmp) tmp))
1166 (tmp3 XReg (gen_clz tmp2)))
/wasmtime-44.0.1/cranelift/codegen/src/isa/aarch64/inst/
H A Dmod.rs3068 let tmp2 = regs::tmp2_reg(); in generate_veneer() localVariable
3075 let add = emit::enc_arith_rrr(0b10001011_000, 0, tmp1_w, tmp1, tmp2); in generate_veneer()