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/wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/sdiv/
H A Dbroken_sdiv_safe_const.isle13 ;; Sign == 1 and Zero == 0
17 (Sign)
22 (Sign #b0)
76 (a64_udiv $I64 (put_in_reg_sext64 x) (imm ty (ImmExtend.Sign) y)))
/wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/x86/
H A Damode_add_shl.isle14 (type ExtendKind (enum Sign Zero))
96 ;; Sign-extend-32-to-64(simm32) + base + (index << shift)
116 ;; Sign-extend-32-to-64(simm32) + base + (index << shift)
148 (spec (ExtendKind.Sign) (provide (= result #x0000000000000001)))
H A Damode_add_uextend_shl.isle16 (type ExtendKind (enum Sign Zero))
106 ;; Sign-extend-32-to-64(simm32) + base + (index << shift)
127 ;; Sign-extend-32-to-64(simm32) + base + (index << shift)
159 (spec (ExtendKind.Sign) (provide (= result #x0000000000000001)))
/wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/store/
H A Dbroken_bvsub_store_with_load.isle17 ;; Sign-extend-32-to-64(simm32) + base + (index << shift)
24 ;; Sign-extend-32-to-64(immediate) + RIP (instruction
H A Dbroken_isub_store_with_load.isle17 ;; Sign-extend-32-to-64(simm32) + base + (index << shift)
24 ;; Sign-extend-32-to-64(immediate) + RIP (instruction
/wasmtime-44.0.1/cranelift/isle/isle/isle_examples/pass/
H A Dprio_trie_bug.isle50 ;; Sign-extend-32-to-64(simm32) + base + (index << shift)
57 ;; Sign-extend-32-to-64(immediate) + RIP (instruction
/wasmtime-44.0.1/cranelift/codegen/src/isa/aarch64/lower/
H A Disle.rs301 (OperandSize::Size32, ImmExtend::Sign) if bits < 32 => { in load_constant_full()
313 (OperandSize::Size64, ImmExtend::Sign) if bits < 64 => { in load_constant_full()
/wasmtime-44.0.1/cranelift/codegen/src/opts/
H A Dextends.isle39 ;; Sign-extending can't change whether a number is zero nor how it signed-compares to zero
/wasmtime-44.0.1/cranelift/codegen/src/isa/pulley_shared/
H A Dinst.isle762 ;;;; Helpers for Sign extension ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
764 ;; Sign extend a `Value` to at least 32-bit
778 ;; Sign extend a `Value` to at least 64-bit
/wasmtime-44.0.1/cranelift/codegen/src/isa/riscv64/
H A Dinst_vector.isle986 ;; Helper for emitting the `vfsgnj.vv` ("Floating Point Sign Injection") instruction.
992 ;; Helper for emitting the `vfsgnj.vf` ("Floating Point Sign Injection") instruction.
997 ;; Helper for emitting the `vfsgnjn.vv` ("Floating Point Sign Injection Negated") instruction.
1008 ;; Helper for emitting the `vfsgnjx.vv` ("Floating Point Sign Injection Exclusive") instruction.
1436 ;; Sign-extend SEW/2 source to SEW destination
1442 ;; Sign-extend SEW/4 source to SEW destination
1448 ;; Sign-extend SEW/8 source to SEW destination
H A Dinst.isle1233 ;; Helper for emitting the `sext.w` ("Sign Extend Word") instruction.
1516 ;; Helper for emitting the `fsgnj` ("Floating Point Sign Injection") instruction.
1522 ;; Helper for emitting the `fsgnjn` ("Floating Point Sign Injection Negated") instruction.
1533 ;; Helper for emitting the `fsgnjx` ("Floating Point Sign Injection Exclusive") instruction.
/wasmtime-44.0.1/cranelift/codegen/src/isa/aarch64/
H A Dinst.isle1727 ;; Sign extend and add pair of elements
3586 (Sign #b0)
3590 (Sign)
3648 ;; Sign extension helpers ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
4465 (rule (signed_min $I8) (imm $I8 (ImmExtend.Sign) 0x80))
4466 (rule (signed_min $I16) (imm $I16 (ImmExtend.Sign) 0x8000))
4469 (rule (signed_max $I8) (imm $I8 (ImmExtend.Sign) 0x7F))
4470 (rule (signed_max $I16) (imm $I16 (ImmExtend.Sign) 0x7FFF))
5021 (tmp Reg (imm $I64 (ImmExtend.Sign) 1))) ;; mov tmp, #1
5031 (tmp Reg (imm $I64 (ImmExtend.Sign) 1)))
H A Dlower.isle1038 (imm ty (ImmExtend.Sign) n))
1101 (a64_sdiv $I64 (put_in_reg_sext64 x) (imm $I64 (ImmExtend.Sign) y)))
1105 (a64_sdiv ty (put_in_reg_sext32 x) (imm ty (ImmExtend.Sign) y)))
/wasmtime-44.0.1/cranelift/codegen/src/isa/x64/
H A Dlower.isle789 (let ((src_ Gpr (extend_to_gpr src ty (ExtendKind.Sign))))
2341 (let ((extended Gpr (extend_to_gpr src $I32 (ExtendKind.Sign)))
2636 (let ((lo Gpr (extend_to_gpr src $I64 (ExtendKind.Sign)))
2642 (extend_to_gpr src $I64 (ExtendKind.Sign)))
2647 (extend_to_gpr src $I32 (ExtendKind.Sign)))
3686 (x64_cvtsi2ss $I32 (xmm_zero $F32X4) (extend_to_gpr a $I32 (ExtendKind.Sign))))
3689 (x64_cvtsi2ss $I32 (xmm_zero $F32X4) (extend_to_gpr a $I32 (ExtendKind.Sign))))
3695 (x64_cvtsi2sd $I32 (xmm_zero $F64X2) (extend_to_gpr a $I32 (ExtendKind.Sign))))
3698 (x64_cvtsi2sd $I32 (xmm_zero $F64X2) (extend_to_gpr a $I32 (ExtendKind.Sign))))
H A Dinst.isle426 ;; Sign-extend-32-to-64(simm32) + base + (index << shift)
433 ;; Sign-extend-32-to-64(immediate) + RIP (instruction
1180 ;;;; Helpers for Sign/Zero Extending ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1187 (type ExtendKind (enum Sign Zero))
1264 ;; Sign extending uses `movsx`.
1265 (rule (extend (ExtendKind.Sign) ty mode src)
/wasmtime-44.0.1/cranelift/codegen/src/
H A Dprelude.isle94 ;; Sign extends a u64 from ty bits up to 64bits
/wasmtime-44.0.1/crates/cranelift/src/func_environ/gc/
H A Denabled.rs224 Some(Extension::Sign) => builder.ins().sextend(ir::types::I32, value), in read_field_at_addr()
/wasmtime-44.0.1/cranelift/codegen/src/isa/s390x/
H A Dinst.isle1317 ;; Sign operations
3139 ;; Sign-extend a register from a smaller `Type` into a 32-bit register.
3153 ;; Sign-extend a register from a smaller `Type` into a 64-bit register.
3172 ;; Sign-extend memory from a smaller `Type` into a 32-bit register.
3198 ;; Sign-extend memory from a smaller `Type` into a 64-bit register.
/wasmtime-44.0.1/cranelift/docs/
H A Dir.md579 #### Sign bit manipulations
/wasmtime-44.0.1/crates/cranelift/src/translate/
H A Dcode_translator.rs2734 Some(Extension::Sign), in translate_operator()
2903 Some(Extension::Sign), in translate_operator()
/wasmtime-44.0.1/crates/cranelift/src/
H A Dfunc_environ.rs40 Sign, enumerator