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Searched refs:Mask (Results 1 – 6 of 6) sorted by relevance

/wasmtime-44.0.1/cranelift/codegen/src/isa/riscv64/
H A Dinst_vector.isle35 ;; Mask Mode
39 ;; Mask Agnostic means that the masked out elements are left in an undefined state.
320 ;; Mask mode is set to agnostic.
1237 ;; Helper for emitting the `vmseq.vv` (Vector Mask Set If Equal) instruction.
1242 ;; Helper for emitting the `vmseq.vx` (Vector Mask Set If Equal) instruction.
1247 ;; Helper for emitting the `vmseq.vi` (Vector Mask Set If Equal) instruction.
1467 ;; Helper for emitting the `vmand.mm` (Mask Bitwise AND) instruction.
1474 ;; Helper for emitting the `vmor.mm` (Mask Bitwise OR) instruction.
1481 ;; Helper for emitting the `vmnand.mm` (Mask Bitwise NAND) instruction.
1488 ;; Helper for emitting the `vmnot.m` (Mask Bitwise NOT) instruction.
[all …]
/wasmtime-44.0.1/cranelift/interpreter/src/
H A Dvalue.rs160 Mask(Type), enumerator
475 ValueConversionKind::Mask(ty) => { in convert()
H A Dstep.rs1004 .map(|lane| lane.convert(ValueConversionKind::Mask(ctrl_ty.lane_type()))) in step()
/wasmtime-44.0.1/cranelift/codegen/src/isa/x64/
H A Dlower.isle619 ;; Mask the amount to ensure wrapping behaviour
725 ;; Mask the amount to ensure wrapping behaviour
848 ;; Mask the amount to ensure wrapping behaviour
2430 ;; Mask the above sum to have the popcount for each byte
H A Dinst.isle1047 ;; Mask a constant with the type's shift mask
/wasmtime-44.0.1/cranelift/codegen/src/isa/s390x/
H A Dinst.isle1792 ;; Mask (immediate) shift amount to the type size.
1796 ;; Mask (immediate) shift amount to the type size.