| /wasmtime-44.0.1/cranelift/codegen/src/isa/s390x/ |
| H A D | lower.rs | 6 use crate::machinst::{InstOutput, Lower, LowerBackend, MachLabel};
16 fn lower(&self, ctx: &mut Lower<Inst>, ir_inst: IRInst) -> Option<InstOutput> { in lower() argument
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| /wasmtime-44.0.1/cranelift/codegen/src/ |
| H A D | prelude_lower.isle | 14 (type InstOutput (primitive InstOutput))
58 ;; Construct an empty `InstOutput`.
59 (decl output_none () InstOutput)
62 ;; Construct a single-element `InstOutput`.
65 (decl output (ValueRegs) InstOutput)
68 ;; Construct a two-element `InstOutput`.
81 (decl output_reg (Reg) InstOutput)
85 (decl output_value (Value) InstOutput)
88 ;; Construct an `InstOutput` from a vector.
1192 (convert ValueRegs InstOutput output)
[all …]
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| /wasmtime-44.0.1/cranelift/codegen/src/isa/riscv64/ |
| H A D | lower.rs | 15 fn lower(&self, ctx: &mut Lower<Inst>, ir_inst: IRInst) -> Option<InstOutput> { in lower() argument
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| /wasmtime-44.0.1/cranelift/codegen/src/isa/pulley_shared/ |
| H A D | lower.rs | 17 fn lower(&self, ctx: &mut Lower<Self::MInst>, ir_inst: ir::Inst) -> Option<InstOutput> { in lower() argument
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/cls/ |
| H A D | broken_cls.isle | 3 (decl lower (Inst) InstOutput)
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| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/clz/ |
| H A D | broken_clz.isle | 3 (decl lower (Inst) InstOutput)
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/isub/ |
| H A D | broken_base_case.isle | 3 (decl lower (Inst) InstOutput)
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| H A D | broken_imm12.isle | 3 (decl lower (Inst) InstOutput)
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| H A D | broken_imm12neg_not_distinct.isle | 3 (decl lower (Inst) InstOutput)
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/iadd/ |
| H A D | broken_base_case.isle | 3 (decl lower (Inst) InstOutput)
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| H A D | broken_msub.isle | 3 (decl lower (Inst) InstOutput)
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| H A D | broken_madd2.isle | 3 (decl lower (Inst) InstOutput)
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| H A D | broken_madd.isle | 3 (decl lower (Inst) InstOutput)
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| H A D | broken_imm12.isle | 3 (decl lower (Inst) InstOutput)
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| H A D | broken_imm12_2.isle | 3 (decl lower (Inst) InstOutput)
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/constructs/ |
| H A D | if-let.isle | 2 (decl lower (Inst) InstOutput)
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/ |
| H A D | broken_32_general_rotl_to_rotr.isle | 3 (decl lower (Inst) InstOutput)
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| H A D | broken_uextend.isle | 3 (decl lower (Inst) InstOutput)
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| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/ctz/ |
| H A D | broken_ctz.isle | 3 (decl lower (Inst) InstOutput)
|
| /wasmtime-44.0.1/cranelift/codegen/src/machinst/ |
| H A D | isle.rs | 27 pub type InstOutput = SmallVec<[ValueRegs; 2]>; typedef
75 fn output_none(&mut self) -> InstOutput {
80 fn output(&mut self, regs: ValueRegs) -> InstOutput {
85 fn output_pair(&mut self, r1: ValueRegs, r2: ValueRegs) -> InstOutput {
90 fn output_vec(&mut self, output: &ValueRegsVec) -> InstOutput {
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| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/udiv/ |
| H A D | broken_udiv.isle | 3 (decl lower (Inst) InstOutput)
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| H A D | udiv_cve.isle | 3 (decl lower (Inst) InstOutput)
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| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/iadd/ |
| H A D | updated_iadd_imm12neg_right.isle | 2 (decl lower (Inst) InstOutput)
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| H A D | updated_iadd_imm12neg_left.isle | 2 (decl lower (Inst) InstOutput)
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| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/isub/ |
| H A D | imm12neg_new.isle | 3 (decl lower (Inst) InstOutput)
|