Home
last modified time | relevance | path

Searched refs:GET_REG_MASK (Results 1 – 3 of 3) sorted by relevance

/pciutils/lmr/
H A Dmargin.c140 return GET_REG_MASK(*result, LMR_CMD_TYPE) == GET_REG_MASK(cmd, LMR_CMD_TYPE) in margin_report_cmd()
141 && GET_REG_MASK(*result, LMR_CMD_RECVN) == GET_REG_MASK(cmd, LMR_CMD_RECVN) in margin_report_cmd()
173 params->volt_support = GET_REG_MASK(resp, LMR_PLD_VOLT_SUPPORT); in read_params_internal()
182 params->volt_steps = GET_REG_MASK(resp, LMR_PLD_MAX_V_STEPS); in read_params_internal()
187 params->timing_steps = GET_REG_MASK(resp, LMR_PLD_MAX_T_STEPS); in read_params_internal()
192 params->timing_offset = GET_REG_MASK(resp, LMR_PLD_MAX_OFFSET); in read_params_internal()
197 params->volt_offset = GET_REG_MASK(resp, LMR_PLD_MAX_OFFSET); in read_params_internal()
202 params->sample_rate_v = GET_REG_MASK(resp, LMR_PLD_SAMPLE_RATE); in read_params_internal()
207 params->sample_rate_t = GET_REG_MASK(resp, LMR_PLD_SAMPLE_RATE); in read_params_internal()
211 params->max_lanes = GET_REG_MASK(resp, LMR_PLD_MAX_LANES); in read_params_internal()
[all …]
H A Dmargin_hw.c44 u8 dir = GET_REG_MASK(pci_read_word(dev, cap->addr + PCI_EXP_FLAGS), PCI_EXP_FLAGS_TYPE); in margin_port_is_down()
119 .neg_width = GET_REG_MASK(pci_read_word(dev, cap->addr + PCI_EXP_LNKSTA), PCI_EXP_LNKSTA_WIDTH), in fill_dev_wrapper()
120 .max_width = GET_REG_MASK(pci_read_long(dev, cap->addr + PCI_EXP_LNKCAP), PCI_EXP_LNKCAP_WIDTH), in fill_dev_wrapper()
/pciutils/
H A Dbitops.h32 #define GET_REG_MASK(reg, mask) (((reg) & (mask)) / ((mask) & ~((mask) << 1))) macro