Searched refs:first_and (Results 1 – 1 of 1) sorted by relevance
| /oneTBB/examples/graph/logic_sim/ |
| H A D | D_latch.hpp | 27 and_gate<2> first_and; member in D_latch
43 first_and(g), in D_latch()
49 make_edge(E_port, input_port<1>(first_and)); in D_latch()
51 make_edge(a_not, input_port<0>(first_and)); in D_latch()
52 make_edge(first_and, input_port<0>(first_nor)); in D_latch()
63 D_port, E_port, a_not, first_and, second_and, first_nor, second_nor); in D_latch()
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