Home
last modified time | relevance | path

Searched refs:S2 (Results 1 – 2 of 2) sorted by relevance

/oneTBB/examples/graph/logic_sim/
H A Done_bit_adder.hpp35 const int S2 = 2; variable
H A Dtest_all.cpp569 make_edge(output_port<P::S2>(four_adder), input_port<2>(Sum)); in main()