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/oneTBB/examples/graph/logic_sim/
H A Done_bit_adder.hpp34 const int S1 = 1; variable
H A Dtest_all.cpp517 make_edge(output_port<P::S1>(two_adder), input_port<1>(Sum)); in main()
565 make_edge(output_port<P::S1>(four_adder), input_port<1>(Sum)); in main()