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Searched refs:FirstAND (Results 1 – 1 of 1) sorted by relevance

/oneTBB/examples/graph/logic_sim/
H A Done_bit_adder.hpp55 and_gate<2> FirstAND; member in one_bit_adder
72 FirstAND(g), in one_bit_adder()
86 FirstAND(src.my_graph), in one_bit_adder()
98 make_edge(A_port, input_port<0>(FirstAND)); in make_connections()
100 make_edge(B_port, input_port<1>(FirstAND)); in make_connections()
106 make_edge(FirstAND, input_port<1>(FirstOR)); in make_connections()
115 A_port, B_port, CI_port, FirstXOR, SecondXOR, FirstAND, SecondAND, FirstOR); in set_up_composite()