Searched refs:B2 (Results 1 – 2 of 2) sorted by relevance
| /oneTBB/examples/graph/logic_sim/ | ||
| H A D | one_bit_adder.hpp | 28 const int B2 = 6; variable |
| H A D | test_all.cpp | 568 make_edge(B[2].get_out(), input_port<P::B2>(four_adder)); in main() |