Searched refs:zexta (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/test/Transforms/AggressiveInstCombine/ |
| H A D | trunc_vector_instrs.ll | 12 %zexta = zext <2 x i8> %a to <2 x i32>
14 %shuf = shufflevector <2 x i32> %zexta, <2 x i32> %zextb, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
26 %zexta = zext <2 x i8> %a to <2 x i32>
27 %shuf = shufflevector <2 x i32> %zexta, <2 x i32> undef, <2 x i32> <i32 1, i32 0>
52 %zexta = zext <2 x i8> %a to <2 x i32>
54 %extr = extractelement <2 x i32> %zexta, i32 0
66 %zexta = zext i8 %a to i32
67 %insr = insertelement <2 x i32> poison, i32 %zexta, i32 0
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| /llvm-project-15.0.7/mlir/lib/Dialect/AMX/Transforms/ |
| H A D | LegalizeForLLVMExport.cpp | 190 bool zexta = op.getIsZextLhs(); in matchAndRewrite() local
192 if (zexta && zextb) in matchAndRewrite()
196 else if (zexta && !zextb) in matchAndRewrite()
200 else if (!zexta && zextb) in matchAndRewrite()
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | codegen-prepare-extload.ll | 266 ; a. This creates one sext of %zexta and one of %zextld
267 ; b. The sext of %zexta can be combined with the zext of %a.
271 ; => We have created a new zext of %ld and we created one sext of %zexta.
313 %zexta = zext i8 %a to i32
314 %addza = add nsw i32 %zexta, %zextld
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | arm64-codegen-prepare-extload.ll | 260 ; a. This creates one sext of %zexta and one of %zextld
261 ; b. The sext of %zexta can be combined with the zext of %a.
265 ; => We have created a new zext of %ld and we created one sext of %zexta.
307 %zexta = zext i8 %a to i32
308 %addza = add nsw i32 %zexta, %zextld
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