x4 (reference) in projects: llvm-project-15.0.7

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Searched refs:x4 (Results 1 – 25 of 968) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...39

/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A D	fold-frame-offset-using-rr.mir	`22 $x4 = ADD8 killed $x3, killed $x4 24 $x6 = LD 4, killed $x4 90 $x4 = ADD8 $x3, killed $x4 91 ; CHECK: $x4 = ADD8 $x3, killed $x4 94 $x6 = LD 4, killed $x4 108 $x4 = ADD8 killed $x3, killed $x4 109 ; CHECK: $x4 = ADD8 killed $x3, killed $x4 110 $x6 = LD 4, $x4 131 $x6 = LD 4, killed $x4 151 $x6 = LD 4, killed $x4 [all …]`
H A D	machine-backward-cp.mir	`16 renamable $x4 = LI8 1024 33 ; CHECK: liveins: $x4 44 liveins: $x4 61 renamable $x4 = LI8 1024 79 renamable $x4 = LI8 0 101 renamable $x4 = LI8 0 123 renamable $x4 = LI8 0 141 ; CHECK: $x3 = COPY $x4 157 liveins: $x4, $x7 178 liveins: $x4, $x7 [all …]`
H A D	macro-fusion.mir	`14 liveins: $x3, $x4, $x5 15 renamable $x4 = MULLD $x3, $x4 27 liveins: $x3, $x4, $x5 28 renamable $x4 = ADD8 $x3, $x4 40 liveins: $x3, $x4, $x5 41 renamable $x4 = XOR8 $x3, $x4 53 liveins: $x3, $x4, $x5 54 renamable $x4 = OR8 $x3, $x4 92 liveins: $x3, $x4, $x5 105 liveins: $x3, $x4, $x5 [all …]`
H A D	ldst-16-byte.mir	`11 liveins: $x3, $x4 13 ; CHECK: liveins: $x3, $x4 18 %0:g8prc = LQ 128, $x4 30 liveins: $x3, $x4 32 ; CHECK: liveins: $x3, $x4 37 %0:g8prc = LQARX $x3, $x4 49 liveins: $x3, $x4 51 ; CHECK: liveins: $x3, $x4 54 ; CHECK: $x3 = OR8 $x4, $x4, implicit killed $g8p2 166 %addr1:g8rc = COPY $x4 [all …]`
H A D	remove-redundant-li-implicit-reg.mir	`9 liveins: $x3, $x4, $x5 13 renamable $x4 = exact SRD killed renamable $x4, killed renamable $r5, implicit $x5 14 STD $x4, $x4, 100 20 ; CHECK: renamable $x4 = exact RLDICL killed renamable $x4, 62, 2 21 ; CHECK: STD killed $x4, $x4, 100`
H A D	expand-isel-liveness.mir	10 - { reg: '$x4', virtual-reg: '' } 15 liveins: $x3, $x4, $x5, $x6 17 renamable $x8 = MULLD renamable $x5, renamable $x4 26 renamable $x8 = MULHDU renamable $x4, renamable $x6 32 dead renamable $x5 = MULHDU_rec killed renamable $x5, renamable $x4, implicit-def $cr0 35 renamable $x4 = MULLD killed renamable $x4, killed renamable $x6 37 BLR8 implicit $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5 41 ; CHECK: liveins: $x3, $x4, $x7 45 ; CHECK: liveins: $x3, $x4 48 ; CHECK: liveins: $x3, $x4, $x5 [all …]
H A D	topdepthreduce-postra.mir	`11 ; CHECK: renamable $x4 = LD 0, killed renamable $x4 :: (load (s64)) 13 … ; CHECK: renamable $x3 = MADDLD8 killed renamable $x4, killed renamable $x3, killed renamable $x5 16 renamable $x4 = LD 0, killed renamable $x4 :: (load (s64)) 17 renamable $x3 = MADDLD8 killed renamable $x4, killed renamable $x3, killed renamable $x5`
H A D	remove-redundant-load-imm.mir	`137 ; CHECK: renamable $x4 = LI8 1 139 ; CHECK: STD renamable $x4, 24, $x1 144 renamable $x4 = LI8 1 146 STD killed renamable $x4, 24, $x1 148 renamable $x4 = LI8 1 150 STD killed renamable $x4, 8, $x1 161 liveins: $x1, $x4 164 ; CHECK: liveins: $x1, $x4 171 renamable $x3 = ADDI8 $x4, 6 341 renamable $x4 = ADDI8 $x1, -128 [all …]`
/llvm-project-15.0.7/clang/test/CodeGen/aarch64-sve-intrinsics/
H A D	acle_sve_create4.c	30 return SVE_ACLE_FUNC(svcreate4,_s8,,)(x0, x1, x2, x4); in test_svcreate4_s8() 45 return SVE_ACLE_FUNC(svcreate4,_s16,,)(x0, x1, x2, x4); in test_svcreate4_s16() 60 return SVE_ACLE_FUNC(svcreate4,_s32,,)(x0, x1, x2, x4); in test_svcreate4_s32() 75 return SVE_ACLE_FUNC(svcreate4,_s64,,)(x0, x1, x2, x4); in test_svcreate4_s64() 90 return SVE_ACLE_FUNC(svcreate4,_u8,,)(x0, x1, x2, x4); in test_svcreate4_u8() 105 return SVE_ACLE_FUNC(svcreate4,_u16,,)(x0, x1, x2, x4); in test_svcreate4_u16() 120 return SVE_ACLE_FUNC(svcreate4,_u32,,)(x0, x1, x2, x4); in test_svcreate4_u32() 135 return SVE_ACLE_FUNC(svcreate4,_u64,,)(x0, x1, x2, x4); in test_svcreate4_u64() 150 return SVE_ACLE_FUNC(svcreate4,_f16,,)(x0, x1, x2, x4); in test_svcreate4_f16() 165 return SVE_ACLE_FUNC(svcreate4,_f32,,)(x0, x1, x2, x4); in test_svcreate4_f32() [all …]
H A D	acle_sve_dupq.c	227 int8_t x4, int8_t x5, int8_t x6, int8_t x7, in test_svdupq_n_s8() argument 264 int16_t x4, int16_t x5, int16_t x6, int16_t x7) in test_svdupq_n_s16() argument 267 return SVE_ACLE_FUNC(svdupq,_n,_s16,)(x0, x1, x2, x3, x4, x5, x6, x7); in test_svdupq_n_s16() 362 uint8_t x4, uint8_t x5, uint8_t x6, uint8_t x7, in test_svdupq_n_u8() argument 399 uint16_t x4, uint16_t x5, uint16_t x6, uint16_t x7) in test_svdupq_n_u16() argument 402 return SVE_ACLE_FUNC(svdupq,_n,_u16,)(x0, x1, x2, x3, x4, x5, x6, x7); in test_svdupq_n_u16() 481 float16_t x4, float16_t x5, float16_t x6, float16_t x7) in test_svdupq_n_f16() argument 484 return SVE_ACLE_FUNC(svdupq,_n,_f16,)(x0, x1, x2, x3, x4, x5, x6, x7); in test_svdupq_n_f16() 615 bool x4, bool x5, bool x6, bool x7, in test_svdupq_n_b8() argument 674 bool x4, bool x5, bool x6, bool x7) in test_svdupq_n_b16() argument [all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/
H A D	selects-inseltpoison.ll	`31 %base.x4.p1 = add i32 %base.x4, 1 32 %base.x4.p2 = add i32 %base.x4, 2 33 %base.x4.p3 = add i32 %base.x4, 3 34 %zext.x4 = zext i32 %base.x4 to i64 35 %zext.x4.p1 = zext i32 %base.x4.p1 to i64 36 %zext.x4.p2 = zext i32 %base.x4.p2 to i64 37 %zext.x4.p3 = zext i32 %base.x4.p3 to i64 71 %base.x4.p5 = add i32 %base.x4, 5 72 %base.x4.p6 = add i32 %base.x4, 6 77 %sext.x4.p5 = sext i32 %base.x4.p5 to i64 [all …]`
H A D	selects.ll	`31 %base.x4.p1 = add i32 %base.x4, 1 32 %base.x4.p2 = add i32 %base.x4, 2 33 %base.x4.p3 = add i32 %base.x4, 3 34 %zext.x4 = zext i32 %base.x4 to i64 35 %zext.x4.p1 = zext i32 %base.x4.p1 to i64 36 %zext.x4.p2 = zext i32 %base.x4.p2 to i64 37 %zext.x4.p3 = zext i32 %base.x4.p3 to i64 71 %base.x4.p5 = add i32 %base.x4, 5 72 %base.x4.p6 = add i32 %base.x4, 6 77 %sext.x4.p5 = sext i32 %base.x4.p5 to i64 [all …]`
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A D	arm64-memory.s	`8 ldr w5, [x4, #20] 9 ldr x4, [x3] 17 ldrb w5, [x4, #20] 81 str x4, [x3] 141 stur x4, [x3] 194 sttr x4, [x3] 443 ldr x4, foo 510 ldaxr w2, [x4] 511 ldaxr x2, [x4] 513 ldaxrh w2, [x4] [all …]`
H A D	tme-error.s	`7 tstart x4, x5 10 tstart x4, #1 20 ttest x4, x5 23 ttest x4, #1 30 tcommit x4`
H A D	arm64-arithmetic-encoding.s	`11 adcs x5, x4, x3 34 add x3, x4, #1024 35 add x3, x4, #1024, lsl #0 46 add x3, x4, #4194304 47 add x3, x4, #0, lsl #12 61 adds x3, x4, #1024 75 sub x3, x4, #1024 91 subs x3, x4, #1024 461 madd x1, x2, x3, x4 463 msub x1, x2, x3, x4 [all …]`
/llvm-project-15.0.7/lldb/test/API/functionalities/postmortem/FreeBSDKernel/
H A D	kernel-i386.yaml	`38 Size: 0x4 44 Size: 0x4 50 Size: 0x4 56 Size: 0x4 62 Size: 0x4 68 Size: 0x4 74 Size: 0x4 80 Size: 0x4 86 Size: 0x4 92 Size: 0x4 [all …]`
H A D	kernel-arm64.yaml	`36 Size: 0x4 42 Size: 0x4 48 Size: 0x4 54 Size: 0x4 60 Size: 0x4 66 Size: 0x4 72 Size: 0x4 78 Size: 0x4 84 Size: 0x4 90 Size: 0x4 [all …]`
H A D	kernel-amd64.yaml	`44 Size: 0x4 50 Size: 0x4 56 Size: 0x4 62 Size: 0x4 68 Size: 0x4 74 Size: 0x4 80 Size: 0x4 86 Size: 0x4 92 Size: 0x4 98 Size: 0x4 [all …]`
/llvm-project-15.0.7/llvm/test/Bitcode/
H A D	binaryFloatInstructions.3.2.ll	8 define void @fadd(float %x1, double %x2 ,half %x3, fp128 %x4, x86_fp80 %x5, ppc_fp128 %x6){ 19 ; CHECK-NEXT: %res4 = fadd fp128 %x4, %x4 20 %res4 = fadd fp128 %x4, %x4 31 define void @faddFloatVec(<2 x float> %x1, <3 x float> %x2 ,<4 x float> %x3, <8 x float> %x4, <16 x… 42 ; CHECK-NEXT: %res4 = fadd <8 x float> %x4, %x4 43 %res4 = fadd <8 x float> %x4, %x4 62 ; CHECK-NEXT: %res4 = fadd <8 x double> %x4, %x4 63 %res4 = fadd <8 x double> %x4, %x4 71 define void @faddHalfVec(<2 x half> %x1, <3 x half> %x2 ,<4 x half> %x3, <8 x half> %x4, <16 x half… 82 ; CHECK-NEXT: %res4 = fadd <8 x half> %x4, %x4 [all …]
H A D	binaryIntInstructions.3.2.ll	`8 define void @add(i1 %x1, i8 %x2 ,i16 %x3, i32 %x4, i64 %x5){ 19 ; CHECK-NEXT: %res4 = add i32 %x4, %x4 20 %res4 = add i32 %x4, %x4 48 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i8> %x4, %x4 49 %res4 = add nuw nsw <8 x i8> %x4, %x4 68 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i16> %x4, %x4 69 %res4 = add nuw nsw <8 x i16> %x4, %x4 88 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i32> %x4, %x4 89 %res4 = add nuw nsw <8 x i32> %x4, %x4 108 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i64> %x4, %x4 [all …]`
/llvm-project-15.0.7/compiler-rt/test/hwasan/TestCases/
H A D	realloc-test.cpp	`40 char x4 = (char)REALLOC(x3, 5); in main() local 41 assert(x4 != x3); in main() 42 assert(x4[0] == 10 && x4[1] == 20 && x4[2] == 30 && x4[3] == 40 && in main() 43 x4[4] == 50); in main()`
/llvm-project-15.0.7/libc/src/math/generic/
H A D	sincosf_utils.h	`48 double x3, x4, x5, x6, s, c, c1, c2, s1; in sincosf_poly() local 50 x4 = x2 * x2; in sincosf_poly() 62 x6 = x4 * x2; in sincosf_poly() 65 c = c1 + x4 * p->c2; in sincosf_poly() 74 double x3, x4, x6, x7, s, c, c1, c2, s1; in sinf_poly() local 85 x4 = x2 * x2; in sinf_poly() 89 x6 = x4 * x2; in sinf_poly() 90 c = c1 + x4 * p->c2; in sinf_poly()`
/llvm-project-15.0.7/llvm/test/DebugInfo/X86/
H A D	stack-value-piece.ll	22 … [{{.}}, {{.}}): DW_OP_reg5 RDI, DW_OP_piece 0x4, DW_OP_lit0, DW_OP_stack_value, DW_OP_piece … 29 …}}): DW_OP_reg17 XMM0, DW_OP_piece 0x4, {{(DW_OP_lit0, DW_OP_stack_value, DW_OP_piece 0x4\|DW_OP_i… 30 …: [{{.}}, {{.}}): DW_OP_piece 0x4, {{(DW_OP_lit0, DW_OP_stack_value, DW_OP_piece 0x4\|DW_OP_i… 35 …: ({{.}}, {{.}}): DW_OP_reg5 RDI, DW_OP_piece 0x4, DW_OP_lit0, DW_OP_stack_value, DW_OP_piece … 37 ….}}): DW_OP_reg17 XMM0, DW_OP_piece 0x4, {{DW_OP_lit0, DW_OP_stack_value, DW_OP_piece 0x4\|DW_OP_i…
H A D	stack-value-piece-inseltpoison.ll	22 … [{{.}}, {{.}}): DW_OP_reg5 RDI, DW_OP_piece 0x4, DW_OP_lit0, DW_OP_stack_value, DW_OP_piece … 29 …}}): DW_OP_reg17 XMM0, DW_OP_piece 0x4, {{(DW_OP_lit0, DW_OP_stack_value, DW_OP_piece 0x4\|DW_OP_i… 30 …: [{{.}}, {{.}}): DW_OP_piece 0x4, {{(DW_OP_lit0, DW_OP_stack_value, DW_OP_piece 0x4\|DW_OP_i… 35 …: ({{.}}, {{.}}): DW_OP_reg5 RDI, DW_OP_piece 0x4, DW_OP_lit0, DW_OP_stack_value, DW_OP_piece … 37 ….}}): DW_OP_reg17 XMM0, DW_OP_piece 0x4, {{DW_OP_lit0, DW_OP_stack_value, DW_OP_piece 0x4\|DW_OP_i…
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/AArch64/Exynos/
H A D	divide-multiply.s	`10 msub x3, x4, x5, x6 12 smull x4, w5, w6 51 # EM3-NEXT: 1 4 1.00 msub x3, x4, x5, x6 52 # EM3-NEXT: 1 3 0.50 smull x4, w5, w6 58 # EM4-NEXT: 1 4 1.00 msub x3, x4, x5, x6 59 # EM4-NEXT: 1 3 0.50 smull x4, w5, w6 65 # EM5-NEXT: 1 3 1.00 msub x3, x4, x5, x6 66 # EM5-NEXT: 1 2 0.50 smull x4, w5, w6`

12 3 4 5 6 7 8 9 10 >>...39

TaskScheduler
dpdk
expo
f-stack
freebsd-12.1
freebsd-13.1
freebsd-14.2
iperf
leveldb-1.20
libedit-20250104-3.1
libev
libevent-2.1.12
libpciaccess
libtiff-4.0.7
lighttpd1.4
linux-6.15
llvm-project-15.0.7
mOS-networking-stack
memcached-1.4.29
memcached-1.6.32
oneTBB
pciutils
potrace-1.14
redis-3.2.3
rocksdb-6.9
rust-libc-0.2.174
sqlite-3.40.0
tonic
vim-8.2.3635
wasmtime-44.0.1
webrtc
xiu
xnu-11215