| /llvm-project-15.0.7/libcxx/utils/ |
| H A D | generate_feature_test_macro_components.py | 1126 widths = []
1129 widths += [cell_width]
1130 return widths
1149 def add_divider(widths, header_flag): argument
1151 return ' '.join(['='*w for w in widths])
1153 return '-'.join(['-'*w for w in widths])
1155 return ' '.join(['-'*w for w in widths])
|
| /llvm-project-15.0.7/libcxx/docs/Status/ |
| H A D | Ranges.rst | 32 :widths: auto
37 :widths: auto
56 :widths: auto
|
| H A D | Cxx14.rst | 39 :widths: auto
50 :widths: auto
|
| H A D | Cxx2b.rst | 38 :widths: auto
48 :widths: auto
|
| H A D | Format.rst | 33 :widths: auto
49 :widths: auto
|
| H A D | Spaceship.rst | 33 :widths: auto
53 :widths: auto
|
| H A D | Cxx17.rst | 39 :widths: auto
55 :widths: auto
|
| H A D | Cxx20.rst | 39 :widths: auto
62 :widths: auto
|
| H A D | Zip.rst | 29 :widths: auto
|
| /llvm-project-15.0.7/clang/test/Analysis/ |
| H A D | solver-sym-simplification-ptr-bool.cl | 16 …lvm::APInt &) const: Assertion `BitWidth == RHS.BitWidth && "Comparison requires equal bit widths"'
|
| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/msa/ |
| H A D | llvm-stress-s449609655-simplified.ll | 9 ; "Comparison requires equal bit widths" assertion.
|
| /llvm-project-15.0.7/libcxx/docs/ |
| H A D | FeatureTestMacroTable.rst | 22 :widths: auto
|
| /llvm-project-15.0.7/openmp/docs/remarks/ |
| H A D | OptimizationRemarks.rst | 46 :widths: 15 15 70
|
| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | pr48215.ll | 6 ; FIXME: Ensure when we merge broadcasts to different widths that they come from the same SDValue.
|
| H A D | urem-seteq-nonzero.ll | 249 ; Other widths.
|
| /llvm-project-15.0.7/mlir/include/mlir/IR/ |
| H A D | OpBase.td | 362 class AnyIntOfWidths<list<int> widths> :
363 AnyTypeOf<!foreach(w, widths, AnyI<w>),
386 class SignlessIntOfWidths<list<int> widths> :
387 AnyTypeOf<!foreach(w, widths, I<w>),
409 class SignedIntOfWidths<list<int> widths> :
410 AnyTypeOf<!foreach(w, widths, SI<w>),
432 class UnsignedIntOfWidths<list<int> widths> :
433 AnyTypeOf<!foreach(w, widths, UI<w>),
465 class FloatOfWidths<list<int> widths> :
466 AnyTypeOf<!foreach(w, widths, F<w>),
[all …]
|
| /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/AArch64/ |
| H A D | smallest-and-widest-types.ll | 37 ; chosen. The following 3 cases check different combinations of widths.
|
| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | sat-to-bitop.ll | 8 ; Base tests with different bit widths
130 ; Base tests with different bit widths
|
| /llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/readability/ |
| H A D | magic-numbers.rst | 116 Boolean value indicating whether to accept magic numbers as bit field widths
|
| /llvm-project-15.0.7/clang/test/SemaOpenCL/ |
| H A D | cond.cl | 15 // all scalars, but widths do not match.
|
| /llvm-project-15.0.7/mlir/test/Dialect/SPIRV/IR/ |
| H A D | cast-ops.mlir | 234 …// expected-error @+1 {{expected the different bit widths for operand type and result type, but pr…
|
| /llvm-project-15.0.7/polly/www/video-js/ |
| H A D | video-js.css | 104 /* Height of play icon is total top & bottom border widths. Color is transparent. */
218 /* Height of play icon is total top & bottom border widths. Color is transparent. */
|
| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | urem-seteq-nonzero.ll | 191 ; Other widths.
|
| /llvm-project-15.0.7/llvm/docs/ |
| H A D | GettingInvolved.rst | 152 :widths: 25 25 25 25
245 :widths: 15 40 15 15 15
|
| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | builtin-dynamic-object-size.ll | 157 ; Gracefully handle AS cast when the address spaces have different pointer widths.
|