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/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEInstrIntrinsicVL.gen.td1207 … Pat<(int_ve_vl_vfmkdgt_mvml v256f64:$vz, v256i1:$vm, i32:$vl), (VFMKDvml CC_G, v256f64:$vz, v256i…
1209 … Pat<(int_ve_vl_vfmkdlt_mvml v256f64:$vz, v256i1:$vm, i32:$vl), (VFMKDvml CC_L, v256f64:$vz, v256i…
1235 … Pat<(int_ve_vl_vfmksgt_mvml v256f64:$vz, v256i1:$vm, i32:$vl), (VFMKSvml CC_G, v256f64:$vz, v256i…
1347 … : Pat<(int_ve_vl_vsumwsx_vvml v256f64:$vy, v256i1:$vm, i32:$vl), (VSUMWSXvml v256f64:$vy, v256i1:…
1349 … : Pat<(int_ve_vl_vsumwzx_vvml v256f64:$vy, v256i1:$vm, i32:$vl), (VSUMWZXvml v256f64:$vy, v256i1:…
1351 def : Pat<(int_ve_vl_vsuml_vvml v256f64:$vy, v256i1:$vm, i32:$vl), (VSUMLvml v256f64:$vy, v256i1:$v…
1353 …f : Pat<(int_ve_vl_vfsumd_vvml v256f64:$vy, v256i1:$vm, i32:$vl), (VFSUMDvml v256f64:$vy, v256i1:$…
1355 …f : Pat<(int_ve_vl_vfsums_vvml v256f64:$vy, v256i1:$vm, i32:$vl), (VFSUMSvml v256f64:$vy, v256i1:$…
1397 def : Pat<(int_ve_vl_vrand_vvml v256f64:$vy, v256i1:$vm, i32:$vl), (VRANDvml v256f64:$vy, v256i1:$v…
1399 def : Pat<(int_ve_vl_vror_vvml v256f64:$vy, v256i1:$vm, i32:$vl), (VRORvml v256f64:$vy, v256i1:$vm,…
[all …]
H A DVEInstrIntrinsicVL.td18 def : Pat<(v256i1 (int_ve_vl_extract_vm512u v512i1:$vm)),
19 (EXTRACT_SUBREG v512i1:$vm, sub_vm_even)>;
21 def : Pat<(v256i1 (int_ve_vl_extract_vm512l v512i1:$vm)),
22 (EXTRACT_SUBREG v512i1:$vm, sub_vm_odd)>;
31 def : Pat<(int_ve_vl_vmrgw_vsvMl i32:$sy, v256f64:$vz, v512i1:$vm, i32:$vl),
32 (VMRGWrvml (i2l i32:$sy), v256f64:$vz, v512i1:$vm, i32:$vl)>;
33 def : Pat<(int_ve_vl_vmrgw_vsvMvl i32:$sy, v256f64:$vz, v512i1:$vm,
35 (VMRGWrvml_v (i2l i32:$sy), v256f64:$vz, v512i1:$vm, i32:$vl,
43 def : Pat<(int_ve_vl_vmv_vsvmvl i32:$sy, v256f64:$vz, v256i1:$vm, v256f64:$pt,
45 (VMVrvml_v (i2l i32:$sy), v256f64:$vz, v256i1:$vm, i32:$vl,
H A DVEInstrPatternsVec.td133 def : Pat<(v256i1 (vec_unpack_lo v512i1:$vm, (i32 srcvalue))),
134 (EXTRACT_SUBREG $vm, sub_vm_odd)>;
135 def : Pat<(v256i1 (vec_unpack_hi v512i1:$vm, (i32 srcvalue))),
136 (EXTRACT_SUBREG $vm, sub_vm_even)>;
/llvm-project-15.0.7/clang/lib/Headers/
H A Dvelintrin.h66 #define _vel_extract_vm512u(vm) __builtin_ve_vl_extract_vm512u(vm) argument
67 #define _vel_extract_vm512l(vm) __builtin_ve_vl_extract_vm512l(vm) argument
68 #define _vel_insert_vm512u(vm512, vm) __builtin_ve_vl_insert_vm512u(vm512, vm) argument
69 #define _vel_insert_vm512l(vm512, vm) __builtin_ve_vl_insert_vm512l(vm512, vm) argument
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/
H A Dvfcopysign-sdnode.ll19 define <vscale x 1 x half> @vfcopysign_vf_nxv1f16(<vscale x 1 x half> %vm, half %s) {
42 define <vscale x 1 x half> @vfcopynsign_vf_nxv1f16(<vscale x 1 x half> %vm, half %s) {
191 define <vscale x 2 x half> @vfcopysign_vf_nxv2f16(<vscale x 2 x half> %vm, half %s) {
214 define <vscale x 2 x half> @vfcopynsign_vf_nxv2f16(<vscale x 2 x half> %vm, half %s) {
239 define <vscale x 4 x half> @vfcopysign_vf_nxv4f16(<vscale x 4 x half> %vm, half %s) {
262 define <vscale x 4 x half> @vfcopynsign_vf_nxv4f16(<vscale x 4 x half> %vm, half %s) {
287 define <vscale x 8 x half> @vfcopysign_vf_nxv8f16(<vscale x 8 x half> %vm, half %s) {
310 define <vscale x 8 x half> @vfcopynsign_vf_nxv8f16(<vscale x 8 x half> %vm, half %s) {
459 define <vscale x 16 x half> @vfcopysign_vf_nxv16f16(<vscale x 16 x half> %vm, half %s) {
507 define <vscale x 32 x half> @vfcopysign_vf_nxv32f16(<vscale x 32 x half> %vm, half %s) {
[all …]
H A Dvcompress.ll16 ; CHECK-NEXT: vcompress.vm v8, v9, v0
38 ; CHECK-NEXT: vcompress.vm v8, v9, v0
60 ; CHECK-NEXT: vcompress.vm v8, v9, v0
82 ; CHECK-NEXT: vcompress.vm v8, v9, v0
104 ; CHECK-NEXT: vcompress.vm v8, v10, v0
126 ; CHECK-NEXT: vcompress.vm v8, v12, v0
148 ; CHECK-NEXT: vcompress.vm v8, v16, v0
170 ; CHECK-NEXT: vcompress.vm v8, v9, v0
192 ; CHECK-NEXT: vcompress.vm v8, v9, v0
214 ; CHECK-NEXT: vcompress.vm v8, v9, v0
[all …]
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoV.td229 let vm = 1 in {
243 } // vm = 1
289 let vm = 0;
303 let vm = 1;
317 let vm = 0;
331 let vm = 1;
345 let vm = 0;
353 let vm = 1;
1271 let vm = 0 in
1441 (ins VMaskOp:$vm), "vid.v", "$vd$vm">,
[all …]
H A DRISCVInstrFormatsV.td112 bit vm;
132 bit vm;
151 bit vm;
171 bit vm;
190 bit vm;
210 bit vm;
232 bit vm;
254 bit vm;
276 bit vm;
297 bit vm;
[all …]
/llvm-project-15.0.7/llvm/utils/
H A Dcheck_ninja_deps.py107 vm = translate(v)
110 a[v] = {vm} # include v itself
116 yield vm, a[v].difference({vm})
/llvm-project-15.0.7/llvm/docs/HistoricalNotes/
H A D2001-01-31-UniversalIRIdea.txt8 virtual machines for many different languages. E.g., a C vm, a C++ vm, a
9 Java vm, a Lisp vm, ..
14 perhaps a garbage collection library). Each language vm would select the
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DEXPInstructions.td17 exp_vm:$vm, exp_compr:$compr, i32imm:$en),
35 // Real instruction with optional asm operands "compr" and "vm".
38 #!if(done, " done", "")#"$compr$vm">,
132 done_val, timm:$vm),
134 ExpSrc2:$src2, ExpSrc3:$src3, timm:$vm, 0, timm:$en)
149 done_val, timm:$vm),
151 (IMPLICIT_DEF), (IMPLICIT_DEF), timm:$vm, 1, timm:$en)
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.wqm.demote.ll16 ; SI-NEXT: exp mrt1 v0, v0, v0, v0 done vm
20 ; SI-NEXT: exp null off, off, off, off done vm
31 ; GFX9-NEXT: exp mrt1 v0, v0, v0, v0 done vm
35 ; GFX9-NEXT: exp null off, off, off, off done vm
46 ; GFX10-32-NEXT: exp mrt1 v0, v0, v0, v0 done vm
88 ; SI-NEXT: exp mrt1 v0, v0, v0, v0 done vm
92 ; SI-NEXT: exp null off, off, off, off done vm
106 ; GFX9-NEXT: exp mrt1 v0, v0, v0, v0 done vm
178 ; SI-NEXT: exp mrt1 v0, v0, v0, v0 done vm
205 ; GFX9-NEXT: exp mrt1 v0, v0, v0, v0 done vm
[all …]
H A Dkill-infinite-loop.ll36 ; CHECK-NEXT: exp mrt0 v1, v1, v1, v0 done vm
41 ; CHECK-NEXT: exp null off, off, off, off done vm
79 ; CHECK-NEXT: exp mrt0 v0, off, v0, off done compr vm
84 ; CHECK-NEXT: exp null off, off, off, off done vm
114 ; CHECK-NEXT: exp null off, off, off, off done vm
149 ; CHECK-NEXT: exp null off, off, off, off done vm
H A Dskip-if-dead.ll23 ; WAVE64-NEXT: exp null off, off, off, off done vm
63 ; WAVE64-NEXT: exp null off, off, off, off done vm
156 ; SI-NEXT: exp null off, off, off, off done vm
232 ; SI-NEXT: exp null off, off, off, off done vm
311 ; SI-NEXT: exp null off, off, off, off done vm
415 ; SI-NEXT: exp null off, off, off, off done vm
593 ; SI-NEXT: exp null off, off, off, off done vm
794 ; SI-NEXT: exp null off, off, off, off done vm
1581 ; SI-NEXT: exp mrt0 v2, v2, v2, v2 done vm
1739 ; SI-NEXT: exp mrt0 v2, v2, v0, v0 done vm
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.wqm.demote.ll16 ; SI-NEXT: exp mrt1 v0, v0, v0, v0 done vm
20 ; SI-NEXT: exp null off, off, off, off done vm
31 ; GFX9-NEXT: exp mrt1 v0, v0, v0, v0 done vm
35 ; GFX9-NEXT: exp null off, off, off, off done vm
46 ; GFX10-32-NEXT: exp mrt1 v0, v0, v0, v0 done vm
61 ; GFX10-64-NEXT: exp mrt1 v0, v0, v0, v0 done vm
88 ; SI-NEXT: exp mrt1 v0, v0, v0, v0 done vm
92 ; SI-NEXT: exp null off, off, off, off done vm
106 ; GFX9-NEXT: exp mrt1 v0, v0, v0, v0 done vm
178 ; SI-NEXT: exp mrt1 v0, v0, v0, v0 done vm
[all …]
H A Di1-copy.ll11 ; WAVE64-NEXT: exp mrt0 v0, v1, v0, v0 done vm
19 ; WAVE32-NEXT: exp mrt0 v0, v1, v0, v0 done vm
38 ; WAVE64-NEXT: exp mrt0 v0, v1, v0, v0 done vm
49 ; WAVE32-NEXT: exp mrt0 v0, v1, v0, v0 done vm
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AMDGPU/
H A Dexp_vi.txt6 # VI: exp mrt0 v1, v2, v3, v4 vm ; encoding: [0x0f,0x10,0x00,0xc4,0x01,0x02,0x03,0x04]
15 # VI: exp mrt0 v2, v2, v4, v4 done compr vm ; encoding: [0x0f,0x1c,0x00,0xc4,0x02,0x04,0x00,0x00]
18 # VI: exp mrt0 v7, off, off, off vm ; encoding: [0x01,0x10,0x00,0xc4,0x07,0x00,0x00,0x00]
33 # VI: exp mrtz v0, off, off, off done vm ; encoding: [0x81,0x18,0x00,0xc4,0x00,0x00,0x00,0x00]
H A Dexp_gfx10.txt6 # GXF10: exp mrt0 v1, v2, v3, v4 vm ; encoding: [0x0f,0x10,0x00,0xf8,0x01,0x02,0x03,0x04]
15 # GXF10: exp mrt0 v2, v2, v4, v4 done compr vm ; encoding: [0x0f,0x1c,0x00,0xf8,0x02,0x04,0x00,0x00]
18 # GXF10: exp mrt0 v7, off, off, off vm ; encoding: [0x01,0x10,0x00,0xf8,0x07,0x00,0x00,0x00]
33 # GXF10: exp mrtz v0, off, off, off done vm ; encoding: [0x81,0x18,0x00,0xf8,0x00,0x00,0x00,0x00]
/llvm-project-15.0.7/llvm/test/MC/AMDGPU/
H A Dexp-pregfx11.s36 exp mrt0 v4, v3, v2, v1 vm
41 exp mrt0 v4, v3, v2, v1 done vm
/llvm-project-15.0.7/lldb/source/Plugins/Process/NetBSD/
H A DNativeProcessNetBSD.cpp666 struct kinfo_vmentry *vm; in PopulateMemoryRegionCache() local
668 vm = kinfo_getvmmap(GetID(), &count); in PopulateMemoryRegionCache()
669 if (vm == NULL) { in PopulateMemoryRegionCache()
678 info.GetRange().SetRangeBase(vm[i].kve_start); in PopulateMemoryRegionCache()
679 info.GetRange().SetRangeEnd(vm[i].kve_end); in PopulateMemoryRegionCache()
682 if (vm[i].kve_protection & VM_PROT_READ) in PopulateMemoryRegionCache()
687 if (vm[i].kve_protection & VM_PROT_WRITE) in PopulateMemoryRegionCache()
692 if (vm[i].kve_protection & VM_PROT_EXECUTE) in PopulateMemoryRegionCache()
697 if (vm[i].kve_path[0]) in PopulateMemoryRegionCache()
698 info.SetName(vm[i].kve_path); in PopulateMemoryRegionCache()
[all …]
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dwarn-unused-filescoped.cpp73 virtual void vm() { } in vm() function
77 void vm() { } in vm() function
/llvm-project-15.0.7/clang/test/Sema/
H A Dblock-misc.c206 int (*vm)[n] = 0; // expected-note {{declared here}} in test20() local
210 …(void)(vm+1); // expected-error {{cannot refer to declaration with a variably modified type insid… in test20()
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Dinvalid-instruction-spellcheck.s30 vm x0, x0 label
32 # CHECK-NEXT: vm x0, x0
/llvm-project-15.0.7/mlir/test/Integration/Dialect/SparseTensor/CPU/
H A Dsparse_out_reduction.mlir80 %vm = vector.transfer_read %dm[%c0, %c0], %i0: tensor<?x?xi32>, vector<3x3xi32>
81 vector.print %vm : vector<3x3xi32>
/llvm-project-15.0.7/libclc/generic/lib/math/
H A Datan2.cl148 //double vm = __amdil_ldexp_f64(v, m);
150 double vm = ldexp(v, m);
156 double r = MATH_DIVIDE(fma(-c, u2, fma(-c, u1, vm)), fma(c, vm, um));

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