Home
last modified time | relevance | path

Searched refs:vector (Results 1 – 25 of 5543) sorted by relevance

12345678910>>...222

/llvm-project-15.0.7/clang/lib/Headers/
H A Daltivec.h51 vector signed char __a, vector signed char __b, vector unsigned char __c);
58 vec_perm(vector bool char __a, vector bool char __b, vector unsigned char __c);
69 vector bool short __a, vector bool short __b, vector unsigned char __c);
80 vector unsigned int __a, vector unsigned int __b, vector unsigned char __c);
83 vec_perm(vector bool int __a, vector bool int __b, vector unsigned char __c);
6034 vec_mradds(vector short __a, vector short __b, vector short __c) { in vec_mradds()
6099 vec_vmsumshm(vector short __a, vector short __b, vector int __c) { in vec_vmsumshm()
8679 vector int __res = ((vector int)__a & ~(vector int)__c) | in vec_sel()
8687 vector int __res = ((vector int)__a & ~(vector int)__c) | in vec_sel()
8852 vector int __res = ((vector int)__a & ~(vector int)__c) | in vec_vsel()
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/Vector/
H A Dvector-transpose-lowering.mlir23 %0 = vector.transpose %arg0, [1, 0] : vector<2x3xf32> to vector<3x2xf32>
32 // SHUFFLE: vector.shape_cast %{{.*}} : vector<2x4xf32> to vector<8xf32>
38 // SHUFFLE-NEXT: vector.shape_cast %{{.*}} : vector<8xf32> to vector<4x2xf32>
40 // FLAT: vector.shape_cast {{.*}} : vector<2x4xf32> to vector<8xf32>
42 // FLAT: vector.shape_cast {{.*}} : vector<8xf32> to vector<4x2xf32>
43 %0 = vector.transpose %arg0, [1, 0] : vector<2x4xf32> to vector<4x2xf32>
71 // AVX2-NEXT: vector.shape_cast {{.*}} vector<4x8xf32> to vector<32xf32>
72 // AVX2-NEXT: vector.shape_cast {{.*}} vector<32xf32> to vector<8x4xf32>
73 %0 = vector.transpose %arg0, [1, 0] : vector<4x8xf32> to vector<8x4xf32>
101 // AVX2-NEXT: vector.shape_cast {{.*}} vector<4x8xf32> to vector<32xf32>
[all …]
H A Dops.mlir156 %1 = vector.broadcast %b : vector<f32> to vector<4xf32>
160 %3 = vector.broadcast %c : vector<16xf32> to vector<8x16xf32>
162 %4 = vector.broadcast %d : vector<1x16xf32> to vector<8x16xf32>
164 %5 = vector.broadcast %e : vector<8x1xf32> to vector<8x16xf32>
175 %3 = vector.shuffle %2, %b[0, 6] : vector<3xf32>, vector<4xf32>
425 -> (vector<15x2xf32>, vector<8xf32>, vector<16xf32>, vector<16x1xf32>) {
439 return %0, %1, %2, %3 : vector<15x2xf32>, vector<8xf32>, vector<16xf32>, vector<16x1xf32>
448 …vector<5x1x3x4xf16>, vector<5x1x3x8xi8>, vector<8x4xi8>, vector<8x1xf32>, vector<16x1x2xi32>, vect…
457 %2 = vector.bitcast %arg1 : vector<8x1xi32> to vector<8x4xi8>
475 %8 = vector.bitcast %arg4 : vector<f32> to vector<i32>
[all …]
H A Dvector-contract-transforms.mlir75 : vector<2x3xf32>, vector<3xf32> into vector<2xf32>
98 : vector<2x3xi32>, vector<3xi32> into vector<2xi32>
132 : vector<3xf32>, vector<2x3xf32> into vector<2xf32>
181 : vector<2x2xf32>, vector<2x2xf32> into vector<2x2xf32>
604 : vector<2x4xf32>, vector<4x3xf32> into vector<2x3xf32>
912 : vector<2x1xf32>, vector<1x3xf32> into vector<2x3xf32>
931 : vector<2x1xf16>, vector<1x3xf16> into vector<2x3xf32>
959 : vector<2x1xf32>, vector<3x1xf32> into vector<2x3xf32>
985 : vector<1x2xf32>, vector<1x3xf32> into vector<2x3xf32>
1012 : vector<1x2xf32>, vector<3x1xf32> into vector<2x3xf32>
[all …]
H A Dvector-transforms.mlir175 : vector<4x6xf32>, vector<6x4xf32> into vector<4x4xf32>
240 : vector<4x2xf32>, vector<2x4xf32> into vector<4x4xf32>
293 : vector<4x2xf32>, vector<2x4xf32> into vector<4x4xf32>
330 %1 = vector.shape_cast %0 : vector<8xf32> to vector<2x4xf32>
416 : vector<4x2xf32>, vector<2x4xf32> into vector<4x4xf32>
425 %0 = vector.bitcast %src : vector<4xf32> to vector<8xf16>
443 %cast = vector.bitcast %arg0: vector<4xf32> to vector<8xf16>
464 %cast = vector.bitcast %arg0: vector<4xf32> to vector<8xf16>
473 %cast = vector.bitcast %arg0: vector<4xf32> to vector<8xf16>
488 %cast = vector.bitcast %1: vector<8xf16> to vector<4xf32>
[all …]
H A Dvector-unroll-options.mlir12 %lhs, %rhs, %init : vector<8x4xf32>, vector<8x4xf32> into vector<8x8xf32>
25 // CHECK-SAME: vector<4x2xf32>, vector<4x2xf32> into vector<4x4xf32>
32 // CHECK-SAME: vector<4x2xf32>, vector<4x2xf32> into vector<4x4xf32>
41 // CHECK-SAME: vector<4x2xf32>, vector<4x2xf32> into vector<4x4xf32>
48 // CHECK-SAME: vector<4x2xf32>, vector<4x2xf32> into vector<4x4xf32>
57 // CHECK-SAME: vector<4x2xf32>, vector<4x2xf32> into vector<4x4xf32>
64 // CHECK-SAME: vector<4x2xf32>, vector<4x2xf32> into vector<4x4xf32>
73 // CHECK-SAME: vector<4x2xf32>, vector<4x2xf32> into vector<4x4xf32>
80 // CHECK-SAME: vector<4x2xf32>, vector<4x2xf32> into vector<4x4xf32>
94 // ORDER-SAME: vector<4x2xf32>, vector<4x2xf32> into vector<4x4xf32>
[all …]
H A Dvector-multi-reduction-outer-lowering.mlir3 func.func @vector_multi_reduction(%arg0: vector<2x4xf32>, %acc: vector<2xf32>) -> vector<2xf32> {
4 %0 = vector.multi_reduction <mul>, %arg0, %acc [1] : vector<2x4xf32> to vector<2xf32>
10 // CHECK: %[[TRANSPOSED:.+]] = vector.transpose %[[INPUT]], [1, 0] : vector<2x4xf32> to vec…
21 func.func @vector_multi_reduction_min(%arg0: vector<2x4xf32>, %acc: vector<2xf32>) -> vector<2xf32>…
22 %0 = vector.multi_reduction <minf>, %arg0, %acc [1] : vector<2x4xf32> to vector<2xf32>
40 %0 = vector.multi_reduction <maxf>, %arg0, %acc [1] : vector<2x4xf32> to vector<2xf32>
58 %0 = vector.multi_reduction <and>, %arg0, %acc [1] : vector<2x4xi32> to vector<2xi32>
76 %0 = vector.multi_reduction <or>, %arg0, %acc [1] : vector<2x4xi32> to vector<2xi32>
94 %0 = vector.multi_reduction <xor>, %arg0, %acc [1] : vector<2x4xi32> to vector<2xi32>
121 // CHECK: %[[FACC:.+]] = vector.shape_cast %[[ACC]] : vector<2x3xi32> to vector<6xi32>
[all …]
H A Dcanonicalize.mlir367 -> (vector<4xf32>, vector<4xf32>, vector<3x4xf32>, vector<3x4xf32>) {
400 vector<4xf32>, vector<4xf32>, vector<3x4xf32>, vector<3x4xf32>
409 -> (vector<4xf32>, vector<4xf32>, vector<4xf32>, vector<3x4xf32>) {
458 return %r0, %r1, %r2, %r3: vector<4xf32>, vector<4xf32>, vector<4xf32>, vector<3x4xf32>
485 vector<6xf32>, vector<6xf32>, vector<6xf32>) {
585 %b = vector.broadcast %a : vector<1xf32> to vector<1x8xf32>
715 %1 = vector.bitcast %I2 : vector<2xi32> to vector<4xi16>
716 %2 = vector.bitcast %1 : vector<4xi16> to vector<2xi32>
899 memref<?xf32>, vector<16xi32>, vector<16xi1>, vector<16xf32> into vector<16xf32>
933 vector<2x3xf32>, vector<3x4xf32> into vector<2x4xf32>
[all …]
H A Dvector-scan-transforms.mlir15 func.func @scan1d_inc(%arg0 : vector<2xi32>, %arg1 : vector<i32>) -> (vector<2xi32>, vector<i32>) {
17 vector<2xi32>, vector<i32>
18 return %0#0, %0#1 : vector<2xi32>, vector<i32>
26 // CHECK: %[[C:.*]] = vector.broadcast %[[ARG1]] : vector<i32> to vector<1xi32>
33 func.func @scan1d_exc(%arg0 : vector<2xi32>, %arg1 : vector<i32>) -> (vector<2xi32>, vector<i32>) {
35 vector<2xi32>, vector<i32>
50 func.func @scan2d_mul_dim0(%arg0 : vector<2x3xi32>, %arg1 : vector<3xi32>) -> (vector<2x3xi32>, vec…
52 vector<2x3xi32>, vector<3xi32>
70 func.func @scan2d_mul_dim1(%arg0 : vector<2x3xi32>, %arg1 : vector<2xi32>) -> (vector<2x3xi32>, vec…
72 vector<2x3xi32>, vector<2xi32>
[all …]
H A Dvector-dropleadunitdim-transforms.mlir28 …%0 = vector.contract #contraction_trait0 %arg0, %arg1, %arg2 : vector<1x16x8xf32>, vector<1x8x16x…
216 // CHECK: vector.broadcast %{{.+}} : vector<1xf16> to vector<1x1xf16>
244 (vector<1x1x8xf32>, vector<1x4xi1>, vector<1x4xf32>, vector<1x4xf32>) {
248 // CHECK: vector.broadcast %{{.*}} : vector<8xf32> to vector<1x1x8xf32>
253 // CHECK: vector.broadcast %{{.*}} : vector<4xi1> to vector<1x4xi1>
258 // CHECK: vector.broadcast %{{.*}} : vector<4xf32> to vector<1x4xf32>
263 // CHECK: vector.broadcast %{{.*}} : vector<4xf32> to vector<1x4xf32>
265 return %0, %1, %2, %3: vector<1x1x8xf32>, vector<1x4xi1>, vector<1x4xf32>, vector<1x4xf32>
284 %0 = vector.insert %s, %v [0, 0] : vector<4xf32> into vector<1x1x4xf32>
294 %0 = vector.insert %s, %v [0] : vector<1x4xf32> into vector<1x1x4xf32>
[all …]
H A Dvector-multi-reduction-lowering.mlir3 func.func @vector_multi_reduction(%arg0: vector<2x4xf32>, %acc: vector<2xf32>) -> vector<2xf32> {
4 %0 = vector.multi_reduction <mul>, %arg0, %acc [1] : vector<2x4xf32> to vector<2xf32>
8 // CHECK-SAME: %[[INPUT:.+]]: vector<2x4xf32>, %[[ACC:.*]]: vector<2xf32>)
28 // CHECK: %[[CASTED:.*]] = vector.shape_cast %[[INPUT]] : vector<2x4xf32> to vector<8xf32>
34 func.func @vector_reduction_inner(%arg0: vector<2x3x4x5xi32>, %acc: vector<2x3xi32>) -> vector<2x3x…
35 %0 = vector.multi_reduction <add>, %arg0, %acc [2, 3] : vector<2x3x4x5xi32> to vector<2x3xi32>
72 // CHECK: %[[RESULT:.+]] = vector.shape_cast %[[FLAT_RESULT_VEC]] : vector<6xi32> to ve…
77 %0 = vector.multi_reduction <add>, %arg0, %acc [1, 2] : vector<2x3x4x5xf32> to vector<2x5xf32>
84 // CHECK: vector.shape_cast %[[TRANSPOSED_INPUT]] : vector<2x5x3x4xf32> to vector<10x12xf…
85 // CHECK: %[[RESULT:.+]] = vector.shape_cast %{{.*}} : vector<10xf32> to vector<2x5xf32>
[all …]
H A Dvector-contract-matvec-transforms.mlir65 // CHECK: %[[T3:.*]] = vector.transpose %[[T0]], [1, 0] : vector<2x2xf32> to vector<2x2xf32>
67 // CHECK: %[[T5:.*]] = vector.extract %[[T1]][0] : vector<2xf32>
70 // CHECK: %[[T8:.*]] = vector.extract %[[T1]][1] : vector<2xf32>
79 %0 = vector.contract #matvec_trait %A, %x, %b : vector<2x2xf32>, vector<2xf32> into vector<2xf32>
91 // CHECK: %[[T3:.*]] = vector.transpose %[[T0]], [1, 0] : vector<2x2xf32> to vector<2x2xf32>
105 …%0 = vector.contract #matvecmax_trait %A, %x, %b : vector<2x2xf32>, vector<2xf32> into vector<2xf3…
130 …%0 = vector.contract #mattransvec_trait %A, %x, %b : vector<2x2xf32>, vector<2xf32> into vector<2x…
142 // CHECK: %[[T3:.*]] = vector.transpose %[[T0]], [1, 0] : vector<2x2xf32> to vector<2x2xf32>
156 %0 = vector.contract #vecmat_trait %x, %A, %b : vector<2xf32>, vector<2x2xf32> into vector<2xf32>
181 …%0 = vector.contract #vecmattrans_trait %x, %A, %b : vector<2xf32>, vector<2x2xf32> into vector<2x…
[all …]
H A Dvector-transfer-unroll.mlir8 …T: %[[VEC0:.*]] = vector.insert_strided_slice %[[VTR0]], %{{.*}} {offsets = [0, 0], strides = [1…
10 …: %[[VEC1:.*]] = vector.insert_strided_slice %[[VTR1]], %[[VEC0]] {offsets = [0, 2], strides = […
12 …: %[[VEC2:.*]] = vector.insert_strided_slice %[[VTR2]], %[[VEC1]] {offsets = [2, 0], strides = […
33 %0 = vector.transfer_read %arg0[%c0, %c0], %cf0 : memref<4x4xf32>, vector<4x4xf32>
34 return %0 : vector<4x4xf32>
65 vector.transfer_write %arg1, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32>
85 %0 = vector.transfer_read %arg0[%c0, %c0], %cf0 : memref<4x4xf32>, vector<4x4xf32>
86 vector.transfer_write %0, %arg0[%c0, %c0] : vector<4x4xf32>, memref<4x4xf32>
106 %0 = vector.transfer_read %arg0[%c0, %c0], %cf0 : tensor<4x4xf32>, vector<4x4xf32>
148 %0 = vector.transfer_read %arg0[%c0, %c0], %cf0 : tensor<4x4xf32>, vector<4x4xf32>
[all …]
H A Dvector-reduce-to-contract.mlir13 …%arg0: vector<8x32x16xf32>,%arg1: vector<8x32x16xf32>, %acc: vector<8x16xf32>) -> vector<8x16xf32>…
31 …%arg0: vector<8x32x16xi32>,%arg1: vector<8x32x16xi32>, %acc: vector<8x16xi32>) -> vector<8x16xi32>…
82 %0 = vector.broadcast %arg0 : vector<32x16xf32> to vector<8x32x16xf32>
109 %0 = vector.broadcast %arg0 : vector<8x4xi32> to vector<1x8x4xi32>
110 %1 = vector.broadcast %arg1 : vector<8x4xi32> to vector<1x8x4xi32>
143 %0 = vector.broadcast %arg0 : vector<8x4xi32> to vector<2x8x4xi32>
175 %0 = vector.broadcast %arg0 : vector<8xi32> to vector<1x8xi32>
176 %1 = vector.broadcast %arg1 : vector<8xi32> to vector<1x8xi32>
207 %1 = vector.broadcast %arg1 : vector<2xi32> to vector<1x1x2xi32>
238 %1 = vector.broadcast %arg1 : vector<1xf32> to vector<1x1xf32>
[all …]
H A Dvector-mem-transforms.mlir1 // RUN: mlir-opt %s -test-vector-to-vector-lowering | FileCheck %s
13 : memref<?xf32>, vector<16xi1>, vector<16xf32> into vector<16xf32>
27 : memref<16xf32>, vector<16xi1>, vector<16xf32> into vector<16xf32>
39 : memref<16xf32>, vector<16xi1>, vector<16xf32> into vector<16xf32>
53 : memref<?xf32>, vector<16xi1>, vector<16xf32> into vector<16xf32>
93 : memref<16xf32>, vector<16xi32>, vector<16xi1>, vector<16xf32> into vector<16xf32>
106 : memref<16xf32>, vector<16xi32>, vector<16xi1>, vector<16xf32> into vector<16xf32>
122 : memref<16xf32>, vector<16xi32>, vector<16xi1>, vector<16xf32>
136 : memref<16xf32>, vector<16xi32>, vector<16xi1>, vector<16xf32>
150 : memref<16xf32>, vector<16xi1>, vector<16xf32> into vector<16xf32>
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/GPUToNVVM/
H A Dwmma-ops-to-nvvm.mlir7 …-SAME: !llvm.struct<(vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, ve…
24 …AG]] : !llvm.struct<(vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, ve…
36 …AG]] : !llvm.struct<(vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, ve…
94 …vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2…
97 …i32] : !llvm.struct<(vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, ve…
98 …i32] : !llvm.struct<(vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, ve…
99 …i32] : !llvm.struct<(vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, ve…
100 …i32] : !llvm.struct<(vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, ve…
101 …i32] : !llvm.struct<(vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, ve…
102 …i32] : !llvm.struct<(vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, vector<2xf16>, ve…
[all …]
/llvm-project-15.0.7/clang/test/CodeGen/PowerPC/
H A Dbuiltins-ppc-crypto.c30 vector unsigned char a = B_INIT1 in test_vpmsumb()
31 vector unsigned char b = B_INIT2 in test_vpmsumb()
39 vector unsigned short a = H_INIT1 in test_vpmsumh()
40 vector unsigned short b = H_INIT2 in test_vpmsumh()
48 vector unsigned int a = W_INIT1 in test_vpmsumw()
49 vector unsigned int b = W_INIT2 in test_vpmsumw()
74 vector unsigned char a = B_INIT1 in test_vpermxorb()
82 vector bool char test_vpermxorbc(vector bool char a, in test_vpermxorbc()
90 vector signed char test_vpermxorsc(vector signed char a, in test_vpermxorsc()
98 vector unsigned char test_vpermxoruc(vector unsigned char a, in test_vpermxoruc()
[all …]
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/
H A Dtest-transpose.mlir27 %5 = vector.insert %a, %4[0] : vector<2xf32> into vector<2x2xf32>
28 %A = vector.insert %b, %5[1] : vector<2xf32> into vector<2x2xf32>
30 %7 = vector.insert %c, %6[0] : vector<2xf32> into vector<2x2xf32>
31 %B = vector.insert %d, %7[1] : vector<2xf32> into vector<2x2xf32>
33 %9 = vector.insert %a, %8[0] : vector<2xf32> into vector<3x2xf32>
34 %10 = vector.insert %b, %9[1] : vector<2xf32> into vector<3x2xf32>
35 %C = vector.insert %c, %10[2] : vector<2xf32> into vector<3x2xf32>
40 vector.print %A : vector<2x2xf32>
41 vector.print %B : vector<2x2xf32>
42 vector.print %C : vector<3x2xf32>
[all …]
H A Dtest-contraction.mlir217 : vector<2x2xf32>, vector<2xf32> into vector<2xf32>
219 : vector<2x2xf32>, vector<2xf32> into vector<2xf32>
231 : vector<2x2xf32>, vector<2xf32> into vector<2xf32>
233 : vector<2x2xf32>, vector<2xf32> into vector<2xf32>
245 : vector<2x2xf32>, vector<2x2xf32> into vector<2x2xf32>
247 : vector<2x2xf32>, vector<2x2xf32> into vector<2x2xf32>
279 : vector<2x2xf32>, vector<2x2xf32> into vector<2x2xf32>
281 : vector<2x2xf32>, vector<2x2xf32> into vector<2x2xf32>
293 : vector<2x2xf32>, vector<2x2xf32> into vector<2x2xf32>
295 : vector<2x2xf32>, vector<2x2xf32> into vector<2x2xf32>
[all …]
H A Dtest-print-int.mlir11 vector.print %0 : vector<5xi1>
15 %cast_1 = vector.bitcast %1 : vector<4xi1> to vector<4xsi1>
16 vector.print %cast_1 : vector<4xsi1>
20 %cast_2 = vector.bitcast %2 : vector<4xi1> to vector<4xui1>
25 vector.print %3 : vector<9xi8>
29 %cast_4 = vector.bitcast %4 : vector<6xi8> to vector<6xsi8>
34 %cast_5 = vector.bitcast %5 : vector<6xi8> to vector<6xui8>
39 vector.print %6 : vector<9xi16>
43 %cast_7 = vector.bitcast %7 : vector<6xi16> to vector<6xsi16>
48 %cast_8 = vector.bitcast %8 : vector<6xi16> to vector<6xui16>
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/ArmSVE/
H A Dlegalize-for-llvm.mlir9 vector<[16]xi8> to vector<[4]xi32>
50 …// CHECK: arm_sve.intr.add{{.*}}: (vector<[4]xi1>, vector<[4]xi32>, vector<[4]xi32>) -> vector<[4]…
53 …// CHECK: arm_sve.intr.sub{{.*}}: (vector<[4]xi1>, vector<[4]xi32>, vector<[4]xi32>) -> vector<[4]…
56 …// CHECK: arm_sve.intr.mul{{.*}}: (vector<[4]xi1>, vector<[4]xi32>, vector<[4]xi32>) -> vector<[4]…
59 …// CHECK: arm_sve.intr.sdiv{{.*}}: (vector<[4]xi1>, vector<[4]xi32>, vector<[4]xi32>) -> vector<[4…
62 …// CHECK: arm_sve.intr.udiv{{.*}}: (vector<[4]xi1>, vector<[4]xi32>, vector<[4]xi32>) -> vector<[4…
75 …// CHECK: arm_sve.intr.fadd{{.*}}: (vector<[4]xi1>, vector<[4]xf32>, vector<[4]xf32>) -> vector<[4…
78 …// CHECK: arm_sve.intr.fsub{{.*}}: (vector<[4]xi1>, vector<[4]xf32>, vector<[4]xf32>) -> vector<[4…
81 …// CHECK: arm_sve.intr.fmul{{.*}}: (vector<[4]xi1>, vector<[4]xf32>, vector<[4]xf32>) -> vector<[4…
84 …// CHECK: arm_sve.intr.fdiv{{.*}}: (vector<[4]xi1>, vector<[4]xf32>, vector<[4]xf32>) -> vector<[4…
[all …]
H A Droundtrip.mlir5 %c: vector<[4]xi32>) -> vector<[4]xi32> {
6 // CHECK: arm_sve.sdot {{.*}}: vector<[16]xi8> to vector<[4]xi32
8 vector<[16]xi8> to vector<[4]xi32>
14 %c: vector<[4]xi32>) -> vector<[4]xi32> {
15 // CHECK: arm_sve.smmla {{.*}}: vector<[16]xi8> to vector<[4]xi3
17 vector<[16]xi8> to vector<[4]xi32>
23 %c: vector<[4]xi32>) -> vector<[4]xi32> {
24 // CHECK: arm_sve.udot {{.*}}: vector<[16]xi8> to vector<[4]xi32
26 vector<[16]xi8> to vector<[4]xi32>
32 %c: vector<[4]xi32>) -> vector<[4]xi32> {
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/VectorToSPIRV/
H A Dvector-to-spirv.mlir9 func.func @bitcast(%arg0 : vector<2xf32>, %arg1: vector<2xf16>) -> (vector<4xf16>, vector<1xf32>) {
10 %0 = vector.bitcast %arg0 : vector<2xf32> to vector<4xf16>
11 %1 = vector.bitcast %arg1 : vector<2xf16> to vector<1xf32>
12 return %0, %1: vector<4xf16>, vector<1xf32>
26 return %0, %1: vector<4xf32>, vector<2xf32>
36 %0 = "vector.extract"(%arg0) {position = [0]} : (vector<2xf32>) -> vector<1xf32>
48 %0 = vector.extract %arg0[0] : vector<1xf32>
167 func.func @fma(%a: vector<4xf32>, %b: vector<4xf32>, %c: vector<4xf32>) -> vector<4xf32> {
176 func.func @fma_size1_vector(%a: vector<1xf32>, %b: vector<1xf32>, %c: vector<1xf32>) -> vector<1xf3…
188 %splat = vector.splat %f : vector<4xf32>
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/VectorToSCF/
H A Dunrolled-vector-to-loops.mlir9 // CHECK-NEXT: vector.insert {{.*}} [0, 0] : vector<4xf32> into vector<2x3x4xf32>
11 // CHECK-NEXT: vector.insert {{.*}} [0, 1] : vector<4xf32> into vector<2x3x4xf32>
13 // CHECK-NEXT: vector.insert {{.*}} [0, 2] : vector<4xf32> into vector<2x3x4xf32>
15 // CHECK-NEXT: vector.insert {{.*}} [1, 0] : vector<4xf32> into vector<2x3x4xf32>
17 // CHECK-NEXT: vector.insert {{.*}} [1, 1] : vector<4xf32> into vector<2x3x4xf32>
36 // CHECK: vector.insert {{.*}} [0, 0] : vector<4xf32> into vector<2x3x4xf32>
39 // CHECK: vector.insert {{.*}} [0, 1] : vector<4xf32> into vector<2x3x4xf32>
42 // CHECK: vector.insert {{.*}} [0, 2] : vector<4xf32> into vector<2x3x4xf32>
46 // CHECK: vector.insert {{.*}} [1, 0] : vector<4xf32> into vector<2x3x4xf32>
49 // CHECK: vector.insert {{.*}} [1, 1] : vector<4xf32> into vector<2x3x4xf32>
[all …]
/llvm-project-15.0.7/clang/include/clang/Basic/
H A DBuiltinsSystemZ.def35 TARGET_BUILTIN(__builtin_s390_lcbb, "UivC*Ii", "nc", "vector")
36 TARGET_BUILTIN(__builtin_s390_vlbb, "V16ScvC*Ii", "", "vector")
37 TARGET_BUILTIN(__builtin_s390_vll, "V16ScUivC*", "", "vector")
38 TARGET_BUILTIN(__builtin_s390_vstl, "vV16ScUiv*", "", "vector")
53 TARGET_BUILTIN(__builtin_s390_vuphb, "V8SsV16Sc", "nc", "vector")
54 TARGET_BUILTIN(__builtin_s390_vuphh, "V4SiV8Ss", "nc", "vector")
56 TARGET_BUILTIN(__builtin_s390_vuplb, "V8SsV16Sc", "nc", "vector")
57 TARGET_BUILTIN(__builtin_s390_vuplhw, "V4SiV8Ss", "nc", "vector")
60 TARGET_BUILTIN(__builtin_s390_vuplhh, "V4UiV8Us", "nc", "vector")
63 TARGET_BUILTIN(__builtin_s390_vupllh, "V4UiV8Us", "nc", "vector")
[all …]

12345678910>>...222