| /llvm-project-15.0.7/clang/test/Sema/ |
| H A D | ext_vector_components.c | 11 float2 vec2, vec2_2; in test() local 17 vec2.z; // expected-error {{vector component access exceeds type 'float2'}} in test() 22 vec2 = vec4.s01; // legal, shorten in test() 23 vec2 = vec4.S01; // legal, shorten in test() 26 f = vec2.x; // legal, shorten in test() 32 vec2.x = f; in test() 34 vec2.yx = vec2_2.xy; in test() 52 f = vec2.r; // legal, shorten in test() 59 vec2.x = f; in test() 61 vec2.gr = vec2_2.rg; in test() [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/avx512-shuffles/ |
| H A D | shuffle-interleave.ll | 129 %vec2 = load <4 x float>, ptr %vec2p 141 %vec2 = load <4 x float>, ptr %vec2p 155 %vec2 = load <4 x float>, ptr %vec2p 170 %vec2 = load <4 x float>, ptr %vec2p 184 %vec2 = load <4 x float>, ptr %vec2p 199 %vec2 = load <4 x float>, ptr %vec2p 213 %vec2 = load <4 x float>, ptr %vec2p 225 %vec2 = load <4 x float>, ptr %vec2p 237 %vec2 = load <4 x float>, ptr %vec2p 251 %vec2 = load <4 x float>, ptr %vec2p [all …]
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| H A D | shuffle-vec.ll | 131 %vec2 = load <8 x float>, ptr %vec2p 143 %vec2 = load <8 x float>, ptr %vec2p 157 %vec2 = load <8 x float>, ptr %vec2p 172 %vec2 = load <8 x float>, ptr %vec2p 186 %vec2 = load <8 x float>, ptr %vec2p 201 %vec2 = load <8 x float>, ptr %vec2p 215 %vec2 = load <8 x float>, ptr %vec2p 227 %vec2 = load <8 x float>, ptr %vec2p 239 %vec2 = load <8 x float>, ptr %vec2p 253 %vec2 = load <8 x float>, ptr %vec2p [all …]
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| H A D | unpack.ll | 129 %vec2 = load <4 x float>, ptr %vec2p 141 %vec2 = load <4 x float>, ptr %vec2p 155 %vec2 = load <4 x float>, ptr %vec2p 170 %vec2 = load <4 x float>, ptr %vec2p 184 %vec2 = load <4 x float>, ptr %vec2p 199 %vec2 = load <4 x float>, ptr %vec2p 213 %vec2 = load <4 x float>, ptr %vec2p 225 %vec2 = load <4 x float>, ptr %vec2p 237 %vec2 = load <4 x float>, ptr %vec2p 251 %vec2 = load <4 x float>, ptr %vec2p [all …]
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| H A D | in_lane_permute.ll | 24 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 50 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 76 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 110 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 145 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 173 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 201 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 238 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 274 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2 300 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2 [all …]
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| H A D | duplicate-low.ll | 22 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> %vec2 48 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> %vec2 83 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> %vec2 110 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> %vec2 145 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec2 171 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec2 197 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec2 223 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec2 249 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec2 709 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 [all …]
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| H A D | duplicate-high.ll | 22 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 48 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 74 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 100 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 126 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 161 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 188 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 215 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 242 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 269 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2 [all …]
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| H A D | permute.ll | 23 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec2 49 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec2 75 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec2 110 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec2 531 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2 557 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2 583 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2 618 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2 654 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2 682 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2 [all …]
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| H A D | shuffle.ll | 21 %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2 45 %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2 69 %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2 101 %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2 136 %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2 164 %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2 192 %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2 230 %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2 265 %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2 289 %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2 [all …]
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| H A D | partial_permute.ll | 29 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 58 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 87 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 127 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 168 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 200 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 232 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 275 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 457 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 488 %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2 [all …]
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| /llvm-project-15.0.7/polly/lib/External/isl/ |
| H A D | isl_vec.c | 170 if (!vec1 || !vec2) in isl_vec_concat() 174 isl_vec_free(vec2); in isl_vec_concat() 180 return vec2; in isl_vec_concat() 187 isl_seq_cpy(vec1->el + vec1->size - vec2->size, vec2->el, vec2->size); in isl_vec_concat() 189 isl_vec_free(vec2); in isl_vec_concat() 193 isl_vec_free(vec2); in isl_vec_concat() 213 if (!vec2) in isl_vec_dup() 216 return vec2; in isl_vec_dup() 230 return vec2; in isl_vec_cow() 323 if (!vec1 || !vec2) in isl_vec_cmp_element() [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | packed-op-sel.ll | 253 %neg.vec2 = fsub <2 x half> <half -0.0, half -0.0>, %vec2 280 %vec2.fneg = fsub <2 x half> <half -0.0, half -0.0>, %vec2 308 %vec2.elt1 = extractelement <2 x half> %vec2, i32 1 309 %neg.vec2.elt1 = fsub half -0.0, %vec2.elt1 311 %neg.vec2.elt1.insert = insertelement <2 x half> %vec2, half %neg.vec2.elt1, i32 1 389 %neg.vec2 = fsub <2 x half> <half -0.0, half -0.0>, %vec2 391 %neg.neg.vec2.elt1 = fsub half -0.0, %neg.vec2.elt1 392 %neg.neg.vec2.elt1.insert = insertelement <2 x half> %vec2, half %neg.neg.vec2.elt1, i32 1 446 %neg.vec2 = fsub <2 x half> <half -0.0, half -0.0>, %vec2 475 %neg.vec2 = fsub <2 x half> <half -0.0, half -0.0>, %vec2 [all …]
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| H A D | extract-vector-elt-build-vector-combine.ll | 27 %vec2 = insertelement <4 x i32> %vec1, i32 %elt2, i32 2 28 %vec3 = insertelement <4 x i32> %vec2, i32 %elt3, i32 3 69 %vec2 = insertelement <4 x i32> %vec1, i32 %elt2, i32 2 70 %vec3 = insertelement <4 x i32> %vec2, i32 %elt3, i32 3 113 %vec2 = insertelement <4 x i32> %vec1, i32 %elt2, i32 2 114 %vec3 = insertelement <4 x i32> %vec2, i32 %elt3, i32 3
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | ext-vector.c | 20 float2 vec2, vec2_2; variable 31 vec2 = vec4.xy; // shorten in test2() 32 f = vec2.x; // extract elt in test2() 35 vec2.x = f; // insert one. in test2() 36 vec2.yx = vec2; // reverse in test2() 315 vec2 = vec4.rg; in test_rgba() 324 vec2.r = f; in test_rgba() 326 vec2.gr = vec2; in test_rgba()
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| H A D | arithmetic-fence-builtin.c | 24 __v2f32 vec1, vec2; in addit() local 25 vec1 = __arithmetic_fence(vec2); in addit() 27 vec2 = (vec2 + vec1); in addit()
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| /llvm-project-15.0.7/llvm/test/Transforms/DeadStoreElimination/ |
| H A D | OverwriteStoreEnd.ll | 5 %struct.vec2 = type { <4 x i32>, <4 x i32> } 8 @glob1 = global %struct.vec2 zeroinitializer, align 16 192 ; CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct.vec2* [[P:%.*]] to i8* 199 %0 = bitcast %struct.vec2* %p to i8* 201 %c = getelementptr inbounds %struct.vec2, %struct.vec2* %p, i64 0, i32 1 216 %0 = bitcast %struct.vec2* %p to i8* 218 %c = getelementptr inbounds %struct.vec2, %struct.vec2* %p, i64 0, i32 1 233 %0 = bitcast %struct.vec2* %p to i8* 235 %arrayidx1 = getelementptr inbounds %struct.vec2, %struct.vec2* %p, i64 0, i32 0, i64 7 250 %0 = bitcast %struct.vec2* %p to i8* [all …]
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| /llvm-project-15.0.7/libcxx/test/std/containers/sequences/deque/deque.modifiers/ |
| H A D | push_front_exception_safety.pass.cpp | 75 std::deque<CMyClass> vec2(vec); in main() local 84 assert(vec==vec2); in main() 92 C vec2(vec, test_allocator<CMyClass>(&alloc_stats)); in main() local 100 assert(vec==vec2); in main()
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| H A D | push_back_exception_safety.pass.cpp | 75 std::deque<CMyClass> vec2(vec); in main() local 84 assert(vec==vec2); in main() 92 C vec2(vec, test_allocator<CMyClass>(&alloc_stats)); in main() local 100 assert(vec==vec2); in main()
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | lowerMUL-newload.ll | 14 %v2 = sext <4 x i16> %vec2 to <4 x i32> 32 %v2 = sext <4 x i16> %vec2 to <4 x i32> 62 %v2 = sext <4 x i16> %vec2 to <4 x i32> 82 %v2 = sext <4 x i16> %vec2 to <4 x i32> 100 %v2 = sext <4 x i16> %vec2 to <4 x i32> 130 %v2 = sext <4 x i16> %vec2 to <4 x i32> 150 %v2 = sext <2 x i32> %vec2 to <2 x i64> 168 %v2 = sext <2 x i32> %vec2 to <2 x i64> 198 %v2 = sext <2 x i32> %vec2 to <2 x i64> 218 %v2 = sext <2 x i32> %vec2 to <2 x i64> [all …]
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| /llvm-project-15.0.7/clang/test/PCH/ |
| H A D | exprs.h | 79 extern double2 vec2, vec2b; 80 typedef typeof(vec2.x) ext_vector_element; 103 typedef typeof(__builtin_shufflevector(vec2, vec2b, 2, 1)) shuffle_expr; 107 typedef typeof(__builtin_convertvector(vec2, float2)) convert_expr;
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| /llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/ConstProp/ |
| H A D | InsertElement-inseltpoison.ll | 20 %vec2 = insertelement <4 x i64> %vec1, i64 -2, i32 1 21 %vec3 = insertelement <4 x i64> %vec2, i64 -3, i32 2 31 %vec2 = insertelement <4 x i64> %vec1, i64 -2, i32 1 32 %vec3 = insertelement <4 x i64> %vec2, i64 -3, i32 2
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| H A D | InsertElement.ll | 20 %vec2 = insertelement <4 x i64> %vec1, i64 -2, i32 1 21 %vec3 = insertelement <4 x i64> %vec2, i64 -3, i32 2 31 %vec2 = insertelement <4 x i64> %vec1, i64 -2, i32 1 32 %vec3 = insertelement <4 x i64> %vec2, i64 -3, i32 2
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | 2011-04-19-sclr-bb.ll | 13 %vec2 = phi <4 x i1> [ %vec2_and_1, %LOOP ], [ zeroinitializer, %ENTRY ] 14 %vec1_or_2 = or <4 x i1> %vec1, %vec2 15 %vec2_and_1 = and <4 x i1> %vec2, %vec1
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| /llvm-project-15.0.7/libcxx/test/std/containers/sequences/vector/vector.modifiers/ |
| H A D | push_back_exception_safety.pass.cpp | 73 std::vector<CMyClass> vec2(vec); in main() local 75 assert(is_contiguous_container_asan_correct(vec2)); in main() 84 assert(vec==vec2); in main()
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| /llvm-project-15.0.7/polly/lib/External/isl/include/isl/ |
| H A D | vec.h | 40 isl_bool isl_vec_is_equal(__isl_keep isl_vec *vec1, __isl_keep isl_vec *vec2); 41 int isl_vec_cmp_element(__isl_keep isl_vec *vec1, __isl_keep isl_vec *vec2, 56 __isl_take isl_vec *vec2); 60 __isl_take isl_vec *vec2);
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