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/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DIntrinsicsVEVL.gen.td1 let TargetPrefix = "ve" in def int_ve_vl_vld_vssl : ClangBuiltin<"__builtin_ve_vl_vld_vssl">, Intri…
446 let TargetPrefix = "ve" in def int_ve_vl_vseq_vl : ClangBuiltin<"__builtin_ve_vl_vseq_vl">, Intrins…
448 let TargetPrefix = "ve" in def int_ve_vl_pvseqlo_vl : ClangBuiltin<"__builtin_ve_vl_pvseqlo_vl">, I…
450 let TargetPrefix = "ve" in def int_ve_vl_pvsequp_vl : ClangBuiltin<"__builtin_ve_vl_pvsequp_vl">, I…
452 let TargetPrefix = "ve" in def int_ve_vl_pvseq_vl : ClangBuiltin<"__builtin_ve_vl_pvseq_vl">, Intri…
839 let TargetPrefix = "ve" in def int_ve_vl_vfmklat_ml : ClangBuiltin<"__builtin_ve_vl_vfmklat_ml">, I…
840 let TargetPrefix = "ve" in def int_ve_vl_vfmklaf_ml : ClangBuiltin<"__builtin_ve_vl_vfmklaf_ml">, I…
1245 let TargetPrefix = "ve" in def int_ve_vl_negm_mm : ClangBuiltin<"__builtin_ve_vl_negm_mm">, Intrins…
1246 let TargetPrefix = "ve" in def int_ve_vl_negm_MM : ClangBuiltin<"__builtin_ve_vl_negm_MM">, Intrins…
1254 let TargetPrefix = "ve" in def int_ve_vl_fencei : ClangBuiltin<"__builtin_ve_vl_fencei">, Intrinsic…
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvbrd.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
25 declare <256 x double> @llvm.ve.vl.vbrdd.vsl(double, i32)
44 declare <256 x double> @llvm.ve.vl.vld.vssl(i64, i8*, i32)
50 declare void @llvm.ve.vl.vst.vssl(<256 x double>, i64, i8*, i32)
79 declare <256 x i1> @llvm.ve.vl.lvm.mmss(<256 x i1>, i64, i64)
101 declare <256 x double> @llvm.ve.vl.vbrdl.vsl(i64, i32)
120 declare <256 x double> @llvm.ve.vl.vbrdl.vsvl(i64, <256 x double>, i32)
210 declare <256 x double> @llvm.ve.vl.vbrds.vsl(float, i32)
280 declare <256 x double> @llvm.ve.vl.vbrdw.vsl(i32, i32)
393 declare <256 x double> @llvm.ve.vl.pvbrd.vsl(i64, i32)
[all …]
H A Dvst.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
23 declare <256 x double> @llvm.ve.vl.vld.vssl(i64, i8*, i32)
26 declare void @llvm.ve.vl.vst.vssl(<256 x double>, i64, i8*, i32)
88 declare void @llvm.ve.vl.vstnc.vssl(<256 x double>, i64, i8*, i32)
150 declare void @llvm.ve.vl.vstot.vssl(<256 x double>, i64, i8*, i32)
212 declare void @llvm.ve.vl.vstncot.vssl(<256 x double>, i64, i8*, i32)
274 declare void @llvm.ve.vl.vstu.vssl(<256 x double>, i64, i8*, i32)
336 declare void @llvm.ve.vl.vstunc.vssl(<256 x double>, i64, i8*, i32)
398 declare void @llvm.ve.vl.vstuot.vssl(<256 x double>, i64, i8*, i32)
522 declare void @llvm.ve.vl.vstl.vssl(<256 x double>, i64, i8*, i32)
[all …]
H A Dvfmk.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
17 %1 = tail call <256 x i1> @llvm.ve.vl.vfmklat.ml(i32 256)
22 declare <256 x i1> @llvm.ve.vl.vfmklat.ml(i32)
32 %1 = tail call <256 x i1> @llvm.ve.vl.vfmklaf.ml(i32 256)
37 declare <256 x i1> @llvm.ve.vl.vfmklaf.ml(i32)
52 declare <256 x i1> @llvm.ve.vl.vfmklgt.mvl(<256 x double>, i32)
82 declare <256 x i1> @llvm.ve.vl.vfmkllt.mvl(<256 x double>, i32)
112 declare <256 x i1> @llvm.ve.vl.vfmklne.mvl(<256 x double>, i32)
142 declare <256 x i1> @llvm.ve.vl.vfmkleq.mvl(<256 x double>, i32)
1733 declare <512 x i1> @llvm.ve.vl.pvfmkat.Ml(i32)
[all …]
H A Dvmv.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
19 %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %0, i32 256)
21 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %4, i64 8, i8* %0, i32 256)
26 declare <256 x double> @llvm.ve.vl.vld.vssl(i64, i8*, i32)
29 declare <256 x double> @llvm.ve.vl.vmv.vsvl(i32, <256 x double>, i32)
32 declare void @llvm.ve.vl.vst.vssl(<256 x double>, i64, i8*, i32)
44 %2 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %0, i32 256)
46 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %3, i64 8, i8* %0, i32 256)
64 %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %0, i32 256)
66 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %4, i64 8, i8* %0, i32 256)
[all …]
H A Dlsv.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
19 %4 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %0, i32 256)
26 declare <256 x double> @llvm.ve.vl.vld.vssl(i64, i8*, i32)
29 declare <256 x double> @llvm.ve.vl.lsv.vvss(<256 x double>, i32, i64)
32 declare void @llvm.ve.vl.vst.vssl(<256 x double>, i64, i8*, i32)
45 %4 = tail call i64 @llvm.ve.vl.lvsl.svs(<256 x double> %3, i32 %1)
50 declare i64 @llvm.ve.vl.lvsl.svs(<256 x double>, i32)
63 %4 = tail call fast double @llvm.ve.vl.lvsd.svs(<256 x double> %3, i32 %1)
68 declare double @llvm.ve.vl.lvsd.svs(<256 x double>, i32)
81 %4 = tail call fast float @llvm.ve.vl.lvss.svs(<256 x double> %3, i32 %1)
[all …]
H A Dvcvt.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
22 declare <256 x double> @llvm.ve.vl.vcvtwdsx.vvl(<256 x double>, i32)
73 declare <256 x double> @llvm.ve.vl.vcvtwdsxrz.vvl(<256 x double>, i32)
124 declare <256 x double> @llvm.ve.vl.vcvtwdzx.vvl(<256 x double>, i32)
226 declare <256 x double> @llvm.ve.vl.vcvtwssx.vvl(<256 x double>, i32)
430 declare <256 x double> @llvm.ve.vl.vcvtld.vvl(<256 x double>, i32)
532 declare <256 x double> @llvm.ve.vl.vcvtdw.vvl(<256 x double>, i32)
565 declare <256 x double> @llvm.ve.vl.vcvtsw.vvl(<256 x double>, i32)
598 declare <256 x double> @llvm.ve.vl.vcvtdl.vvl(<256 x double>, i32)
631 declare <256 x double> @llvm.ve.vl.vcvtds.vvl(<256 x double>, i32)
[all …]
H A Dlvlgen.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
6 declare <256 x double> @llvm.ve.vl.vld.vssl(i64, i8*, i32)
7 declare void @llvm.ve.vl.vst.vssl(<256 x double>, i64, i8*, i32)
33 %l0 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %P, i32 256)
35 %l1 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 16, i8* %P, i32 128)
37 %l2 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %P, i32 128)
58 %l0 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %P, i32 %evl)
60 %l1 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 16, i8* %P, i32 %evl)
62 %l2 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %P, i32 %evl)
95 %l0 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %P, i32 %evl)
[all …]
H A Dvseq.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
16 %1 = tail call fast <256 x double> @llvm.ve.vl.vseq.vl(i32 256)
21 declare <256 x double> @llvm.ve.vl.vseq.vl(i32)
36 declare <256 x double> @llvm.ve.vl.vseq.vvl(<256 x double>, i32)
46 %1 = tail call fast <256 x double> @llvm.ve.vl.pvseqlo.vl(i32 256)
51 declare <256 x double> @llvm.ve.vl.pvseqlo.vl(i32)
66 declare <256 x double> @llvm.ve.vl.pvseqlo.vvl(<256 x double>, i32)
81 declare <256 x double> @llvm.ve.vl.pvsequp.vl(i32)
106 %1 = tail call fast <256 x double> @llvm.ve.vl.pvseq.vl(i32 256)
111 declare <256 x double> @llvm.ve.vl.pvseq.vl(i32)
[all …]
H A Dlvm.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
15 %3 = tail call <256 x i1> @llvm.ve.vl.lvm.mmss(<256 x i1> undef, i64 3, i64 %1)
16 %4 = tail call i64 @llvm.ve.vl.svm.sms(<256 x i1> %3, i64 3)
21 declare <256 x i1> @llvm.ve.vl.lvm.mmss(<256 x i1>, i64, i64)
24 declare i64 @llvm.ve.vl.svm.sms(<256 x i1>, i64)
35 %3 = tail call <512 x i1> @llvm.ve.vl.lvm.MMss(<512 x i1> undef, i64 5, i64 %1)
36 %4 = tail call i64 @llvm.ve.vl.svm.sMs(<512 x i1> %3, i64 3)
37 %5 = tail call i64 @llvm.ve.vl.svm.sMs(<512 x i1> %3, i64 6)
43 declare <512 x i1> @llvm.ve.vl.lvm.MMss(<512 x i1>, i64, i64)
46 declare i64 @llvm.ve.vl.svm.sMs(<512 x i1>, i64)
H A Dvld.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
25 declare <256 x double> @llvm.ve.vl.vld.vssl(i64, i8*, i32)
99 declare <256 x double> @llvm.ve.vl.vldnc.vssl(i64, i8*, i32)
173 declare <256 x double> @llvm.ve.vl.vldu.vssl(i64, i8*, i32)
247 declare <256 x double> @llvm.ve.vl.vldunc.vssl(i64, i8*, i32)
321 declare <256 x double> @llvm.ve.vl.vldlsx.vssl(i64, i8*, i32)
395 declare <256 x double> @llvm.ve.vl.vldlsxnc.vssl(i64, i8*, i32)
469 declare <256 x double> @llvm.ve.vl.vldlzx.vssl(i64, i8*, i32)
617 declare <256 x double> @llvm.ve.vl.vld2d.vssl(i64, i8*, i32)
691 declare <256 x double> @llvm.ve.vl.vld2dnc.vssl(i64, i8*, i32)
[all …]
H A Dvrsqrt.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
17 %2 = tail call fast <256 x double> @llvm.ve.vl.vrsqrtd.vvl(<256 x double> %0, i32 256)
22 declare <256 x double> @llvm.ve.vl.vrsqrtd.vvl(<256 x double>, i32)
40 declare <256 x double> @llvm.ve.vl.vrsqrtd.vvvl(<256 x double>, <256 x double>, i32)
55 declare <256 x double> @llvm.ve.vl.vrsqrts.vvl(<256 x double>, i32)
73 declare <256 x double> @llvm.ve.vl.vrsqrts.vvvl(<256 x double>, <256 x double>, i32)
88 declare <256 x double> @llvm.ve.vl.vrsqrtdnex.vvl(<256 x double>, i32)
121 declare <256 x double> @llvm.ve.vl.vrsqrtsnex.vvl(<256 x double>, i32)
154 declare <256 x double> @llvm.ve.vl.pvrsqrt.vvl(<256 x double>, i32)
172 declare <256 x double> @llvm.ve.vl.pvrsqrt.vvvl(<256 x double>, <256 x double>, i32)
[all …]
H A Dvrmax.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
16 %2 = tail call fast <256 x double> @llvm.ve.vl.vrmaxswfstsx.vvl(<256 x double> %0, i32 256)
21 declare <256 x double> @llvm.ve.vl.vrmaxswfstsx.vvl(<256 x double>, i32)
39 declare <256 x double> @llvm.ve.vl.vrmaxswfstsx.vvvl(<256 x double>, <256 x double>, i32)
54 declare <256 x double> @llvm.ve.vl.vrmaxswlstsx.vvl(<256 x double>, i32)
72 declare <256 x double> @llvm.ve.vl.vrmaxswlstsx.vvvl(<256 x double>, <256 x double>, i32)
87 declare <256 x double> @llvm.ve.vl.vrmaxswfstzx.vvl(<256 x double>, i32)
120 declare <256 x double> @llvm.ve.vl.vrmaxswlstzx.vvl(<256 x double>, i32)
153 declare <256 x double> @llvm.ve.vl.vrmaxslfst.vvl(<256 x double>, i32)
171 declare <256 x double> @llvm.ve.vl.vrmaxslfst.vvvl(<256 x double>, <256 x double>, i32)
[all …]
H A Dvrmin.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
16 %2 = tail call fast <256 x double> @llvm.ve.vl.vrminswfstsx.vvl(<256 x double> %0, i32 256)
21 declare <256 x double> @llvm.ve.vl.vrminswfstsx.vvl(<256 x double>, i32)
39 declare <256 x double> @llvm.ve.vl.vrminswfstsx.vvvl(<256 x double>, <256 x double>, i32)
54 declare <256 x double> @llvm.ve.vl.vrminswlstsx.vvl(<256 x double>, i32)
72 declare <256 x double> @llvm.ve.vl.vrminswlstsx.vvvl(<256 x double>, <256 x double>, i32)
87 declare <256 x double> @llvm.ve.vl.vrminswfstzx.vvl(<256 x double>, i32)
120 declare <256 x double> @llvm.ve.vl.vrminswlstzx.vvl(<256 x double>, i32)
153 declare <256 x double> @llvm.ve.vl.vrminslfst.vvl(<256 x double>, i32)
171 declare <256 x double> @llvm.ve.vl.vrminslfst.vvvl(<256 x double>, <256 x double>, i32)
[all …]
H A Dlcr.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
14 %3 = tail call i64 @llvm.ve.vl.lcr.sss(i64 %0, i64 %1)
19 declare i64 @llvm.ve.vl.lcr.sss(i64, i64)
27 tail call void @llvm.ve.vl.scr.sss(i64 %0, i64 %1, i64 %2)
32 declare void @llvm.ve.vl.scr.sss(i64, i64, i64)
45 declare i64 @llvm.ve.vl.tscr.ssss(i64, i64, i64)
53 %2 = tail call i64 @llvm.ve.vl.fidcr.sss(i64 %0, i32 0)
58 declare i64 @llvm.ve.vl.fidcr.sss(i64, i32)
66 %2 = tail call i64 @llvm.ve.vl.fidcr.sss(i64 %0, i32 1)
76 %2 = tail call i64 @llvm.ve.vl.fidcr.sss(i64 %0, i32 2)
[all …]
H A Dfence.ll1 ; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
6 tail call void @llvm.ve.vl.fencei()
11 declare void @llvm.ve.vl.fencei()
16 tail call void @llvm.ve.vl.fencem.s(i32 3)
21 declare void @llvm.ve.vl.fencem.s(i32)
26 tail call void @llvm.ve.vl.fencec.s(i32 7)
31 declare void @llvm.ve.vl.fencec.s(i32)
H A Dvfcmp.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
23 declare <256 x double> @llvm.ve.vl.vfcmpd.vvvl(<256 x double>, <256 x double>, i32)
51 %3 = tail call fast <256 x double> @llvm.ve.vl.vfcmpd.vsvl(double %0, <256 x double> %1, i32 256)
56 declare <256 x double> @llvm.ve.vl.vfcmpd.vsvl(double, <256 x double>, i32)
74 declare <256 x double> @llvm.ve.vl.vfcmpd.vsvvl(double, <256 x double>, <256 x double>, i32)
125 declare <256 x double> @llvm.ve.vl.vfcmps.vvvl(<256 x double>, <256 x double>, i32)
158 declare <256 x double> @llvm.ve.vl.vfcmps.vsvl(float, <256 x double>, i32)
176 declare <256 x double> @llvm.ve.vl.vfcmps.vsvvl(float, <256 x double>, <256 x double>, i32)
227 declare <256 x double> @llvm.ve.vl.pvfcmp.vvvl(<256 x double>, <256 x double>, i32)
260 declare <256 x double> @llvm.ve.vl.pvfcmp.vsvl(i64, <256 x double>, i32)
[all …]
H A Dvfmax.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
23 declare <256 x double> @llvm.ve.vl.vfmaxd.vvvl(<256 x double>, <256 x double>, i32)
51 %3 = tail call fast <256 x double> @llvm.ve.vl.vfmaxd.vsvl(double %0, <256 x double> %1, i32 256)
56 declare <256 x double> @llvm.ve.vl.vfmaxd.vsvl(double, <256 x double>, i32)
74 declare <256 x double> @llvm.ve.vl.vfmaxd.vsvvl(double, <256 x double>, <256 x double>, i32)
125 declare <256 x double> @llvm.ve.vl.vfmaxs.vvvl(<256 x double>, <256 x double>, i32)
158 declare <256 x double> @llvm.ve.vl.vfmaxs.vsvl(float, <256 x double>, i32)
176 declare <256 x double> @llvm.ve.vl.vfmaxs.vsvvl(float, <256 x double>, <256 x double>, i32)
227 declare <256 x double> @llvm.ve.vl.pvfmax.vvvl(<256 x double>, <256 x double>, i32)
260 declare <256 x double> @llvm.ve.vl.pvfmax.vsvl(i64, <256 x double>, i32)
[all …]
H A Dvfadd.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
23 declare <256 x double> @llvm.ve.vl.vfaddd.vvvl(<256 x double>, <256 x double>, i32)
51 %3 = tail call fast <256 x double> @llvm.ve.vl.vfaddd.vsvl(double %0, <256 x double> %1, i32 256)
56 declare <256 x double> @llvm.ve.vl.vfaddd.vsvl(double, <256 x double>, i32)
74 declare <256 x double> @llvm.ve.vl.vfaddd.vsvvl(double, <256 x double>, <256 x double>, i32)
125 declare <256 x double> @llvm.ve.vl.vfadds.vvvl(<256 x double>, <256 x double>, i32)
158 declare <256 x double> @llvm.ve.vl.vfadds.vsvl(float, <256 x double>, i32)
176 declare <256 x double> @llvm.ve.vl.vfadds.vsvvl(float, <256 x double>, <256 x double>, i32)
227 declare <256 x double> @llvm.ve.vl.pvfadd.vvvl(<256 x double>, <256 x double>, i32)
260 declare <256 x double> @llvm.ve.vl.pvfadd.vsvl(i64, <256 x double>, i32)
[all …]
H A Dvfmin.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
23 declare <256 x double> @llvm.ve.vl.vfmind.vvvl(<256 x double>, <256 x double>, i32)
51 %3 = tail call fast <256 x double> @llvm.ve.vl.vfmind.vsvl(double %0, <256 x double> %1, i32 256)
56 declare <256 x double> @llvm.ve.vl.vfmind.vsvl(double, <256 x double>, i32)
74 declare <256 x double> @llvm.ve.vl.vfmind.vsvvl(double, <256 x double>, <256 x double>, i32)
125 declare <256 x double> @llvm.ve.vl.vfmins.vvvl(<256 x double>, <256 x double>, i32)
158 declare <256 x double> @llvm.ve.vl.vfmins.vsvl(float, <256 x double>, i32)
176 declare <256 x double> @llvm.ve.vl.vfmins.vsvvl(float, <256 x double>, <256 x double>, i32)
227 declare <256 x double> @llvm.ve.vl.pvfmin.vvvl(<256 x double>, <256 x double>, i32)
260 declare <256 x double> @llvm.ve.vl.pvfmin.vsvl(i64, <256 x double>, i32)
[all …]
H A Dvfsub.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
23 declare <256 x double> @llvm.ve.vl.vfsubd.vvvl(<256 x double>, <256 x double>, i32)
51 %3 = tail call fast <256 x double> @llvm.ve.vl.vfsubd.vsvl(double %0, <256 x double> %1, i32 256)
56 declare <256 x double> @llvm.ve.vl.vfsubd.vsvl(double, <256 x double>, i32)
74 declare <256 x double> @llvm.ve.vl.vfsubd.vsvvl(double, <256 x double>, <256 x double>, i32)
125 declare <256 x double> @llvm.ve.vl.vfsubs.vvvl(<256 x double>, <256 x double>, i32)
158 declare <256 x double> @llvm.ve.vl.vfsubs.vsvl(float, <256 x double>, i32)
176 declare <256 x double> @llvm.ve.vl.vfsubs.vsvvl(float, <256 x double>, <256 x double>, i32)
227 declare <256 x double> @llvm.ve.vl.pvfsub.vvvl(<256 x double>, <256 x double>, i32)
260 declare <256 x double> @llvm.ve.vl.pvfsub.vsvl(i64, <256 x double>, i32)
[all …]
H A Dvfmul.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
23 declare <256 x double> @llvm.ve.vl.vfmuld.vvvl(<256 x double>, <256 x double>, i32)
51 %3 = tail call fast <256 x double> @llvm.ve.vl.vfmuld.vsvl(double %0, <256 x double> %1, i32 256)
56 declare <256 x double> @llvm.ve.vl.vfmuld.vsvl(double, <256 x double>, i32)
74 declare <256 x double> @llvm.ve.vl.vfmuld.vsvvl(double, <256 x double>, <256 x double>, i32)
125 declare <256 x double> @llvm.ve.vl.vfmuls.vvvl(<256 x double>, <256 x double>, i32)
158 declare <256 x double> @llvm.ve.vl.vfmuls.vsvl(float, <256 x double>, i32)
176 declare <256 x double> @llvm.ve.vl.vfmuls.vsvvl(float, <256 x double>, <256 x double>, i32)
227 declare <256 x double> @llvm.ve.vl.pvfmul.vvvl(<256 x double>, <256 x double>, i32)
260 declare <256 x double> @llvm.ve.vl.pvfmul.vsvl(i64, <256 x double>, i32)
[all …]
H A Dvsla.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
23 declare <256 x double> @llvm.ve.vl.vslawsx.vvvl(<256 x double>, <256 x double>, i32)
57 declare <256 x double> @llvm.ve.vl.vslawsx.vvsl(<256 x double>, i32, i32)
76 declare <256 x double> @llvm.ve.vl.vslawsx.vvsvl(<256 x double>, i32, <256 x double>, i32)
170 declare <256 x double> @llvm.ve.vl.vslawzx.vvvl(<256 x double>, <256 x double>, i32)
204 declare <256 x double> @llvm.ve.vl.vslawzx.vvsl(<256 x double>, i32, i32)
317 declare <256 x double> @llvm.ve.vl.vslal.vvvl(<256 x double>, <256 x double>, i32)
350 declare <256 x double> @llvm.ve.vl.vslal.vvsl(<256 x double>, i64, i32)
368 declare <256 x double> @llvm.ve.vl.vslal.vvsvl(<256 x double>, i64, <256 x double>, i32)
461 declare <256 x double> @llvm.ve.vl.pvsla.vvvl(<256 x double>, <256 x double>, i32)
[all …]
H A Dvmax.ll1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
23 declare <256 x double> @llvm.ve.vl.vmaxswsx.vvvl(<256 x double>, <256 x double>, i32)
57 declare <256 x double> @llvm.ve.vl.vmaxswsx.vsvl(i32, <256 x double>, i32)
76 declare <256 x double> @llvm.ve.vl.vmaxswsx.vsvvl(i32, <256 x double>, <256 x double>, i32)
170 declare <256 x double> @llvm.ve.vl.vmaxswzx.vvvl(<256 x double>, <256 x double>, i32)
204 declare <256 x double> @llvm.ve.vl.vmaxswzx.vsvl(i32, <256 x double>, i32)
317 declare <256 x double> @llvm.ve.vl.vmaxsl.vvvl(<256 x double>, <256 x double>, i32)
350 declare <256 x double> @llvm.ve.vl.vmaxsl.vsvl(i64, <256 x double>, i32)
368 declare <256 x double> @llvm.ve.vl.vmaxsl.vsvvl(i64, <256 x double>, <256 x double>, i32)
461 declare <256 x double> @llvm.ve.vl.pvmaxs.vvvl(<256 x double>, <256 x double>, i32)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/
H A Dfixed-vectors-vfwmacc.ll76 %vg = fneg <1 x float> %ve
147 %vf = fneg <1 x float> %ve
221 %vg = fneg <2 x float> %ve
292 %vf = fneg <2 x float> %ve
367 %vg = fneg <4 x float> %ve
438 %vf = fneg <4 x float> %ve
512 %vg = fneg <8 x float> %ve
583 %vf = fneg <8 x float> %ve
657 %vg = fneg <16 x float> %ve
728 %vf = fneg <16 x float> %ve
[all …]

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