Searched refs:vc2 (Results 1 – 6 of 6) sorted by relevance
| /llvm-project-15.0.7/compiler-rt/lib/tsan/tests/unit/ |
| H A D | tsan_vector_clock_test.cpp | 36 VectorClock *vc2 = nullptr; in TEST() local 39 vc1->Acquire(vc2); in TEST() 42 vc1->Release(&vc2); in TEST() 43 EXPECT_NE(vc2, nullptr); in TEST() 44 vc1->Acquire(vc2); in TEST() 52 vc1->Acquire(vc2); in TEST() 60 vc2->ReleaseStore(&vc3); in TEST() 69 vc2->Reset(); in TEST() 74 vc1->ReleaseAcquire(&vc2); in TEST() 83 vc2->Reset(); in TEST() [all …]
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| /llvm-project-15.0.7/clang/test/CodeGen/PowerPC/ |
| H A D | builtins-ppc-build-pair-mma.c | 21 …d test1(unsigned char *vqp, unsigned char *vpp, vector unsigned char vc1, vector unsigned char vc2, in test1() argument 26 __builtin_mma_build_acc(&res, vc1, vc2, vc3, vc4); in test1() 45 vector unsigned char vc2, unsigned char *resp) { in test2() argument 49 __builtin_vsx_build_pair(&res, vc1, vc2); in test2()
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | Nontemporal.cpp | 15 char __attribute__((vector_size(8))) vc1, vc2; variable 33 __builtin_nontemporal_store(vc1, &vc2); // CHECK: store <8 x i8>{{.*}}align 8, !nontemporal in test_all_sizes() 47 vc2 = __builtin_nontemporal_load(&vc1); // CHECK: load <8 x i8>{{.*}}align 8, !nontemporal in test_all_sizes()
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| /llvm-project-15.0.7/mlir/test/Dialect/SPIRV/Transforms/ |
| H A D | canonicalize.mlir | 231 %vc2 = spv.Constant dense<[-3, -15, 28]> : vector<3xi32> 234 %0 = spv.IAdd %vc1, %vc2 : vector<3xi32> 295 %vc2 = spv.Constant dense<[-3, -15, 28]> : vector<3xi32> 298 %0 = spv.IMul %vc1, %vc2 : vector<3xi32> 357 %vc2 = spv.Constant dense<[-3, -15, 28]> : vector<3xi32> 360 %0 = spv.ISub %vc1, %vc2 : vector<3xi32>
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | mma-acc-spill.ll | 12 define void @intrinsics1(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc3, <16 x i8> %vc4, ptr %ptr) { 115 …%1 = tail call <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc…
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| H A D | mma-outer-product.ll | 11 define void @intrinsics1(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc3, <16 x i8> %vc4, ptr %ptr) { 59 …12 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8> %vc1, <16 x i8> %vc3, <16 x i8> %vc2, <16 x i8> %vc4) 60 %2 = tail call <512 x i1> @llvm.ppc.mma.xvi4ger8pp(<512 x i1> %1, <16 x i8> %vc1, <16 x i8> %vc2) 62 …%4 = tail call <512 x i1> @llvm.ppc.mma.pmxvf32gerpn(<512 x i1> %3, <16 x i8> %vc2, <16 x i8> %vc4… 119 %vc2 = load <16 x i8>, ptr %ptr2, align 16 122 …%1 = tail call <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc… 123 %2 = tail call <512 x i1> @llvm.ppc.mma.xvi8ger4pp(<512 x i1> %1, <16 x i8> %vc1, <16 x i8> %vc2) 125 …%4 = tail call <512 x i1> @llvm.ppc.mma.pmxvf32gernn(<512 x i1> %3, <16 x i8> %vc2, <16 x i8> %vc4…
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