| /llvm-project-15.0.7/llvm/test/MC/ARM/ |
| H A D | vorr-vbic-illegal-cases.s | 40 vbic.i16 d2, #0xabab 41 vbic.i16 q2, #0xabab 52 @ CHECK: vbic.i16 d2, #0xabab 54 @ CHECK: vbic.i16 q2, #0xabab 57 vbic.i32 q2, #0x03ffff 58 vbic.i32 d2, #0x03ff 60 vbic.i16 d2, #0x03ff 61 vbic.i16 q2, #0xf0f0 69 @ CHECK: vbic.i32 d2, #0x03ff 73 @ CHECK: vbic.i16 d2, #0x03ff [all …]
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| H A D | neon-bitwise-encoding.s | 30 vbic d16, d17, d16 31 vbic q8, q8, q9 32 vbic q10, q11 33 vbic d9, d1 define 34 vbic.i16 d16, #0xFF00 35 vbic.i16 q8, #0xFF00 36 vbic.i16 d16, #0x00FF 37 vbic.i16 q8, #0x00FF 38 vbic.i32 d16, #0xFF000000 39 vbic.i32 q8, #0xFF000000 [all …]
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| H A D | mve-bitops.s | 51 vbic.i16 q0, #0x22 55 vbic.i32 q0, #0x1100 101 vbic q0, q1, q7 label 105 vbic.s8 q0, q1, q7 109 vbic.s16 q0, q1, q7 113 vbic.s32 q0, q1, q7 117 vbic.u8 q0, q1, q7 121 vbic.u16 q0, q1, q7 125 vbic.u32 q0, q1, q7 129 vbic.i8 q0, q1, q7 [all …]
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| H A D | neont2-bitwise-encoding.s | 28 vbic d16, d17, d16 29 vbic q8, q8, q9 30 @ vbic.i32 d16, #0xFF000000 31 @ vbic.i32 q8, #0xFF000000 33 @ CHECK: vbic d16, d17, d16 @ encoding: [0x51,0xef,0xb0,0x01] 34 @ CHECK: vbic q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x01]
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/ |
| H A D | mve-bitops.txt | 6 # CHECK: vbic q0, q1, q7 @ encoding: [0x12,0xef,0x5e,0x01] 62 # CHECK: vbic.i32 q0, #0x35 @ encoding: [0x83,0xef,0x75,0x01] 65 # CHECK: vbic.i32 q0, #0x3500 @ encoding: [0x83,0xef,0x75,0x03] 68 # CHECK: vbic.i32 q0, #0x350000 @ encoding: [0x83,0xef,0x75,0x05] 71 # CHECK: vbic.i32 q0, #0x35000000 @ encoding: [0x83,0xef,0x75,0x07] 74 # CHECK: vbic.i16 q0, #0x35 @ encoding: [0x83,0xef,0x75,0x09] 77 # CHECK: vbic.i16 q0, #0x3500 @ encoding: [0x83,0xef,0x75,0x0b]
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| H A D | neon-tests.txt | 78 # CHECK: vbic.i32 q2, #0xa900
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| H A D | neont2.txt | 300 # CHECK: vbic d16, d17, d16 302 # CHECK: vbic q8, q8, q9 304 # CHECK: vbic.i32 d16, #0xff000000 306 # CHECK: vbic.i32 q8, #0xff000000
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| H A D | neon.txt | 306 # CHECK: vbic d16, d17, d16 308 # CHECK: vbic q8, q8, q9 310 # CHECK: vbic.i32 d16, #0xff000000 312 # CHECK: vbic.i32 q8, #0xff000000
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| /llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/mve-intrinsics/ |
| H A D | bitwise-imm.ll | 7 ; CHECK-NEXT: vbic.i16 q0, #0x64 17 ; CHECK-NEXT: vbic.i16 q0, #0x6400 27 ; CHECK-NEXT: vbic.i32 q0, #0x64 37 ; CHECK-NEXT: vbic.i32 q0, #0x6400 47 ; CHECK-NEXT: vbic.i32 q0, #0x640000 57 ; CHECK-NEXT: vbic.i32 q0, #0x64000000
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| H A D | vbicq.ll | 7 ; CHECK-NEXT: vbic q0, q0, q1 18 ; CHECK-NEXT: vbic q0, q0, q1 29 ; CHECK-NEXT: vbic q0, q0, q1 40 ; CHECK-NEXT: vbic q0, q0, q1
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| /llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/ |
| H A D | mve-bitarith.ll | 170 ; CHECK-NEXT: vbic q0, q1, q0 181 ; CHECK-NEXT: vbic q0, q1, q0 192 ; CHECK-NEXT: vbic q0, q1, q0 203 ; CHECK-NEXT: vbic q0, q1, q0
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| H A D | urem-seteq-illegal-types.ll | 88 ; CHECK-NEXT: vbic.i16 d16, #0xf800 93 ; CHECK-NEXT: vbic.i16 d16, #0xf800
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| H A D | mve-selectcc.ll | 224 ; CHECK-NEXT: vbic q1, q1, q2
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| H A D | mve-saturating-arith.ll | 288 ; CHECK-NEXT: vbic q0, q1, q0
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | 2013-07-29-vector-or-combine.ll | 14 ; CHECK: vbic.i32 q8, #0xff
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| H A D | vbits.ll | 125 ; CHECK-NEXT: vbic d16, d17, d16 140 ; CHECK-NEXT: vbic d16, d17, d16 155 ; CHECK-NEXT: vbic d16, d17, d16 170 ; CHECK-NEXT: vbic d16, d17, d16 185 ; CHECK-NEXT: vbic q8, q9, q8 201 ; CHECK-NEXT: vbic q8, q9, q8 217 ; CHECK-NEXT: vbic q8, q9, q8 233 ; CHECK-NEXT: vbic q8, q9, q8 828 ; CHECK-NEXT: vbic.i32 d16, #0xff000000 840 ; CHECK-NEXT: vbic.i32 q8, #0xff000000 [all …]
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| H A D | urem-seteq-illegal-types.ll | 421 ; ARM7-NEXT: vbic.i16 d16, #0xf800 426 ; ARM7-NEXT: vbic.i16 d16, #0xf800 473 ; ARM8-NEXT: vbic.i16 d16, #0xf800 478 ; ARM8-NEXT: vbic.i16 d16, #0xf800 525 ; NEON7-NEXT: vbic.i16 d16, #0xf800 530 ; NEON7-NEXT: vbic.i16 d16, #0xf800 577 ; NEON8-NEXT: vbic.i16 d16, #0xf800 582 ; NEON8-NEXT: vbic.i16 d16, #0xf800
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| H A D | vsub.ll | 228 ; CHECK-NEXT: vbic.i16 q0, #0xff00 329 ; CHECK-NEXT: vbic.i16 q0, #0xff00
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| H A D | vadd.ll | 228 ; CHECK-NEXT: vbic.i16 q0, #0xff00 329 ; CHECK-NEXT: vbic.i16 q0, #0xff00
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| H A D | vpadd.ll | 352 ; CHECK-NEXT: vbic.i16 d16, #0xff00 353 ; CHECK-NEXT: vbic.i16 d17, #0xff00
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| H A D | vmls.ll | 160 ; CHECK-NEXT: vbic.i16 q0, #0xff00
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| H A D | vmla.ll | 160 ; CHECK-NEXT: vbic.i16 q0, #0xff00
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| H A D | vmul.ll | 290 ; CHECK-NEXT: vbic.i16 q0, #0xff00
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| /llvm-project-15.0.7/llvm/test/tools/llvm-mca/ARM/ |
| H A D | cortex-a57-neon-instructions.s | 144 vbic d16, d17, d16 145 vbic q8, q8, q9 146 vbic.i32 d16, #0xff000000 147 vbic.i32 q8, #0xff000000 1260 # CHECK-NEXT: 1 3 0.50 vbic d16, d17, d16 1261 # CHECK-NEXT: 1 3 0.50 vbic q8, q8, q9 1262 # CHECK-NEXT: 1 3 0.50 vbic.i32 d16, #0xff000000 1263 # CHECK-NEXT: 1 3 0.50 vbic.i32 q8, #0xff000000 2383 # CHECK-NEXT: - - - - - - 0.50 0.50 vbic d16, d17, d16 2384 # CHECK-NEXT: - - - - - - 0.50 0.50 vbic q8, q8, q9 [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrNEON.td | 5384 "vbic", "$Vd, $Vn, $Vm", "", 5389 "vbic", "$Vd, $Vn, $Vm", "", 5402 "vbic", "i16", "$Vd, $SIMM", "$src = $Vd", 5411 "vbic", "i32", "$Vd, $SIMM", "$src = $Vd", 5420 "vbic", "i16", "$Vd, $SIMM", "$src = $Vd", 5429 "vbic", "i32", "$Vd, $SIMM", "$src = $Vd", 8107 defm : NEONDTAnyInstAlias<"vbic${p}", "$Vd, $Vn, $Vm", 8109 defm : NEONDTAnyInstAlias<"vbic${p}", "$Vd, $Vn, $Vm", 9099 def : NEONMnemonicAlias<"vbicq", "vbic">;
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