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/llvm-project-15.0.7/llvm/lib/Support/Unix/
H A DREADME.txt5 are common to two or more variants of UNIX. For example, the directory
9 Posix - code that is specific to Posix variants of UNIX
11 SysV - code that is specific to System V variants of UNIX
H A DCOM.inc15 //=== is guaranteed to work on *all* UNIX variants.
H A DThreadLocal.inc15 //=== is guaranteed to work on *all* UNIX variants.
/llvm-project-15.0.7/mlir/lib/Reducer/
H A DReductionNode.cpp62 if (variants.empty() && getRanges().size() > 1) { in generateNewVariants()
66 variants.push_back(createNewNode(subRanges)); in generateNewVariants()
92 variants.push_back(createNewNode(subRanges)); in generateNewVariants()
94 variants.push_back(createNewNode(subRanges)); in generateNewVariants()
/llvm-project-15.0.7/lld/wasm/
H A DSymbolTable.cpp767 auto &variants = symVariants[CachedHashStringRef(sym->getName())]; in getFunctionVariant() local
768 if (variants.empty()) in getFunctionVariant()
769 variants.push_back(sym); in getFunctionVariant()
771 for (Symbol* v : variants) { in getFunctionVariant()
788 variants.push_back(variant); in getFunctionVariant()
908 std::vector<Symbol *> &variants = pair.second; in handleSymbolVariants() local
911 LLVM_DEBUG(dbgs() << "symbol with (" << variants.size() in handleSymbolVariants()
913 for (auto *s: variants) { in handleSymbolVariants()
922 for (auto *symbol : variants) { in handleSymbolVariants()
934 cast<FunctionSymbol>(variants[0]), in handleSymbolVariants()
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Reducer/
H A DReductionNode.h80 ArrayRef<ReductionNode *> getVariants() const { return variants; } in getVariants()
181 std::vector<ReductionNode *> variants; variable
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dstrlen-6.ll103 ; Exercise both variants of the GEP index.
126 ; Exercise both variants of the GEP index.
149 ; Exercise both variants of the GEP index.
172 ; Exercise both variants of the GEP index.
195 ; Exercise both variants of the GEP index.
218 ; Exercise both variants of the GEP index.
241 ; Exercise both variants of the GEP index.
/llvm-project-15.0.7/libclc/amdgcn/lib/math/
H A Dldexp.cl34 // This defines all the ldexp(floatN, intN) variants.
39 // This defines all the ldexp(doubleN, intN) variants.
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dsink-addsub-of-const.ll7 ; Outer 'add' is commutative - 2 variants.
31 ; Outer 'add' is commutative - 2 variants.
55 ; Outer 'add' is commutative - 2 variants.
156 ; Outer 'add' is commutative - 2 variants.
184 ; Outer 'add' is commutative - 2 variants.
212 ; Outer 'add' is commutative - 2 variants.
/llvm-project-15.0.7/clang/test/SemaObjC/
H A Dprotocols-suppress-conformance.m108 // Provide two variants of a base class, one that adopts ProtocolA and
113 // Provide two variants of a subclass that conform to ProtocolB. One
117 // From those, provide two variants that conformat to ProtocolB_Explicit
/llvm-project-15.0.7/clang/test/CodeGenObjC/
H A Dstret.m5 // <rdar://problem/9757015>: Don't use 'stret' variants on ARM64.
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dsink-addsub-of-const.ll8 ; Outer 'add' is commutative - 2 variants.
50 ; Outer 'add' is commutative - 2 variants.
92 ; Outer 'add' is commutative - 2 variants.
258 ; Outer 'add' is commutative - 2 variants.
294 ; Outer 'add' is commutative - 2 variants.
330 ; Outer 'add' is commutative - 2 variants.
H A D2010-10-08-cmpxchg8b.ll10 ; autogenerated from C source before 64-bit variants were supported.
H A Ddwarf-headers.ll22 ; There are 8 variants with 5 formats: v4 CU, v4 TU, v5 normal/partial CU,
23 ; v5 skeleton/split CU, v5 normal/split TU. Some v5 variants differ only
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrCDE.td166 // Registers for single-register variants of CX* instructions
174 // Registers for single-register variants of CX* instructions
258 // Base class for floating-point variants of CDE VCX* instructions
264 // Base class for vector variants of CDE VCX* instruction
295 // VCX1/VCX1A, base class for FP variants
356 // VCX2/VCX2A, base class for FP variants
426 // VCX3/VCX3A, base class for FP variants
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ScheduleBtVer2.td119 // This multiclass defines the resource usage for variants with and without
987 // fp variants.
990 // int variants.
999 // xmm fp variants.
1002 // xmm int variants.
1008 // ymm variants.
1038 // GPR variants.
1041 // MMX variants.
1044 // SSE variants.
1049 // AVX variants.
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DEXPInstructions.td55 // DONE variants have mayLoad = 1.
56 // ROW variants have an implicit use of M0.
/llvm-project-15.0.7/llvm/test/DebugInfo/WebAssembly/
H A Ddwarf-headers.ll24 ; There are 8 variants with 5 formats: v4 CU, v4 TU, v5 normal/partial CU,
25 ; v5 skeleton/split CU, v5 normal/split TU. Some v5 variants differ only
/llvm-project-15.0.7/llvm/lib/Support/Windows/
H A DThreadLocal.inc15 //=== is guaranteed to work on *all* Win32 variants.
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dvec_veqv_vnand_vorc.ll20 ; Test x vorc y and variants
/llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/readability/
H A Dcontainer-contains.rst24 …td::unordered_set``, ``std::map``, ``std::unordered_map`` and the corresponding multi-key variants.
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRDevices.td6 // :TODO: We define all devices with SRAM to have all variants of LD/ST/LDD/STD.
8 // avr2 (with SRAM) adds the rest of the variants.
27 // LD - all 9 variants
28 // ST - all 9 variants
29 // LDD - two variants for Y and Z
30 // STD - two variants for Y and Z
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dneon-mov-vfp.s6 @ The 32-bit variants of the NEON scalar move instructions are also available
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Dbug26185-2.ll5 ; extending variants in the backend, but the ldg/ldu selection code may pick
/llvm-project-15.0.7/libclc/generic/lib/math/
H A Dldexp.cl45 // This defines all the ldexp(GENTYPE, int) variants

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