| /llvm-project-15.0.7/libc/test/src/__support/ |
| H A D | uint128_test.cpp | 73 LL_UInt128 val9({0x01D762422C946590, 0x9F4F2726179A2245}); in TEST() local 76 EXPECT_EQ((val9 * val10), result5); in TEST() 77 EXPECT_EQ((val9 * val10), (val10 * val9)); in TEST()
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | cond-move-10.ll | 35 %val9 = load i64, i64 *%ptr9 50 %res = select i1 %cond, i64 %add8, i64 %val9 81 %val9 = load i32, i32 *%ptr9 96 %res = select i1 %cond, i32 %add8, i32 %val9
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| H A D | spill-01.ll | 182 %val9 = load float, float *%ptr9 195 store float %val9, float *%ptr9 226 %val9 = load double, double *%ptr9 239 store double %val9, double *%ptr9 336 %val9 = load i32, i32 *@g9 349 store i32 %val9, i32 *@g9 368 %val9 = load i64, i64 *@h9 381 store i64 %val9, i64 *@h9 412 %val9 = load volatile i64, i64 *@h9 444 %newval8 = phi i64 [ %val8, %entry ], [ %val9, %fallthru ] [all …]
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| H A D | int-add-11.ll | 146 %val9 = load volatile i32, i32 *%ptr 167 %add9 = add i32 %val9, 127 186 %new9 = phi i32 [ %val9, %entry ], [ %add9, %add ] 229 %val9 = load volatile i32, i32 *%ptr 250 %add9 = add i32 %val9, -128 269 %new9 = phi i32 [ %val9, %entry ], [ %add9, %add ]
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| H A D | int-add-12.ll | 145 %val9 = load volatile i64, i64 *%ptr 166 %add9 = add i64 %val9, 127 185 %new9 = phi i64 [ %val9, %entry ], [ %add9, %add ] 228 %val9 = load volatile i64, i64 *%ptr 249 %add9 = add i64 %val9, -128 268 %new9 = phi i64 [ %val9, %entry ], [ %add9, %add ]
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| H A D | fp-mul-02.ll | 113 %val9 = load float, float *%ptr9 125 %frob9 = fadd float %val9, %val9 126 %frob10 = fadd float %val9, %val10
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| H A D | fp-mul-04.ll | 133 %val9 = load double, double *%ptr9 145 %frob9 = fadd double %val9, %val9 146 %frob10 = fadd double %val9, %val10
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| H A D | fp-conv-03.ll | 106 %val9 = load volatile float, float *%ptr2 124 %ext9 = fpext float %val9 to fp128 142 store volatile float %val9, float *%ptr2
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| H A D | fp-conv-04.ll | 106 %val9 = load volatile double, double *%ptr2 124 %ext9 = fpext double %val9 to fp128 142 store volatile double %val9, double *%ptr2
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| H A D | fp-sqrt-02.ll | 93 %val9 = load volatile double, double *%ptr 111 %sqrt9 = call double @llvm.sqrt.f64(double %val9) 129 store volatile double %val9, double *%ptr
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| H A D | fp-sqrt-01.ll | 93 %val9 = load volatile float, float *%ptr 111 %sqrt9 = call float @llvm.sqrt.f32(float %val9) 129 store volatile float %val9, float *%ptr
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| H A D | int-conv-11.ll | 20 %val9 = load volatile i32, i32 *%ptr 53 %trunc9 = trunc i32 %val9 to i8 119 store volatile i32 %val9, i32 *%ptr 193 %val9 = load volatile i32, i32 *%ptr 226 %trunc9 = trunc i32 %val9 to i16 292 store volatile i32 %val9, i32 *%ptr
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| H A D | fp-mul-01.ll | 103 %val9 = load float, float *%ptr9 117 %mul9 = fmul float %mul8, %val9
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| H A D | fp-sub-02.ll | 103 %val9 = load double, double *%ptr9 117 %sub9 = fsub double %sub8, %val9
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| H A D | fp-sub-01.ll | 103 %val9 = load float, float *%ptr9 117 %sub9 = fsub float %sub8, %val9
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| H A D | fp-mul-03.ll | 103 %val9 = load double, double *%ptr9 117 %mul9 = fmul double %mul8, %val9
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| H A D | fp-div-01.ll | 103 %val9 = load float, float *%ptr9 117 %div9 = fdiv float %div8, %val9
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | regress-w29-reserved-with-fp.ll | 18 %val9 = load volatile i32, i32* @var 33 store volatile i32 %val9, i32* @var
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| H A D | callee-save.ll | 23 %val9 = load volatile float, float* @var 56 store volatile float %val9, float* @var
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| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/ |
| H A D | nacl-reserved-regs.ll | 16 %val9 = load volatile i32, i32* @var 32 store volatile i32 %val9, i32* @var
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| /llvm-project-15.0.7/polly/test/ScopDetect/ |
| H A D | profitability-large-basic-blocks.ll | 40 %val9 = fadd float %val8, 1.0 41 %val10 = fadd float %val9, 1.0
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/ |
| H A D | wrong-hoisting-iv.ll | 7 ; Test checks that LSR does not hoist increment of %val9 while expanding the other pieces of formula 139 %val9 = phi i32 [ 0, %bb ], [ %val35, %bb32 ] 147 %val13 = add i32 %val9, %val6 229 %val7 = phi i64 [ %val9, %bb12 ], [ 0, %bb ] 231 %val9 = add nuw nsw i64 %val7, 1
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-incorrect-fi-bookkeeping-bug.ll | 22 %val9 = call <4 x i32> asm sideeffect "; def $0", "=s" () #0 42 call void asm sideeffect "; use $0", "s"(<4 x i32> %val9) #0
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| H A D | attr-amdgpu-num-vgpr.ll | 18 %val9 = load volatile float, float addrspace(1)* @var 50 store volatile float %val9, float addrspace(1)* @var
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| /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/ |
| H A D | compress.ll | 99 %val9 = load volatile i32, i32* %b 100 %tst5 = icmp ult i32 %val8, %val9 101 %val10 = select i1 %tst5, i32 %val8, i32 %val9
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