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Searched refs:val8 (Results 1 – 25 of 126) sorted by relevance

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/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dspill-01.ll93 %val8 = load i32, i32 *%ptr8
105 store i32 %val8, i32 *%ptr8
135 %val8 = load i64, i64 *%ptr8
147 store i64 %val8, i64 *%ptr8
181 %val8 = load float, float *%ptr8
194 store float %val8, float *%ptr8
238 store double %val8, double *%ptr8
335 %val8 = load i32, i32 *@g8
348 store i32 %val8, i32 *@g8
367 %val8 = load i64, i64 *@h8
[all …]
H A Dcond-move-10.ll34 %val8 = load i64, i64 *%ptr8
47 %add8 = add i64 %add7, %val8
80 %val8 = load i32, i32 *%ptr8
93 %add8 = add i32 %add7, %val8
H A Dint-add-11.ll145 %val8 = load volatile i32, i32 *%ptr
166 %add8 = add i32 %val8, 127
185 %new8 = phi i32 [ %val8, %entry ], [ %add8, %add ]
228 %val8 = load volatile i32, i32 *%ptr
249 %add8 = add i32 %val8, -128
268 %new8 = phi i32 [ %val8, %entry ], [ %add8, %add ]
H A Dint-add-12.ll144 %val8 = load volatile i64, i64 *%ptr
165 %add8 = add i64 %val8, 127
184 %new8 = phi i64 [ %val8, %entry ], [ %add8, %add ]
227 %val8 = load volatile i64, i64 *%ptr
248 %add8 = add i64 %val8, -128
267 %new8 = phi i64 [ %val8, %entry ], [ %add8, %add ]
H A Dfp-conv-03.ll105 %val8 = load volatile float, float *%ptr2
123 %ext8 = fpext float %val8 to fp128
141 store volatile float %val8, float *%ptr2
H A Dfp-conv-04.ll105 %val8 = load volatile double, double *%ptr2
123 %ext8 = fpext double %val8 to fp128
141 store volatile double %val8, double *%ptr2
H A Dfp-sqrt-02.ll92 %val8 = load volatile double, double *%ptr
110 %sqrt8 = call double @llvm.sqrt.f64(double %val8)
128 store volatile double %val8, double *%ptr
H A Dfp-sqrt-01.ll92 %val8 = load volatile float, float *%ptr
110 %sqrt8 = call float @llvm.sqrt.f32(float %val8)
128 store volatile float %val8, float *%ptr
/llvm-project-15.0.7/libc/test/src/__support/
H A Duint128_test.cpp64 LL_UInt128 val8({0x8000800080008000, 0x8000800080008000}); in TEST() local
66 EXPECT_EQ((val7 * val8), result4); in TEST()
67 EXPECT_EQ((val7 * val8), (val8 * val7)); in TEST()
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dregress-w29-reserved-with-fp.ll17 %val8 = load volatile i32, i32* @var
32 store volatile i32 %val8, i32* @var
H A Daddsub-shifted.ll64 %val8 = sub i64 %shift8, %lhs64
65 store volatile i64 %val8, i64* @var64
124 %val8 = sub i64 %shift8, %lhs64
125 store volatile i64 %val8, i64* @var64
183 %val8 = sub i64 %shift8, %lhs64
184 store volatile i64 %val8, i64* @var64
H A Darm64_32-atomics.ll84 %val8 = trunc i64 %val to i8
85 ret i8 %val8
124 %val8 = trunc i64 %val to i8
125 ret i8 %val8
H A Dcallee-save.ll22 %val8 = load volatile float, float* @var
55 store volatile float %val8, float* @var
/llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/
H A Dwrong-hoisting-iv.ll138 %val8 = phi i64 [ 0, %bb ], [ %val34, %bb32 ]
140 %val10 = icmp ult i64 %val8, 65536
183 %val34 = add nuw nsw i64 %val8, 8
188 ; Test checks that LSR does not hoist increment of %val8 while expanding the other pieces of formula
230 %val8 = phi i32 [ %val16, %bb12 ], [ %val3, %bb ]
239 %val13 = select i1 false, i32 0, i32 %val8
240 %val14 = add i32 %val8, %val1
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A D2011-03-15-LdStMultipleBug.ll11 define void @main(i8 %val8) nounwind {
39 %phitmp27 = icmp eq i8 %val8, 0
H A Dldaex-stlex.ll40 %val8 = trunc i32 %val to i8
41 ret i8 %val8
H A Dldstrex.ll42 %val8 = trunc i32 %val to i8
43 ret i8 %val8
242 %val8 = trunc i32 %val to i8
243 ret i8 %val8
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Delf-globaladdress.ll15 %val8 = load i8, i8* @var8
16 store volatile i8 %val8, i8* @var8
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dnacl-reserved-regs.ll15 %val8 = load volatile i32, i32* @var
31 store volatile i32 %val8, i32* @var
/llvm-project-15.0.7/polly/test/ScopDetect/
H A Dprofitability-large-basic-blocks.ll39 %val8 = fadd float %val7, 1.0
40 %val9 = fadd float %val8, 1.0
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb/
H A D2009-08-20-ISelBug.ll42 %val8 = bitcast i64* %val to i8* ; <i8*> [#uses=1]
43 …%12 = call i32 @fread(i8* noalias %val8, i32 8, i32 1, %struct.FILE* noalias %11) nounwind ; <i32…
H A Dragreedy-implicit-def.ll31 %val8 = load i32, i32* %gep8, align 4
42 %phi8a = phi i32 [ %val8, %if ], [ undef, %entry ]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dsgpr-spill-incorrect-fi-bookkeeping-bug.ll21 %val8 = call <2 x i32> asm sideeffect "; def $0", "=s" () #0
41 call void asm sideeffect "; use $0", "s"(<2 x i32> %val8) #0
H A Dattr-amdgpu-num-vgpr.ll17 %val8 = load volatile float, float addrspace(1)* @var
49 store volatile float %val8, float addrspace(1)* @var
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dcompress.ll97 %val8 = select i1 %tst4, i32 %val6, i32 %val7
100 %tst5 = icmp ult i32 %val8, %val9
101 %val10 = select i1 %tst5, i32 %val8, i32 %val9

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