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/llvm-project-15.0.7/clang/test/Sema/
H A Dbuiltin-amdgcn-atomic-inc-dec-failure.cpp12 __UINT32_TYPE__ val32; in test_host() local
16 val32 = __builtin_amdgcn_atomic_inc32(&val32, val32, __ATOMIC_SEQ_CST, ""); in test_host()
22 val32 = __builtin_amdgcn_atomic_dec32(&val32, val32, __ATOMIC_SEQ_CST, ""); in test_host()
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dextend-bit-ops-i16.ll13 %val32 = zext i16 %val16 to i32
14 store i32 %val32, i32 addrspace(1)* %out
28 %val32 = zext i16 %val16 to i32
29 store i32 %val32, i32 addrspace(1)* %out
43 %val32 = zext i16 %val16 to i32
44 store i32 %val32, i32 addrspace(1)* %out
H A Dattr-amdgpu-flat-work-group-size.ll76 %val32 = load volatile float, float addrspace(1)* @var
118 store volatile float %val32, float addrspace(1)* @var
H A Dattr-amdgpu-flat-work-group-size-v3.ll76 %val32 = load volatile float, float addrspace(1)* @var
118 store volatile float %val32, float addrspace(1)* @var
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64_32-memcpy.ll17 %val32 = trunc i64 %val64 to i32
18 %val.ptr = inttoptr i32 %val32 to i8*
37 %val32 = trunc i64 %val64 to i32
38 %val.ptr = inttoptr i32 %val32 to i8*
57 %val32 = trunc i64 %val64 to i32
58 %val.ptr = inttoptr i32 %val32 to i8*
H A Dhalf.ll62 %val32 = fpext half %val16 to float
63 ret float %val32
73 %val32 = fpext half %val16 to double
74 ret double %val32
H A Dmisched-fusion-addr.ll38 %val32 = trunc i64 %add to i32
39 store volatile i32 %val32, i32* @var_32bit
50 %val32 = load volatile i32, i32* @var_32bit
51 %ext = zext i32 %val32 to i64
H A Dbitfield.ll83 define dso_local void @test_shifts(i32 %val32, i64 %val64) {
86 %shift1 = ashr i32 %val32, 31
90 %shift2 = lshr i32 %val32, 8
94 %shift3 = shl i32 %val32, 1
118 %shift9 = lshr i32 %val32, 31
122 %shift10 = shl i32 %val32, 31
H A Darm64-register-offset-addressing.ll67 %val32 = load volatile i32, i32* @var_32bit
68 %val16_trunc32 = trunc i32 %val32 to i16
102 %val32 = load volatile i32, i32* @var_32bit
103 store volatile i32 %val32, i32* %addr_uxtwN
H A Darm64-fp128.ll96 %val32 = fptosi fp128 %val to i32
97 store i32 %val32, i32* @var32
127 %val32 = fptoui fp128 %val to i32
128 store i32 %val32, i32* @var32
156 %val32 = sitofp i32 %src32 to fp128
157 store volatile fp128 %val32, fp128* @lhs
186 %val32 = uitofp i32 %src32 to fp128
187 store volatile fp128 %val32, fp128* @lhs
H A Darm64_32-atomics.ll102 %val32 = trunc i64 %val to i32
103 ret i32 %val32
142 %val32 = trunc i64 %val to i32
143 ret i32 %val32
H A Dldst-unscaledimm.ll60 %val32 = load volatile i32, i32* @var_32bit
61 %val8_trunc32 = trunc i32 %val32 to i8
127 %val32 = load volatile i32, i32* @var_32bit
128 %val16_trunc32 = trunc i32 %val32 to i16
H A Dcallee-save.ll46 %val32 = load volatile float, float* @var
79 store volatile float %val32, float* @var
H A Daddsub.ll28 %val32 = load i32, i32* @var_i32
29 %newval32 = add i32 %val32, 4095
87 %val32 = load i32, i32* @var_i32
88 %newval32 = add i32 %val32, 14610432 ; =0xdef000
114 %val32 = load i32, i32* @var_i32
115 %newval32 = sub i32 %val32, 4095
141 %val32 = load i32, i32* @var_i32
142 %newval32 = sub i32 %val32, 14610432 ; =0xdef000
H A Dldst-unsignedimm.ll69 define void @st_i32_8(i32 %val32) {
75 %val8_trunc32 = trunc i32 %val32 to i8
148 define void @st_i32_16(i32 %val32) {
154 %val16_trunc32 = trunc i32 %val32 to i16
H A Dldst-regoffset.ll87 %val32 = load volatile i32, i32* @var_32bit
88 %val16_trunc32 = trunc i32 %val32 to i16
140 %val32 = load volatile i32, i32* @var_32bit
141 store volatile i32 %val32, i32* %addr_uxtwN
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Dhalf.ll42 %val32 = fpext half %val16 to float
43 store float %val32, float addrspace(1)* %out
61 %val32 = load float, float addrspace(1)* %in
62 %val16 = fptrunc float %val32 to half
71 %val32 = load double, double addrspace(1)* %in
72 %val16 = fptrunc double %val32 to half
/llvm-project-15.0.7/llvm/test/CodeGen/MIR/AArch64/
H A Dexpected-target-flag-name.mir10 %val32 = load i32, i32* @var_i32
11 ret i32 %val32
H A Dinvalid-target-flag-name.mir10 %val32 = load i32, i32* @var_i32
11 ret i32 %val32
H A Dtarget-flags.mir10 %val32 = load i32, i32* @var_i32
11 %newval32 = sub i32 %val32, 4095
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dhalf.ll44 %val32 = fpext half %val16 to float
45 ret float %val32
59 %val32 = fpext half %val16 to double
60 ret double %val32
/llvm-project-15.0.7/libc/test/src/__support/
H A Duint128_test.cpp136 int val32 = 0x0f0f0f0f; in TEST() local
142 EXPECT_EQ((base & val32), result32); in TEST()
149 int val32 = 0x0f0f0f0f; in TEST() local
155 EXPECT_EQ((base | val32), result32); in TEST()
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dselect-store.mir687 ; CHECK-NEXT: %val32:gpr32 = COPY $w1
689 ; CHECK-NEXT: STRBBui %val32, [[COPY]], 0 :: (store (s8))
690 ; CHECK-NEXT: STRBBui %val32, [[COPY]], 43 :: (store (s8))
691 ; CHECK-NEXT: STRHHui %val32, [[COPY]], 0 :: (store (s16))
692 ; CHECK-NEXT: STURHHi %val32, [[COPY]], 43 :: (store (s16))
702 %val32:gpr(s32) = COPY $w1
704 G_STORE %val32, %0 :: (store (s8))
708 G_STORE %val32, %newptr :: (store (s8))
710 G_STORE %val32, %0 :: (store (s16))
712 G_STORE %val32, %newptr :: (store (s16))
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Delf-globaladdress.ll21 %val32 = load i32, i32* @var32
22 store volatile i32 %val32, i32* @var32
/llvm-project-15.0.7/polly/test/ScopDetect/
H A Dprofitability-large-basic-blocks.ll63 %val32 = fadd float %val31, 1.0
64 %val33 = fadd float %val32, 1.0

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