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Searched refs:v_sin_f32 (Results 1 – 22 of 22) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dllvm.sin.ll17 ; GCN: v_sin_f32
30 ; GCN: v_sin_f32
45 ; GCN: v_sin_f32
60 ; GCN: v_sin_f32
74 ; GCN: v_sin_f32
89 ; GCN: v_sin_f32
104 ; GCN: v_sin_f32
118 ; GCN: v_sin_f32
132 ; GCN: v_sin_f32
146 ; GCN: v_sin_f32
[all …]
H A Dllvm.amdgcn.sin.ll6 ; GCN-LABEL: {{^}}v_sin_f32:
8 define amdgpu_kernel void @v_sin_f32(float addrspace(1)* %out, float %src) #1 {
/llvm-project-15.0.7/llvm/test/MC/AMDGPU/
H A Dexpressions.s302 v_sin_f32 v0, -v label
318 v_sin_f32 v0, -v[0] label
322 v_sin_f32 v0, -s0 label
326 v_sin_f32 v0, -[ttmp0] label
335 v_sin_f32 v0, -s1000 label
339 v_sin_f32 v0, xnack_mask_lo label
H A Dgfx7_asm_vop1.s3450 v_sin_f32 v5, v1 label
3453 v_sin_f32 v255, v1 label
3456 v_sin_f32 v5, v255 label
3459 v_sin_f32 v5, s1 label
3462 v_sin_f32 v5, s103 label
3471 v_sin_f32 v5, vcc_lo label
3492 v_sin_f32 v5, m0 label
3501 v_sin_f32 v5, 0 label
3504 v_sin_f32 v5, -1 label
3507 v_sin_f32 v5, 0.5 label
[all …]
H A Dvop1.s210 v_sin_f32 v1, v2 label
H A Dgfx11_asm_dpp8.s79 v_sin_f32 v5, v1 dpp8:[0,1,2,3,4,5,6,7] label
331 v_sin_f32 v5, v1 dpp8:[0,1,2,3,4,5,6,7] fi:1 label
H A Dgfx11_asm_dpp16.s142 v_sin_f32 v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 label
418 v_sin_f32 v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 label
H A Dvop_sdwa.s56 v_sin_f32 v0, v0 dst_unused:UNUSED_PAD src0_sel:WORD_1 label
96 v_sin_f32 v0, -abs(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 label
137 v_sin_f32 v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 label
H A Dgfx8_asm_vop1.s2937 v_sin_f32 v5, v1 label
2940 v_sin_f32 v255, v1 label
2943 v_sin_f32 v5, v255 label
2946 v_sin_f32 v5, s1 label
2949 v_sin_f32 v5, s101 label
2958 v_sin_f32 v5, vcc_lo label
2979 v_sin_f32 v5, m0 label
2988 v_sin_f32 v5, 0 label
2991 v_sin_f32 v5, -1 label
2994 v_sin_f32 v5, 0.5 label
[all …]
H A Dgfx11_vop123.s12733 v_sin_f32 v5, v1 label
12736 v_sin_f32 v255, v1 label
12739 v_sin_f32 v5, v255 label
12742 v_sin_f32 v5, s1 label
12745 v_sin_f32 v5, s103 label
12748 v_sin_f32 v5, vcc_lo label
12754 v_sin_f32 v5, m0 label
12763 v_sin_f32 v5, 0 label
12766 v_sin_f32 v5, -1 label
12769 v_sin_f32 v5, 0.5 label
[all …]
H A Dvop_dpp.s152 v_sin_f32 v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
H A Dgfx9_asm_vop1.s2529 v_sin_f32 v5, v1 label
2532 v_sin_f32 v255, v1 label
2535 v_sin_f32 v5, v255 label
2538 v_sin_f32 v5, s1 label
2541 v_sin_f32 v5, s101 label
2550 v_sin_f32 v5, vcc_lo label
2559 v_sin_f32 v5, m0 label
2568 v_sin_f32 v5, 0 label
2571 v_sin_f32 v5, -1 label
2574 v_sin_f32 v5, 0.5 label
[all …]
H A Dgfx10_asm_vop1.s8278 v_sin_f32 v5, v1 label
8281 v_sin_f32 v255, v1 label
8284 v_sin_f32 v5, v255 label
8287 v_sin_f32 v5, s1 label
8290 v_sin_f32 v5, s103 label
8293 v_sin_f32 v5, vcc_lo label
8302 v_sin_f32 v5, m0 label
8311 v_sin_f32 v5, 0 label
8314 v_sin_f32 v5, -1 label
8317 v_sin_f32 v5, 0.5 label
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DVOP1Instructions.td308 defm V_SIN_F32 : VOP1Inst <"v_sin_f32", VOP_F32_F32, AMDGPUsin>;
/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX7.rst713 …v_sin_f32 :ref:`vdst<amdgpu_synid_gfx7_vdst_89680f>`, :ref:`src<amdgpu_sy…
H A DAMDGPUAsmGFX8.rst848 …v_sin_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_sy…
H A DAMDGPUAsmGFX90a.rst944 …v_sin_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<a…
H A DAMDGPUAsmGFX9.rst1034 …v_sin_f32 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`src<amd…
H A DAMDGPUAsmGFX10.rst1425 …v_sin_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`src<amdgpu_…
H A DAMDGPUAsmGFX1030.rst1334 …v_sin_f32 :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`src<amdgp…
H A DAMDGPUAsmGFX940.rst928 …v_sin_f32 :ref:`vdst<amdgpu_synid_gfx940_vdst_89680f>`, :ref:`src<a…
/llvm-project-15.0.7/llvm/docs/
H A DAMDGPUUsage.rst14517 v_sin_f32 v0, v0 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0
14531 v_sin_f32 v0, v0 dst_unused:UNUSED_PAD src0_sel:WORD_1