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Searched refs:v_mac_f32_dpp (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/llvm/test/MC/AMDGPU/
H A Dgfx940_err.s9 v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf label
12 v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] label
H A Dgfx10_asm_dpp16.s318 v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 label
606 v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 label
H A Dgfx8_asm_vop2.s7971 v_mac_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
7983 v_mac_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
7986 v_mac_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
7989 v_mac_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
7992 v_mac_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
7995 v_mac_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
7998 v_mac_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
8001 v_mac_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
8007 v_mac_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
8022 v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s8727 v_mac_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
8739 v_mac_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
8742 v_mac_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
8745 v_mac_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
8748 v_mac_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
8751 v_mac_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
8754 v_mac_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
8757 v_mac_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
8763 v_mac_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
8778 v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx7_unsupported.s2709 v_mac_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AMDGPU/
H A Ddpp_vi.txt90 # VI: v_mac_f32_dpp v76, v76, v114 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf ; encoding: [0xf…
H A Dgfx10_dasm_dpp8.txt536 # GFX10: v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x3e,0x01,0x77…
539 # GFX10: v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x3e,0x01…
H A Dgfx10_dasm_dpp16.txt316 # GFX10: v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,…
597 # GFX10: v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: […
H A Dgfx9_dasm_all.txt96485 # CHECK: v_mac_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
96497 # CHECK: v_mac_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
96500 # CHECK: v_mac_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
96503 # CHECK: v_mac_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
96506 # CHECK: v_mac_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
96509 # CHECK: v_mac_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
96512 # CHECK: v_mac_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
96515 # CHECK: v_mac_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
96518 # CHECK: v_mac_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
96521 # CHECK: v_mac_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
[all …]
H A Dgfx8_dasm_all.txt105023 # CHECK: v_mac_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
105035 # CHECK: v_mac_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
105038 # CHECK: v_mac_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
105041 # CHECK: v_mac_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
105044 # CHECK: v_mac_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
105047 # CHECK: v_mac_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
105050 # CHECK: v_mac_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
105053 # CHECK: v_mac_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
105056 # CHECK: v_mac_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a…
105059 # CHECK: v_mac_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,…
[all …]
/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX10.rst93 …v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu…
200 …v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`v…
H A DAMDGPUAsmGFX8.rst919 …v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_g…
H A DAMDGPUAsmGFX90a.rst1031 …v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid…
H A DAMDGPUAsmGFX9.rst1108 …v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_g…