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Searched refs:usub (Results 1 – 25 of 127) sorted by relevance

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/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dusubo.ll14 %usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b) #0
15 %val = extractvalue { i64, i1 } %usub, 0
16 %carry = extractvalue { i64, i1 } %usub, 1
35 %usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
36 %val = extractvalue { i32, i1 } %usub, 0
59 %usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
101 %usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
129 %usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
154 %usub = call { i16, i1 } @llvm.usub.with.overflow.i16(i16 %a, i16 %b)
184 %usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AArch64/
H A Darith-usat.ll111 declare i64 @llvm.usub.sat.i64(i64, i64)
116 declare i32 @llvm.usub.sat.i32(i32, i32)
122 declare i16 @llvm.usub.sat.i16(i16, i16)
129 declare i8 @llvm.usub.sat.i8(i8, i8)
130 declare <2 x i8> @llvm.usub.sat.v2i8(<2 x i8>, <2 x i8>)
131 declare <4 x i8> @llvm.usub.sat.v4i8(<4 x i8>, <4 x i8>)
132 declare <8 x i8> @llvm.usub.sat.v8i8(<8 x i8>, <8 x i8>)
188 %I64 = call i64 @llvm.usub.sat.i64(i64 undef, i64 undef)
193 %I32 = call i32 @llvm.usub.sat.i32(i32 undef, i32 undef)
199 %I16 = call i16 @llvm.usub.sat.i16(i16 undef, i16 undef)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Darith-usat.ll252 declare i64 @llvm.usub.sat.i64(i64, i64)
253 declare <2 x i64> @llvm.usub.sat.v2i64(<2 x i64>, <2 x i64>)
254 declare <4 x i64> @llvm.usub.sat.v4i64(<4 x i64>, <4 x i64>)
255 declare <8 x i64> @llvm.usub.sat.v8i64(<8 x i64>, <8 x i64>)
257 declare i32 @llvm.usub.sat.i32(i32, i32)
262 declare i16 @llvm.usub.sat.i16(i16, i16)
267 declare i8 @llvm.usub.sat.i8(i8, i8)
463 %I64 = call i64 @llvm.usub.sat.i64(i64 undef, i64 undef)
468 %I32 = call i32 @llvm.usub.sat.i32(i32 undef, i32 undef)
473 %I16 = call i16 @llvm.usub.sat.i16(i16 undef, i16 undef)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AMDGPU/
H A Darith-usat.ll192 declare i64 @llvm.usub.sat.i64(i64, i64)
198 declare i32 @llvm.usub.sat.i32(i32, i32)
205 declare i16 @llvm.usub.sat.i16(i16, i16)
213 declare i8 @llvm.usub.sat.i8(i8, i8)
214 declare <2 x i8> @llvm.usub.sat.v2i8(<2 x i8>, <2 x i8>)
215 declare <4 x i8> @llvm.usub.sat.v4i8(<4 x i8>, <4 x i8>)
216 declare <8 x i8> @llvm.usub.sat.v8i8(<8 x i8>, <8 x i8>)
339 %I64 = call i64 @llvm.usub.sat.i64(i64 undef, i64 undef)
345 %I32 = call i32 @llvm.usub.sat.i32(i32 undef, i32 undef)
352 %I16 = call i16 @llvm.usub.sat.i16(i16 undef, i16 undef)
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/ARM/
H A Darith-usat.ll217 declare i64 @llvm.usub.sat.i64(i64, i64)
222 declare i32 @llvm.usub.sat.i32(i32, i32)
228 declare i16 @llvm.usub.sat.i16(i16, i16)
235 declare i8 @llvm.usub.sat.i8(i8, i8)
236 declare <2 x i8> @llvm.usub.sat.v2i8(<2 x i8>, <2 x i8>)
237 declare <4 x i8> @llvm.usub.sat.v4i8(<4 x i8>, <4 x i8>)
238 declare <8 x i8> @llvm.usub.sat.v8i8(<8 x i8>, <8 x i8>)
394 %I64 = call i64 @llvm.usub.sat.i64(i64 undef, i64 undef)
399 %I32 = call i32 @llvm.usub.sat.i32(i32 undef, i32 undef)
405 %I16 = call i16 @llvm.usub.sat.i16(i16 undef, i16 undef)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dusub_sat_vec.ll4 declare <1 x i8> @llvm.usub.sat.v1i8(<1 x i8>, <1 x i8>)
5 declare <2 x i8> @llvm.usub.sat.v2i8(<2 x i8>, <2 x i8>)
6 declare <4 x i8> @llvm.usub.sat.v4i8(<4 x i8>, <4 x i8>)
7 declare <8 x i8> @llvm.usub.sat.v8i8(<8 x i8>, <8 x i8>)
8 declare <12 x i8> @llvm.usub.sat.v12i8(<12 x i8>, <12 x i8>)
9 declare <16 x i8> @llvm.usub.sat.v16i8(<16 x i8>, <16 x i8>)
10 declare <32 x i8> @llvm.usub.sat.v32i8(<32 x i8>, <32 x i8>)
11 declare <64 x i8> @llvm.usub.sat.v64i8(<64 x i8>, <64 x i8>)
13 declare <1 x i16> @llvm.usub.sat.v1i16(<1 x i16>, <1 x i16>)
14 declare <2 x i16> @llvm.usub.sat.v2i16(<2 x i16>, <2 x i16>)
[all …]
H A Dusub_sat.ll4 declare i4 @llvm.usub.sat.i4(i4, i4)
5 declare i8 @llvm.usub.sat.i8(i8, i8)
6 declare i16 @llvm.usub.sat.i16(i16, i16)
7 declare i32 @llvm.usub.sat.i32(i32, i32)
8 declare i64 @llvm.usub.sat.i64(i64, i64)
16 %tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %y);
26 %tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %y);
37 %tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %y);
48 %tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %y);
60 %tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %y);
H A Dusub_sat_plus.ll4 declare i4 @llvm.usub.sat.i4(i4, i4)
5 declare i8 @llvm.usub.sat.i8(i8, i8)
6 declare i16 @llvm.usub.sat.i16(i16, i16)
7 declare i32 @llvm.usub.sat.i32(i32, i32)
8 declare i64 @llvm.usub.sat.i64(i64, i64)
18 %tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %a)
29 %tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %z)
42 %tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %a)
55 %tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %a)
69 %tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %a)
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dusubo.ll4 declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64)
5 declare { i8, i1 } @llvm.usub.with.overflow.i8(i8, i8)
13 %res = tail call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
22 %res = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 0)
32 %res = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 1)
42 %res = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 2)
52 %res = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 3)
62 %res = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 4)
73 %res = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 127)
83 %res = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 128)
[all …]
H A Dunsigned_saturated_sub.ll5 ; usub.sat() intrinsics is tested here.
11 ; (a > b) ? a - b : 0 -> usub.sat(a, b)
24 ; (a >= b) ? a - b : 0 -> usub.sat(a, b)
83 ; (a > b) ? a - b : 0 -> usub.sat(a, b)
97 ; (b < a) ? a - b : 0 -> usub.sat(a, b)
114 ; (b > a) ? 0 : a - b -> usub.sat(a, b)
131 ; (a < b) ? 0 : a - b -> usub.sat(a, b)
144 ; ((a > b) ? b - a : 0) -> -usub.sat(a, b)
162 ; ((b < a) ? b - a : 0) -> -usub.sat(a, b)
176 ; ((b > a) ? 0 : b - a) -> -usub.sat(a, b)
[all …]
H A Dusub-overflow-known-by-implied-cond.ll5 declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32)
22 %sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
50 %sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
78 %sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
106 %sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
135 %sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
162 %sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
192 %sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
222 %sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
252 %sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Darith-sub-usat.ll23 declare i64 @llvm.usub.sat.i64(i64, i64)
24 declare i32 @llvm.usub.sat.i32(i32, i32)
25 declare i16 @llvm.usub.sat.i16(i16, i16)
26 declare i8 @llvm.usub.sat.i8 (i8 , i8 )
98 %r0 = call i64 @llvm.usub.sat.i64(i64 %a0, i64 %b0)
99 %r1 = call i64 @llvm.usub.sat.i64(i64 %a1, i64 %b1)
100 %r2 = call i64 @llvm.usub.sat.i64(i64 %a2, i64 %b2)
101 %r3 = call i64 @llvm.usub.sat.i64(i64 %a3, i64 %b3)
102 %r4 = call i64 @llvm.usub.sat.i64(i64 %a4, i64 %b4)
103 %r5 = call i64 @llvm.usub.sat.i64(i64 %a5, i64 %b5)
[all …]
H A Darith-sub-usubo.ll23 declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64)
24 declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32)
25 declare {i16, i1} @llvm.usub.with.overflow.i16(i16, i16)
26 declare {i8 , i1} @llvm.usub.with.overflow.i8 (i8 , i8 )
88 %c0 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a0, i64 %b0)
89 %c1 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a1, i64 %b1)
90 %c2 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a2, i64 %b2)
91 %c3 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a3, i64 %b3)
92 %c4 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a4, i64 %b4)
93 %c5 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a5, i64 %b5)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/
H A Dfixed-vectors-vssubu.ll7 declare <2 x i8> @llvm.usub.sat.v2i8(<2 x i8>, <2 x i8>)
15 %v = call <2 x i8> @llvm.usub.sat.v2i8(<2 x i8> %va, <2 x i8> %b)
44 declare <4 x i8> @llvm.usub.sat.v4i8(<4 x i8>, <4 x i8>)
81 declare <8 x i8> @llvm.usub.sat.v8i8(<8 x i8>, <8 x i8>)
118 declare <16 x i8> @llvm.usub.sat.v16i8(<16 x i8>, <16 x i8>)
155 declare <2 x i16> @llvm.usub.sat.v2i16(<2 x i16>, <2 x i16>)
192 declare <4 x i16> @llvm.usub.sat.v4i16(<4 x i16>, <4 x i16>)
229 declare <8 x i16> @llvm.usub.sat.v8i16(<8 x i16>, <8 x i16>)
303 declare <2 x i32> @llvm.usub.sat.v2i32(<2 x i32>, <2 x i32>)
340 declare <4 x i32> @llvm.usub.sat.v4i32(<4 x i32>, <4 x i32>)
[all …]
H A Dvssubu-sdnode.ll7 declare <vscale x 1 x i8> @llvm.usub.sat.nxv1i8(<vscale x 1 x i8>, <vscale x 1 x i8>)
15 %v = call <vscale x 1 x i8> @llvm.usub.sat.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b)
44 declare <vscale x 2 x i8> @llvm.usub.sat.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i8>)
81 declare <vscale x 4 x i8> @llvm.usub.sat.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i8>)
118 declare <vscale x 8 x i8> @llvm.usub.sat.nxv8i8(<vscale x 8 x i8>, <vscale x 8 x i8>)
155 declare <vscale x 16 x i8> @llvm.usub.sat.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>)
192 declare <vscale x 32 x i8> @llvm.usub.sat.nxv32i8(<vscale x 32 x i8>, <vscale x 32 x i8>)
229 declare <vscale x 64 x i8> @llvm.usub.sat.nxv64i8(<vscale x 64 x i8>, <vscale x 64 x i8>)
266 declare <vscale x 1 x i16> @llvm.usub.sat.nxv1i16(<vscale x 1 x i16>, <vscale x 1 x i16>)
303 declare <vscale x 2 x i16> @llvm.usub.sat.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i16>)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dint-usub-10.ll16 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 1)
32 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 128)
50 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 129)
66 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 -127)
84 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 -128)
101 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 1)
120 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 1)
137 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 1)
156 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 1)
176 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 1)
[all …]
H A Dint-usub-11.ll16 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
32 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 128)
50 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 129)
66 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 -127)
85 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 -128)
102 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
121 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
138 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
157 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
177 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
[all …]
H A Dint-usub-02.ll16 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
30 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
51 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
75 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
93 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
113 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
131 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
149 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
169 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
189 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
[all …]
H A Dint-usub-01.ll16 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
30 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
51 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
75 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
93 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
111 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
129 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
149 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
167 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
185 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
[all …]
H A Dint-usub-03.ll17 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
32 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
54 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
79 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
98 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
119 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
138 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
157 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
178 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
199 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Generic/
H A Doverflow.ll113 ;; usub
117 %usub = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 %b)
118 %cmp = extractvalue { i8, i1 } %usub, 1
119 %usub.result = extractvalue { i8, i1 } %usub, 0
120 %X = select i1 %cmp, i8 %usub.result, i8 42
128 %usub = tail call { i16, i1 } @llvm.usub.with.overflow.i16(i16 %a, i16 %b)
129 %cmp = extractvalue { i16, i1 } %usub, 1
130 %usub.result = extractvalue { i16, i1 } %usub, 0
139 %usub = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
140 %cmp = extractvalue { i32, i1 } %usub, 1
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dvqsub.ll44 %tmp3 = call <8 x i8> @llvm.usub.sat.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
53 %tmp3 = call <4 x i16> @llvm.usub.sat.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
62 %tmp3 = call <2 x i32> @llvm.usub.sat.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
71 %tmp3 = call <1 x i64> @llvm.usub.sat.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
116 %tmp3 = call <16 x i8> @llvm.usub.sat.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
125 %tmp3 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
134 %tmp3 = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
143 %tmp3 = call <2 x i64> @llvm.usub.sat.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
152 declare <8 x i8> @llvm.usub.sat.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
153 declare <4 x i16> @llvm.usub.sat.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dusub_sat.ll5 declare i4 @llvm.usub.sat.i4(i4, i4)
6 declare i8 @llvm.usub.sat.i8(i8, i8)
7 declare i16 @llvm.usub.sat.i16(i16, i16)
8 declare i32 @llvm.usub.sat.i32(i32, i32)
9 declare i64 @llvm.usub.sat.i64(i64, i64)
10 declare <4 x i32> @llvm.usub.sat.v4i32(<4 x i32>, <4 x i32>)
27 %tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %y)
49 %tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %y)
70 %tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %y)
93 %tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %y)
[all …]
H A Dcombine-sub-usat.ll10 declare i32 @llvm.usub.sat.i32 (i32, i32)
11 declare i64 @llvm.usub.sat.i64 (i64, i64)
12 declare <8 x i16> @llvm.usub.sat.v8i16(<8 x i16>, <8 x i16>)
13 declare <8 x i32> @llvm.usub.sat.v8i32(<8 x i32>, <8 x i32>)
21 %res = call i32 @llvm.usub.sat.i32(i32 %a0, i32 undef)
45 %res = call i32 @llvm.usub.sat.i32(i32 100, i32 4294967295)
83 %1 = call i32 @llvm.usub.sat.i32(i32 %a0, i32 0)
101 %1 = call i32 @llvm.usub.sat.i32(i32 %a0, i32 %a0)
115 %1 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %a0, <8 x i16> %a0)
130 %2 = call i32 @llvm.usub.sat.i32(i32 %1, i32 %a1)
[all …]
H A Dusub_sat_plus.ll5 declare i4 @llvm.usub.sat.i4(i4, i4)
6 declare i8 @llvm.usub.sat.i8(i8, i8)
7 declare i16 @llvm.usub.sat.i16(i16, i16)
8 declare i32 @llvm.usub.sat.i32(i32, i32)
9 declare i64 @llvm.usub.sat.i64(i64, i64)
30 %tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %a)
53 %tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %z)
78 %tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %a)
107 %tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %a)
138 %tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %a)

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