Home
last modified time | relevance | path

Searched refs:uniform (Results 1 – 25 of 221) sorted by relevance

123456789

/llvm-project-15.0.7/mlir/test/Dialect/Quant/
H A Dparse-uniform.mlir26 !qalias = !quant.uniform<u8:f32, 0.99872>
35 !qalias = !quant.uniform<u8:f32, 2.0e-2>
44 !qalias = !quant.uniform<u8:f32, 2.0e+2>
53 !qalias = !quant.uniform<i16:f32, 2.0e+2>
62 !qalias = !quant.uniform<u16:f32, 2.0e+2>
71 !qalias = !quant.uniform<i32:f32, 2.0e+2>
80 !qalias = !quant.uniform<u32:f32, 2.0e+2>
89 !qalias = !quant.uniform<u8:f32, 2.0e+2>
107 !qalias = !quant.uniform<u8:f16, 2.0e+2>
116 !qalias = !quant.uniform<u8:f64, 2.0e+2>
[all …]
H A Dparse-uniform-invalid.mlir21 !qalias = !quant.uniform<i8<16>:f32, 0.99872:127>
26 !qalias = !quant<uniform<i8<-4:3:f32, 0.99872:127>>
31 !qalias = !quant.uniform<i8<-4:3>f32, 0.99872:127>
51 !qalias = !quant.uniform<i33:f32, 0.99872:127>
84 // Illegal uniform params: invalid scale
86 !qalias = !quant.uniform<i8<-4:3>:f32, abc:127>
91 !qalias = !quant.uniform<i8<-4:3>:f32, 0.1abc>
94 // Illegal uniform params: missing zero point
96 !qalias = !quant.uniform<i8<-4:3>:f32, 0.1:>
99 // Illegal uniform params: invalid zero point
[all …]
H A Dconvert-const.mlir17 %1 = "quant.qcast"(%cst) : (tensor<4xf32>) -> tensor<4x!quant.uniform<u8:f32, 7.812500e-03:128>>
41 %1 = "quant.qcast"(%cst) : (tensor<4xf32>) -> tensor<4x!quant.uniform<i8:f32, 7.812500e-03>>
42 %2 = "quant.dcast"(%1) : (tensor<4x!quant.uniform<i8:f32, 7.812500e-03>>) -> (tensor<4xf32>)
52 %1 = "quant.qcast"(%cst) : (tensor<4xf32>) -> tensor<4x!quant.uniform<i8:f32, 7.812500e-03>>
87 // CHECK-NEXT: %0 = "quant.scast"(%c64_i8) : (i8) -> !quant.uniform<i8:f32, 7.812500e-03>
89 %1 = "quant.qcast"(%cst) : (f32) -> !quant.uniform<i8:f32, 7.812500e-03>
90 %2 = "quant.dcast"(%1) : (!quant.uniform<i8:f32, 7.812500e-03>) -> (f32)
156 %1 = "quant.qcast"(%cst) : (tensor<7xf32>) -> tensor<7x!quant.uniform<i8:f32, 1.0>>
157 %2 = "quant.dcast"(%1) : (tensor<7x!quant.uniform<i8:f32, 1.0>>) -> (tensor<7xf32>)
164 %5 = "quant.qcast"(%cst1) : (tensor<7xf32>) -> tensor<7x!quant.uniform<u8:f32, 1.0>>
[all …]
H A Dquant_region.mlir22 }) {input_specs = [!quant.uniform<i8:f32, 1.0>, !quant.uniform<i8:f32, 2.0>, f32],
23 output_specs = [!quant.uniform<i8:f32, 4.0>], logical_kernel = "xyz"}
35 …}) {input_specs = [!quant.uniform<i8:f32, 1.0>, !quant.uniform<i8:f32, 2.0>, !quant.uniform<i32:f3…
36 output_specs = [!quant.uniform<i8:f32, 4.0>], logical_kernel = "xyz"}
50 …}) {input_specs = [!quant.uniform<i8:f32, 1.0>, !quant.uniform<i8:f32, 2.0>, !quant.uniform<i32:f1…
51 output_specs = [!quant.uniform<i8:f32, 4.0>], logical_kernel = "xyz"}
65 }) {input_specs = [!quant.uniform<i8:f32, 1.0>, !quant.uniform<i8:f32, 2.0>, i32],
80 …}) {input_specs = [!quant.uniform<i8:f32, 1.0>, !quant.uniform<i8:f32, 2.0>, !quant.uniform<i8:f32…
95 …}) {input_specs = [!quant.uniform<i8:f32, 1.0>, !quant.uniform<i8:f32, 2.0>, !quant.uniform<i32:f3…
110 }) {input_specs = [!quant.uniform<i8:f32, 1.0>, !quant.uniform<i8:f32, 2.0>],
[all …]
H A Dconvert-fakequant.mlir9 // CHECK-SAME: -> tensor<8x4x3x!quant.uniform<u8:f32, 1.000000e+00>>
24 // CHECK-SAME: -> tensor<8x4x3x!quant.uniform<u8<1:255>:f32, 1.000000e+00:1>>
39 // CHECK-SAME: -> tensor<8x4x3x!quant.uniform<u8:f32, 0.0039215686274509803>>
69 // CHECK-SAME: -> tensor<8x4x3x!quant.uniform<u8:f32, 7.812500e-03:128>>
84 // CHECK-SAME: -> tensor<8x4x3x!quant.uniform<i8:f32, 1.000000e+00:-128>>
99 // CHECK-SAME: -> tensor<8x4x3x!quant.uniform<i8<-127:127>:f32, 1.000000e+00:-127>>
114 // CHECK-SAME: -> tensor<8x4x3x!quant.uniform<i8:f32, 0.0039215686274509803:-128>>
144 // CHECK-SAME: -> tensor<8x4x3x!quant.uniform<i8:f32, 7.812500e-03>>
160 // CHECK-SAME: -> tensor<8x4x3x!quant.uniform<i16:f32, 3.0517578125E-5>>
175 // CHECK-SAME: -> tensor<!quant.uniform<u8:f32, 0.0039215686274509803>>
[all …]
H A Dcanonicalize.mlir9 %1 = "quant.scast"(%cst) : (tensor<4xi8>) -> tensor<4x!quant.uniform<u8:f32, 7.812500e-03:128>>
10 %2 = "quant.scast"(%1) : (tensor<4x!quant.uniform<u8:f32, 7.812500e-03:128>>) -> tensor<4xi8>
17 func.func @non_redundant_scast() -> tensor<4x!quant.uniform<u8:f32, 7.812500e-03:128>> {
22 %1 = "quant.scast"(%cst) : (tensor<4xi8>) -> tensor<4x!quant.uniform<u8:f32, 7.812500e-03:128>>
23 return %1 : tensor<4x!quant.uniform<u8:f32, 7.812500e-03:128>>
/llvm-project-15.0.7/llvm/test/Transforms/StructurizeCFG/AMDGPU/
H A Duniform-regions.ll5 ; CHECK-LABEL: @uniform(
164 uniform.for.body:
165 %uniform.i = phi i32 [0, %entry], [%uniform.i.inc, %uniform.end.loop]
166 %uniform.cc = icmp ult i32 %uniform.i, 4
167 br i1 %uniform.cc, label %uniform.mid.loop, label %uniform.for.end
171 %uniform.cc2 = icmp eq i32 %uniform.v, 0
172 br i1 %uniform.cc2, label %uniform.end.loop, label %uniform.for.end
175 %uniform.i.inc = add i32 %uniform.i, 1
178 uniform.for.end:
179 br i1 %uniform.cc, label %uniform.if, label %end
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/Tosa/
H A Dquant-test.mlir5 …pe(%arg0 : tensor<16x1x1x8x!quant.uniform<u8<1:255>:f32, 0.015680249780416489:128>>) -> tensor<16x…
7 …(%arg0) : (tensor<16x1x1x8x!quant.uniform<u8<1:255>:f32, 0.015680249780416489:128>>) -> tensor<16x…
8 return %0 : tensor<16x1x1x8x!quant.uniform<u8<1:255>:f32, 0.015680249780416489:128>>
13 …uniform<i8:f32, 0.015684768557548523>>, %arg1 : tensor<16x1x1x8x!quant.uniform<i8<-127:127>:f32, 0…
15 …uniform<i8:f32, 0.015684768557548523>>, tensor<16x1x1x8x!quant.uniform<i8<-127:127>:f32, 0.0156802…
16 return %0 : tensor<1x32x32x16x!quant.uniform<i8:f32, 0.078431375324726104>>
H A Dops.mlir35 …test_avg_pool2d_q8(%arg0: tensor<1x7x7x9x!quant.uniform<i8:f32, 0.01>>) -> tensor<1x7x7x9x!quant.u…
36 …, 1], stride = [1, 1]} : (tensor<1x7x7x9x!quant.uniform<i8:f32, 0.01>>) -> tensor<1x7x7x9x!quant.u…
37 return %0 : tensor<1x7x7x9x!quant.uniform<i8:f32, 0.01>>
225 …n(%arg0: tensor<64xi32>, %arg1: tensor<513x!quant.uniform<i16:f32, 1.0:0>>) -> tensor<64x!quant.un…
226 …arg0, %arg1) : (tensor<64xi32>, tensor<513x!quant.uniform<i16:f32, 1.0:0>>) -> tensor<64x!quant.un…
227 return %0 : tensor<64x!quant.uniform<i16:f32, 1.0:0>>
473 …%0 = "tosa.cast"(%arg0) : (tensor<13x21x3xi32>) -> tensor<13x21x3x!quant.uniform<u8:f32, 0.0784313…
474 return %0 : tensor<13x21x3x!quant.uniform<u8:f32, 0.078431375324726104:128>>
481 return %0 : tensor<13x21x3x!quant.uniform<i16:f32, 0.078431375324726104:128>>
486 …_rescale(%arg0: tensor<13x21x3x!quant.uniform<u8:f32, 0.015655439347028732:127>>) -> tensor<13x21x…
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/Affine/SuperVectorize/
H A Duniform_divergent.mlir3 // Specific tests to check vectorization of uniform/divergent values.
7 // CHECK-SAME: %[[uniform:.*]]: f32
8 func.func @uniform_arg(%in : memref<512xf32>, %uniform : f32) {
11 %add = arith.addf %ld, %uniform : f32
16 // CHECK-NEXT: %[[bcast:.*]] = vector.broadcast %[[uniform]] : f32 to vector<128xf32>
24 // CHECK-SAME: %[[uniform:.*]]: f32
25 func.func @multi_use_uniform_arg(%in : memref<512xf32>, %uniform : f32) {
28 %user0 = arith.addf %ld, %uniform : f32
29 %user1 = arith.addf %ld, %uniform : f32
34 // CHECK-NEXT: %[[bcast:.*]] = vector.broadcast %[[uniform]] : f32 to vector<128xf32>
/llvm-project-15.0.7/mlir/test/CAPI/
H A Dquant.c28 MlirType uniform = in testTypeHierarchy() local
40 assert(!mlirTypeIsNull(uniform) && "couldn't parse UniformQuantizedType"); in testTypeHierarchy()
52 mlirTypeIsAQuantizedType(uniform)); in testTypeHierarchy()
65 mlirTypeIsAUniformQuantizedType(uniform)); in testTypeHierarchy()
78 mlirTypeIsACalibratedQuantizedType(uniform)); in testTypeHierarchy()
137 MlirType uniform = mlirUniformQuantizedTypeGet( in testUniformType() local
141 fprintf(stderr, "scale: %lf\n", mlirUniformQuantizedTypeGetScale(uniform)); in testUniformType()
144 mlirUniformQuantizedTypeGetZeroPoint(uniform)); in testUniformType()
147 mlirUniformQuantizedTypeIsFixedPoint(uniform)); in testUniformType()
150 fprintf(stderr, "equal: %d\n", mlirTypeEqual(uniform, uniformParsed)); in testUniformType()
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dconsecutive-ptr-uniforms.ll81 ; recognized as uniform and remains uniform after vectorization. When
83 ; recognized as uniform, and it should not be uniform after vectorization.
137 ; recognized as uniform and remains uniform after vectorization. When
139 ; recognized as uniform, and it should not be uniform after vectorization.
141 ; recognized as uniform, and it should not be uniform after vectorization.
196 ; scalarized store is not recognized as uniform and is not uniform after
200 ; non-uniform.
243 ; as uniform and is not uniform after vectorization. The store is scalarized
308 ; recognized as uniform and is not uniform after vectorization. The pointer
359 ; recognized as uniform and is not uniform after vectorization. The pointer
[all …]
/llvm-project-15.0.7/mlir/test/python/dialects/
H A Dquant.py19 uniform = Type.parse("!quant.uniform<i8<-8:7>:f32, 0.99872:127>")
25 assert quant.QuantizedType.isinstance(uniform)
30 assert quant.UniformQuantizedType.isinstance(uniform)
34 assert not quant.AnyQuantizedType.isinstance(uniform)
74 uniform = quant.UniformQuantizedType.get(
84 print(uniform)
85 assert uniform == Type.parse("!quant.uniform<i8<-8:7>:f32, 0.99872:127>")
/llvm-project-15.0.7/clang/test/OpenMP/
H A Ddeclare_simd_messages.cpp90 #pragma omp declare simd simdlen(N) uniform(this, var) aligned(var)
100 #pragma omp declare simd uniform
104 #pragma omp declare simd uniform(
106 #pragma omp declare simd uniform()
110 #pragma omp declare simd uniform(this
114 #pragma omp declare simd uniform(this,a
116 #pragma omp declare simd uniform(,a)
197 #pragma omp declare simd uniform(a), linear(a: 4)
200 #pragma omp declare simd linear(a: 4) uniform(a)
223 #pragma omp declare simd uniform(this, t) aligned(this: 4) aligned(this: -4) linear(this: hp)
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/X86/
H A Duniform-phi.ll7 ; CHECK-DAG: LV: Found uniform instruction: %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.ne…
8 ; CHECK-DAG: LV: Found uniform instruction: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
9 ; CHECK-DAG: LV: Found uniform instruction: %exitcond = icmp eq i64 %indvars.iv, 1599
31 ; CHECK-DAG: LV: Found uniform instruction: %cond = icmp eq i64 %i.next, %n
32 ; CHECK-DAG: LV: Found uniform instruction: %tmp1 = getelementptr inbounds i32, i32* %a, i32 %tmp0
33 ; CHECK-NOT: LV: Found uniform instruction: %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
53 ; Check %indvars.iv and %indvars.iv.next are uniform instructions even if they are used outside of …
55 ; CHECK-DAG: LV: Found uniform instruction: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
56 ; CHECK-DAG: LV: Found uniform instruction: %exitcond = icmp eq i64 %indvars.iv, 1599
79 ; Check that first order recurrence phis (%phi32 and %phi64) are not uniform.
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dmulti-divergent-exit-region.ll590 uniform.ret:
629 uniform.ret:
640 ; IR: %7 = phi i1 [ %uniform.cond2, %uniform.then ], [ %uniform.cond1.inv, %uniform.if ]
641 ; IR: br i1 %7, label %uniform.endif, label %uniform.ret0
654 br i1 %uniform.cond0, label %uniform.if, label %uniform.ret1
656 uniform.if:
659 br i1 %uniform.cond1, label %uniform.then, label %uniform.endif
661 uniform.then:
665 br i1 %uniform.cond2, label %uniform.ret0, label %uniform.endif
671 uniform.ret0:
[all …]
H A Dannotate-existing-abi-attributes.ll120 ; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-workitem-id-x" "uniform-work-group-size"="false" }
121 ; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-workitem-id-y" "uniform-work-group-size"="false" }
122 ; CHECK: attributes #[[ATTR2]] = { "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
123 ; CHECK: attributes #[[ATTR3]] = { "amdgpu-no-workgroup-id-x" "uniform-work-group-size"="false" }
124 ; CHECK: attributes #[[ATTR4]] = { "amdgpu-no-workgroup-id-y" "uniform-work-group-size"="false" }
125 ; CHECK: attributes #[[ATTR5]] = { "amdgpu-no-workgroup-id-z" "uniform-work-group-size"="false" }
126 ; CHECK: attributes #[[ATTR6]] = { "amdgpu-no-dispatch-ptr" "uniform-work-group-size"="false" }
127 ; CHECK: attributes #[[ATTR7]] = { "amdgpu-no-queue-ptr" "uniform-work-group-size"="false" }
128 ; CHECK: attributes #[[ATTR8]] = { "amdgpu-no-implicitarg-ptr" "uniform-work-group-size"="false" }
129 ; CHECK: attributes #[[ATTR9]] = { "amdgpu-no-dispatch-id" "uniform-work-group-size"="false" }
H A Ddag-divergence.ll11 %maybe.not.uniform.load = load i32, i32 addrspace(4)* %gep, align 4
12 store i32 %maybe.not.uniform.load, i32 addrspace(1)* undef
27 %maybe.not.uniform.load = load i32, i32 addrspace(4)* %gep, align 4
28 store i32 %maybe.not.uniform.load, i32 addrspace(1)* undef
H A Dannotate-noclobber.ll1 ; RUN: opt -S --amdgpu-annotate-uniform < %s | FileCheck -check-prefix=OPT %s
6 ; OPT: %addr = getelementptr i32, i32 addrspace(1)* %in, i64 0, !amdgpu.uniform !0
17 ; OPT: %addr = getelementptr i32, i32 addrspace(3)* %in, i64 0, !amdgpu.uniform !0
28 ; OPT: %addr = getelementptr i32, i32 addrspace(5)* %in, i64 0, !amdgpu.uniform !0
39 ; OPT: %addr = getelementptr i32, i32 addrspace(4)* %in, i64 0, !amdgpu.uniform !0
H A Dannotate-kernel-features.ll396 ; ALL: attributes #[[ATTR0:[0-9]+]] = { nounwind readnone speculatable willreturn "uniform-work-gro…
397 ; ALL: attributes #[[ATTR1]] = { nounwind "uniform-work-group-size"="false" }
398 ; ALL: attributes #[[ATTR2]] = { nounwind "amdgpu-work-group-id-y" "uniform-work-group-size"="false…
399 ; ALL: attributes #[[ATTR3]] = { nounwind "amdgpu-work-group-id-z" "uniform-work-group-size"="false…
401 ; ALL: attributes #[[ATTR5]] = { nounwind "amdgpu-work-item-id-y" "uniform-work-group-size"="false"…
402 ; ALL: attributes #[[ATTR6]] = { nounwind "amdgpu-work-item-id-z" "uniform-work-group-size"="false"…
407 ; NOHSA: attributes #[[ATTR1]] = { nounwind "uniform-work-group-size"="false" }
408 ; NOHSA: attributes #[[ATTR2]] = { nounwind "amdgpu-work-group-id-y" "uniform-work-group-size"="fal…
409 ; NOHSA: attributes #[[ATTR3]] = { nounwind "amdgpu-work-group-id-z" "uniform-work-group-size"="fal…
411 ; NOHSA: attributes #[[ATTR5]] = { nounwind "amdgpu-work-item-id-y" "uniform-work-group-size"="fals…
[all …]
H A Dinvert-br-undef-vcc.mir6 br i1 undef, label %if, label %else, !structurizecfg.uniform !0, !amdgpu.uniform !0
10 br label %done, !structurizecfg.uniform !0
14 br label %done, !structurizecfg.uniform !0
H A Dnoclobber-barrier.ll62 ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]], !amdgpu.uniform !0
65 ; CHECK-NEXT: br label [[IF_END:%.*]], !amdgpu.uniform !0
68 ; CHECK-NEXT: br label [[IF_END]], !amdgpu.uniform !0
112 ; CHECK-NEXT: br label [[IF_END:%.*]], !amdgpu.uniform !0
115 ; CHECK-NEXT: br label [[IF_END]], !amdgpu.uniform !0
159 ; CHECK-NEXT: br label [[IF_END:%.*]], !amdgpu.uniform !0
163 ; CHECK-NEXT: br label [[IF_END]], !amdgpu.uniform !0
203 ; CHECK-NEXT: br label [[WHILE_COND:%.*]], !amdgpu.uniform !0
241 ; CHECK-NEXT: br label [[WHILE_COND:%.*]], !amdgpu.uniform !0
251 ; CHECK-NEXT: br i1 [[CC]], label [[WHILE_COND]], label [[END:%.*]], !amdgpu.uniform !0
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-load.mir9 %tmp2 = load <8 x i32>, <8 x i32> addrspace(1)* %global.not.uniform.v8i32
16 %tmp2 = load <4 x i64>, <4 x i64> addrspace(1)* %global.not.uniform.v4i64
22 %tmp2 = load <16 x i32>, <16 x i32> addrspace(1)* %global.not.uniform.v16i32
28 %tmp2 = load <8 x i64>, <8 x i64> addrspace(1)* %global.not.uniform.v8i64
38 %tmp2 = load <8 x i32>, <8 x i32> addrspace(4)* %constant.not.uniform.v8i32
44 %constant.not.uniform = getelementptr i256, i256 addrspace(4)* %in, i32 %tmp0
45 %tmp2 = load i256, i256 addrspace(4)* %constant.not.uniform
52 %tmp2 = load <16 x i16>, <16 x i16> addrspace(4)* %constant.not.uniform
59 %tmp2 = load <4 x i64>, <4 x i64> addrspace(4)* %constant.not.uniform.v4i64
71 %tmp2 = load <8 x i64>, <8 x i64> addrspace(4)* %constant.not.uniform.v8i64
[all …]
/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Dcl-uniform-wg-size.cl3 // RUN: %clang_cc1 -emit-llvm -O0 -cl-std=CL2.0 -cl-uniform-work-group-size -o - %s 2>&1 | FileChec…
12 // CHECK-UNIFORM: "uniform-work-group-size"="true"
13 // CHECK-NONUNIFORM: "uniform-work-group-size"="false"
16 // CHECK-NOT: uniform-work-group-size
/llvm-project-15.0.7/llvm/include/llvm/FuzzMutate/
H A DRandom.h21 template <typename T, typename GenT> T uniform(GenT &Gen, T Min, T Max) { in uniform() function
26 template <typename T, typename GenT> T uniform(GenT &Gen) { in uniform() function
27 return uniform<T>(Gen, std::numeric_limits<T>::min(), in uniform()
66 if (uniform<uint64_t>(RandGen, 1, TotalWeight) <= Weight) in sample()

123456789