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Searched refs:unaligned (Results 1 – 25 of 203) sorted by relevance

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/llvm-project-15.0.7/llvm/unittests/Support/
H A DEndianTest.cpp26 EXPECT_EQ(BigAsHost, (endian::read<int32_t, big, unaligned>(bigval))); in TEST()
30 EXPECT_EQ((endian::read<int32_t, big, unaligned>(bigval + 1)), in TEST()
31 (endian::read<int32_t, little, unaligned>(littleval + 1))); in TEST()
63 EXPECT_EQ((endian::readAtBitAlignment<int64_t, little, unaligned>( in TEST()
87 endian::writeAtBitAlignment<int32_t, little, unaligned>(littleval, in TEST()
126 endian::writeAtBitAlignment<int64_t, big, unaligned>( in TEST()
146 endian::writeAtBitAlignment<int64_t, little, unaligned>( in TEST()
168 endian::write<int32_t, big, unaligned>(data, -1362446643); in TEST()
173 endian::write<int32_t, big, unaligned>(data + 1, -1362446643); in TEST()
179 endian::write<int32_t, little, unaligned>(data, -1362446643); in TEST()
[all …]
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Dfixup-out-of-range.s11 ldr x0, unaligned
17 b.eq unaligned
23 ldr x0, [x1, unaligned-.]
29 ldr w0, [x1, unaligned-.]
35 ldrh w0, [x1, unaligned-.]
44 ldr q0, [x1, unaligned-.]
50 tbz x0, #1, unaligned
56 b unaligned
77 unaligned: label
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DEndian.h30 enum {aligned = 0, unaligned = 1}; enumerator
277 detail::packed_endian_specific_integral<int16_t, little, unaligned>;
298 detail::packed_endian_specific_integral<uint16_t, big, unaligned>;
300 detail::packed_endian_specific_integral<uint32_t, big, unaligned>;
302 detail::packed_endian_specific_integral<uint64_t, big, unaligned>;
305 detail::packed_endian_specific_integral<int16_t, big, unaligned>;
307 detail::packed_endian_specific_integral<int32_t, big, unaligned>;
309 detail::packed_endian_specific_integral<int64_t, big, unaligned>;
353 return read<T, unaligned>(P, E); in read()
388 write<T, unaligned>(P, V, E); in write()
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/llvm-project-15.0.7/llvm/lib/ProfileData/
H A DMemProf.cpp42 const uint64_t NumNodes = endian::readNext<uint64_t, little, unaligned>(Ptr); in deserialize()
46 endian::readNext<uint64_t, little, unaligned>(Ptr); in deserialize()
48 const FrameId Id = endian::readNext<FrameId, little, unaligned>(Ptr); in deserialize()
57 const uint64_t NumCtxs = endian::readNext<uint64_t, little, unaligned>(Ptr); in deserialize()
60 endian::readNext<uint64_t, little, unaligned>(Ptr); in deserialize()
64 const FrameId Id = endian::readNext<FrameId, little, unaligned>(Ptr); in deserialize()
89 endian::readNext<uint64_t, little, unaligned>(Ptr); in readMemProfSchema()
97 const uint64_t Tag = endian::readNext<uint64_t, little, unaligned>(Ptr); in readMemProfSchema()
/llvm-project-15.0.7/llvm/test/Analysis/ValueTracking/
H A Dmemory-dereferenceable.ll46 ; GLOBAL: %dparam{{.*}}(unaligned)
47 ; POINT-NOT: %dparam{{.*}}(unaligned)
50 ; GLOBAL: %relocate{{.*}}(unaligned)
51 ; POINT-NOT: %relocate{{.*}}(unaligned)
67 ; GLOBAL: %d4_load{{.*}}(unaligned)
68 ; POINT-NOT: %d4_load{{.*}}(unaligned)
89 ; GLOBAL: %dparam.align1{{.*}}(unaligned)
115 ; GLOBAL: %deref_return{{.*}}(unaligned)
117 ; POINT-NOT: %deref_return{{.*}}(unaligned)
140 ; CHECK: %alloca.align1{{.*}}(unaligned)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dswzero.ll3 %struct.unaligned = type <{ i32 }>
5 define void @zero_u(%struct.unaligned* nocapture %p) nounwind {
9 %x = getelementptr inbounds %struct.unaligned, %struct.unaligned* %p, i32 0, i32 0
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Dfixups-diagnostics.s4 jal a0, unaligned # CHECK: :[[@LINE]]:3: error: fixup value must be 2-byte aligned
7 blt t0, t1, unaligned # CHECK: :[[@LINE]]:3: error: fixup value must be 2-byte aligned
10 unaligned: label
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dint-move-10.ll34 ; unaligned packed struct + 2 -> unaligned address
44 ; unaligned packed struct + 8 -> unaligned address
54 ; aligned packed struct + 2 -> unaligned address
113 ; unaligned packed struct + 2 -> unaligned address
123 ; unaligned packed struct + 8 -> unaligned address
133 ; aligned packed struct + 2 -> unaligned address
H A Dint-move-09.ll89 ; Repeat f1 with an unaligned variable.
100 ; Repeat f2 with an unaligned variable.
111 ; Repeat f3 with an unaligned variable.
122 ; Repeat f4 with an unaligned variable.
133 ; Repeat f5 with an unaligned variable.
144 ; Repeat f6 with an unaligned variable.
155 ; Repeat f7 with unaligned variables.
H A Dunaligned-01.ll1 ; Check that unaligned accesses are allowed in general. We check the
22 ; Check that unaligned 2-byte accesses are allowed.
33 ; Check that unaligned 4-byte accesses are allowed.
47 ; Check that unaligned 8-byte accesses are allowed.
/llvm-project-15.0.7/llvm/include/llvm/ProfileData/
H A DMemProf.h52 Name = endian::readNext<Type, little, unaligned>(Ptr); \ in deserialize()
206 const uint64_t F = endian::readNext<uint64_t, little, unaligned>(Ptr); in deserialize()
207 const uint32_t L = endian::readNext<uint32_t, little, unaligned>(Ptr); in deserialize()
208 const uint32_t C = endian::readNext<uint32_t, little, unaligned>(Ptr); in deserialize()
209 const bool I = endian::readNext<bool, little, unaligned>(Ptr); in deserialize()
468 offset_type KeyLen = endian::readNext<offset_type, little, unaligned>(D); in ReadKeyDataLength()
469 offset_type DataLen = endian::readNext<offset_type, little, unaligned>(D); in ReadKeyDataLength()
475 return endian::readNext<external_key_type, little, unaligned>(D); in ReadKey()
595 offset_type KeyLen = endian::readNext<offset_type, little, unaligned>(D); in ReadKeyDataLength()
596 offset_type DataLen = endian::readNext<offset_type, little, unaligned>(D); in ReadKeyDataLength()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/MIR/AMDGPU/
H A Dllc-target-cpu-attr-from-cmdline-ir.mir2 # RUN: llc -march=amdgcn -mattr=+unaligned-access-mode -run-pass=none -o - %s | FileCheck -check-pr…
13 # MATTR: attributes #0 = { "target-cpu"="fiji" "target-features"="+unaligned-access-mode" }
14 # MATTR: attributes #1 = { "target-features"="+unaligned-access-mode" }
H A Dllc-target-cpu-attr-from-cmdline.mir2 # RUN: llc -march=amdgcn -mattr=+unaligned-access-mode -run-pass=none -o - %s | FileCheck -check-pr…
7 # MATTR: attributes #0 = { "target-features"="+unaligned-access-mode" }
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dsandybridge-loads.ll18 %v0 = load <8 x float>, ptr %a, align 16 ; <---- unaligned!
42 store <8 x float> %v1, ptr %a, align 16 ; <--- unaligned
58 %v1 = load <8 x float>, ptr %b, align 16 ; <--- unaligned
60 store <8 x float> %v1, ptr %a, align 16 ; <--- unaligned
H A Dslow-unaligned-mem.ll1 ; Intel chips with slow unaligned memory accesses
15 ; Intel chips with fast unaligned memory accesses
27 ; AMD chips with slow unaligned memory accesses
39 ; AMD chips with fast unaligned memory accesses
53 ; Other chips with slow unaligned memory accesses
57 ; Verify that the slow/fast unaligned memory attribute is set correctly for each CPU model.
61 ; Also verify that SSE4.2 or SSE4a imply fast unaligned accesses.
H A Dx86-64-xmm-spill-unaligned.ll3 ; unaligned access.
5 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -mattr=+sse,+sse-unaligned-mem --frame-po…
H A Dwin64_alloca_dynalloca.ll8 define i64 @unaligned(i64 %n, i64 %x) nounwind {
9 ; M64-LABEL: unaligned:
10 ; W64-LABEL: unaligned:
11 ; EFI-LABEL: unaligned:
H A Dbitcast-i256.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-slow-unaligned-mem-32 | FileCheck %s -…
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+slow-unaligned-mem-32 | FileCheck %s -…
H A Ddag-merge-fast-accesses.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-slow-unaligned-mem-16 | FileCheck %s --chec…
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-unaligned-mem-16 | FileCheck %s --chec…
5 ; Verify that the DAGCombiner is creating unaligned 16-byte loads and stores
/llvm-project-15.0.7/lld/test/ELF/
H A Darm-adr-err.s24 .reloc 4, R_ARM_ALU_PC_G0, unaligned
35 unaligned: label
H A Darm-thumb-adr-err.s23 .reloc 2, R_ARM_THM_PC8, unaligned
33 unaligned: label
H A Darm-thumb-ldrlit-err.s23 .reloc 2, R_ARM_THM_PC8, unaligned
33 unaligned: label
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Ddirective-align.s5 unaligned: label
9 @ CHECK-LABEL: unaligned
/llvm-project-15.0.7/llvm/include/llvm/DebugInfo/PDB/Native/
H A DFormatUtil.h110 T, support::little, support::unaligned>> {
113 support::unaligned>;
127 support::unaligned> in fmtle()
/llvm-project-15.0.7/llvm/test/CodeGen/AVR/
H A Dunaligned-atomic-loads.ll3 ; This verifies that the middle end can handle an unaligned atomic load.
6 ; hit an assertion for unaligned loads and stores.

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