| /llvm-project-15.0.7/clang/lib/Headers/ |
| H A D | opencl-c.h | 9258 uint16 __ovld __cnfn clamp(uint16, uint16, uint16); 9459 uint16 __ovld __cnfn mad_hi(uint16, uint16, uint16); 9511 uint16 __ovld __cnfn mad_sat(uint16, uint16, uint16); 9992 uint16 __ovld __cnfn mad24(uint16, uint16, uint16); 10980 uint16 __ovld __cnfn bitselect(uint16, uint16, uint16); 11118 uint16 __ovld __cnfn select(uint16, uint16, uint16); 18115 uint16 __ovld amd_bitalign(uint16, uint16, uint16); 18122 uint16 __ovld amd_bytealign(uint16, uint16, uint16); 18129 uint16 __ovld amd_lerp(uint16, uint16, uint16); 18140 uint16 __ovld amd_sadhi(uint16, uint16, uint16); [all …]
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| H A D | opencl-c-base.h | 172 typedef uint uint16 __attribute__((ext_vector_type(16))); typedef 575 #define as_uint16(x) __builtin_astype((x), uint16)
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | attr-arm-sve-vector-bits-types.c | 50 DEFINE_STRUCT(uint16) 64 DEFINE_UNION(uint16)
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| /llvm-project-15.0.7/mlir/test/python/ir/ |
| H A D | array_attributes.py | 126 array = np.array([[2, 4, 8], [16, 32, 64]], dtype=np.uint16) 228 array = np.array([[1, 2, 3], [4, 5, 6]], dtype=np.uint16) 254 array = np.array([[1, 2, 3], [4, 5, 6]], dtype=np.uint16)
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| /llvm-project-15.0.7/libclc/generic/include/clc/integer/ |
| H A D | integer-gentype.inc | 45 #define __CLC_GENTYPE uint16
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| H A D | gentype.inc | 323 #define __CLC_U_GENTYPE uint16 387 #define __CLC_GENTYPE uint16 388 #define __CLC_U_GENTYPE uint16
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| /llvm-project-15.0.7/lldb/tools/debugserver/source/ |
| H A D | DNBRegisterInfo.cpp | 58 snprintf(str, sizeof(str), "0x%4.4x", value.uint16); in Dump() 88 snprintf(str, sizeof(str), "%u", value.uint16); in Dump()
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| H A D | DNBDefs.h | 278 uint16_t uint16; member
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| /llvm-project-15.0.7/compiler-rt/lib/builtins/avr/ |
| H A D | udivmodhi4.S | 26 ldi r21, 17 ; Only loop 16 rounds for uint16.
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | StackMaps.rst | 324 uint16 : Reserved (expected to be 0) 340 uint16 : Reserved (record flags) 341 uint16 : NumLocations 345 uint16 : Location Size 346 uint16 : Dwarf RegNum 347 uint16 : Reserved (expected to be 0) 351 uint16 : Padding 352 uint16 : NumLiveOuts 354 uint16 : Dwarf RegNum
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| H A D | FaultMaps.rst | 42 uint16 : Reserved (expected to be 0)
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| /llvm-project-15.0.7/lldb/source/Plugins/SystemRuntime/MacOSX/ |
| H A D | SystemRuntimeMacOSX.cpp | 420 CompilerType uint16 = in ReadLibdispatchTSDIndexes() local 429 "dti_version", uint16, in ReadLibdispatchTSDIndexes() 432 "dti_queue_index", uint16, in ReadLibdispatchTSDIndexes() 435 "dti_voucher_index", uint16, in ReadLibdispatchTSDIndexes() 438 "dti_qos_class_index", uint16, in ReadLibdispatchTSDIndexes()
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| /llvm-project-15.0.7/mlir/docs/ |
| H A D | Quantization.md | 118 af&fine\\_value_{uint8 \\, or \\, uint16} \\\\ 119 …ger( \frac{real\\_value_{Single}}{scale_{Single}})_{sint32} + zero\\_point_{uint8 \, or \, uint16}) 133 or uint16 to a tensor of real-valued elements (usually represented with a 140 …oundToNearestFloat((affine\\_value_{uint8 \\, or \\, uint16} - zero\\_point_{uint8 \\, or \\, uint…
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| /llvm-project-15.0.7/llvm/docs/PDB/ |
| H A D | MsfFile.rst | 172 level record, a long string field, or even a single ``uint16``) to begin and 174 ``uint16`` field begins at the last byte of the current block, then it would 178 accordingly. In the aforementioned example, the high byte of the ``uint16``
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| /llvm-project-15.0.7/lldb/tools/debugserver/source/MacOSX/i386/ |
| H A D | DNBArchImplI386.cpp | 1802 value->value.uint16 = in GetRegisterValue() 1806 value->value.uint16 = in GetRegisterValue() 1810 memcpy (&value->value.uint16, &m_state.context.fpu.no_avx.__fpu_ftw, 2); in GetRegisterValue() 1813 value->value.uint16 = m_state.context.fpu.no_avx.__fpu_fop; in GetRegisterValue() 1819 value->value.uint16 = m_state.context.fpu.no_avx.__fpu_cs; in GetRegisterValue() 1825 value->value.uint16 = m_state.context.fpu.no_avx.__fpu_ds; in GetRegisterValue() 2023 value->value.uint16; in SetRegisterValue() 2028 value->value.uint16; in SetRegisterValue() 2036 m_state.context.fpu.no_avx.__fpu_fop = value->value.uint16; in SetRegisterValue() 2044 m_state.context.fpu.no_avx.__fpu_cs = value->value.uint16; in SetRegisterValue() [all …]
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| /llvm-project-15.0.7/libclc/generic/include/clc/ |
| H A D | clctypes.h | 59 typedef __attribute__((ext_vector_type(16))) uint uint16; typedef
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| H A D | as_type.h | 56 #define as_uint16(x) __builtin_astype(x, uint16)
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| /llvm-project-15.0.7/openmp/libomptarget/plugins/amdgpu/impl/ |
| H A D | msgpack.def | 28 X(uint16, 3, read_size_field_u16, 0xcd, 0xcd)
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| H A D | msgpack.h | 152 case msgpack::uint16: in handle_msgpack_given_type()
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| /llvm-project-15.0.7/lldb/tools/debugserver/source/MacOSX/x86_64/ |
| H A D | DNBArchImplX86_64.cpp | 2330 value->value.uint16 = in GetRegisterValue() 2334 value->value.uint16 = in GetRegisterValue() 2338 memcpy (&value->value.uint16, &m_state.context.fpu.no_avx.__fpu_ftw, 2); in GetRegisterValue() 2341 value->value.uint16 = m_state.context.fpu.no_avx.__fpu_fop; in GetRegisterValue() 2347 value->value.uint16 = m_state.context.fpu.no_avx.__fpu_cs; in GetRegisterValue() 2353 value->value.uint16 = m_state.context.fpu.no_avx.__fpu_ds; in GetRegisterValue() 2540 value->value.uint16; in SetRegisterValue() 2545 value->value.uint16; in SetRegisterValue() 2553 m_state.context.fpu.no_avx.__fpu_fop = value->value.uint16; in SetRegisterValue() 2561 m_state.context.fpu.no_avx.__fpu_cs = value->value.uint16; in SetRegisterValue() [all …]
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| /llvm-project-15.0.7/libclc/generic/include/clc/async/ |
| H A D | gentype.inc | 118 #define __CLC_GENTYPE uint16
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| /llvm-project-15.0.7/lldb/bindings/interface/ |
| H A D | SBData.i | 278 …uint16 = property(_make_helper_uint16, None, doc='''A read only property that returns an array-lik…
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| /llvm-project-15.0.7/clang/test/Sema/ |
| H A D | attr-arm-sve-vector-bits.c | 263 TEST_CAST_VECTOR(uint16) in TEST_CAST_VECTOR()
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| /llvm-project-15.0.7/lldb/docs/ |
| H A D | lldb-gdb-remote.txt | 771 vector-uint16
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