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/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCInstrFormats.td701 "ldi_s\t$b, [$u7]"> {
704 bits<7> u7;
707 let Inst{7-4} = u7{6-3};
709 let Inst{2-0} = u7{2-0};
910 bits<7> u7;
913 let fieldU = u7{6-2};
914 let u7{1-0} = 0b00;
919 (outs), (ins immU<7>:$u7),
920 !strconcat(asmop, "\t%sp, %sp, $u7")> {
961 bits<7> u7;
[all …]
H A DARCInstrInfo.td525 (outs GPR32Reduced:$b3), (ins immU<7>:$u7),
526 "add_s\t$b3, %sp, $u7">;
534 (outs), (ins immU<7>:$u7), "leave_s\t$u7"> {
536 bits<7> u7;
538 let fieldB = u7{6-4};
539 let fieldU{4-1} = u7{3-0};
785 F16_OP_U7<0b0, !strconcat("add_s", "\t$b, $b, $u7")>;
788 F16_OP_U7<0b1, !strconcat("cmp_s", "\t$b, $u7")>;
/llvm-project-15.0.7/llvm/test/Verifier/
H A Ddi-subroutine-localvar.ll21 !6 = !DIBasicType(name: "u7", size: 8, encoding: DW_ATE_unsigned)
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/RISCV/
H A Dcast.ll165 ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %u7 = fptoui <4 x floa…
192 ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %u7 = fptoui <4 x floa…
218 %u7 = fptoui <4 x float> undef to <4 x i32>
247 ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %u7 = uitofp <4 x i32>…
274 ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %u7 = uitofp <4 x i32>…
300 %u7 = uitofp <4 x i32> undef to <4 x float>
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dminmax-fold.ll1099 %u7 = select i1 %u6, i32 %u5, i32 255
1100 %r = trunc i32 %u7 to i8
1113 %u7 = select i1 %u6, i32 %u5, i32 255
1114 %r = trunc i32 %u7 to i8
1343 %u7 = select i1 %u6, i32 %u5, i32 55
1344 %r = trunc i32 %u7 to i8
1357 %u7 = select i1 %u6, i32 %u5, i32 55
1358 %r = trunc i32 %u7 to i8
/llvm-project-15.0.7/clang/test/CXX/expr/expr.const/
H A Dp2-0x.cpp508 …constexpr bool u7 = p > (int*)0; // expected-error {{constant expression}} expected-note {{compari… variable
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonPatterns.td3217 def: Pat<(i32 (zext (i1 (setult (and I32:$Rs, 255), u7_0PosImmPred:$u7)))),
3218 (C2_muxii (A4_cmpbgtui IntRegs:$Rs, (UDEC1 imm:$u7)), 0, 1)>;