Home
last modified time | relevance | path

Searched refs:tst (Results 1 – 25 of 192) sorted by relevance

12345678

/llvm-project-15.0.7/clang/test/Analysis/
H A Duninit-structured-binding-struct.cpp11 s tst; in a() local
19 s tst; in b() local
20 tst.a = 1; in b()
29 s tst; in c() local
37 s tst; in d() local
38 tst.a = 1; in d()
50 s tst; in e() local
62 s tst; in f() local
70 s tst; in g() local
90 s3 tst; in h() local
[all …]
/llvm-project-15.0.7/llvm/test/MC/AVR/
H A Dinst-tst.s7 tst r3
8 tst r14
9 tst r24
10 tst r12
12 ; CHECK: tst r3 ; encoding: [0x33,0x20]
13 ; CHECK: tst r14 ; encoding: [0xee,0x20]
14 ; CHECK: tst r24 ; encoding: [0x88,0x23]
17 ; CHECK-INST: tst r3
18 ; CHECK-INST: tst r14
19 ; CHECK-INST: tst r24
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Danalyze-branch.ll15 %tst = icmp eq i32 %in, 42
16 br i1 %tst, label %true, label %false, !prof !0
38 %tst = icmp eq i32 %in, 42
61 %tst = icmp eq i32 %in, 0
82 %tst = icmp eq i64 %in, 0
103 %tst = icmp ne i32 %in, 0
124 %tst = icmp ne i64 %in, 0
146 %tst = icmp eq i32 %bit, 0
168 %tst = icmp eq i64 %bit, 0
191 %tst = icmp ne i32 %bit, 0
[all …]
H A Dselect_const.ll130 ; CHECK-NEXT: tst w0, #0x1
152 ; CHECK-NEXT: tst w0, #0x1
165 ; CHECK-NEXT: tst w0, #0x1
187 ; CHECK-NEXT: tst w0, #0x1
201 ; CHECK-NEXT: tst w0, #0x1
225 ; CHECK-NEXT: tst w0, #0x1
239 ; CHECK-NEXT: tst w0, #0x1
251 ; CHECK-NEXT: tst w0, #0x1
264 ; CHECK-NEXT: tst w0, #0x1
277 ; CHECK-NEXT: tst w0, #0x1
[all …]
H A Darm64_32-gep-sink.ll11 %tst = load i1, i1* %addr
12 br i1 %tst, label %next, label %end
30 %tst = load i1, i1* %addr
31 br i1 %tst, label %next, label %end
52 %tst = load i1, i1* %addr
53 br i1 %tst, label %next, label %end
H A Dpull-conditional-binop-through-shift.ll10 ; CHECK-NEXT: tst w1, #0x1
25 ; CHECK-NEXT: tst w1, #0x1
41 ; CHECK-NEXT: tst w1, #0x1
56 ; CHECK-NEXT: tst w1, #0x1
72 ; CHECK-NEXT: tst w1, #0x1
87 ; CHECK-NEXT: tst w1, #0x1
103 ; CHECK-NEXT: tst w1, #0x1
118 ; CHECK-NEXT: tst w1, #0x1
137 ; CHECK-NEXT: tst w1, #0x1
152 ; CHECK-NEXT: tst w1, #0x1
[all …]
H A Darm64_32-memcpy.ll3 define i64 @test_memcpy(i64* %addr, i8* %src, i1 %tst) minsize {
11 br i1 %tst, label %true, label %false
23 define i64 @test_memmove(i64* %addr, i8* %src, i1 %tst) minsize {
31 br i1 %tst, label %true, label %false
43 define i64 @test_memset(i64* %addr, i8* %src, i1 %tst) minsize {
51 br i1 %tst, label %true, label %false
H A Dneg-selects.ll7 ; CHECK-NEXT: tst w2, #0x1
20 ; CHECK-NEXT: tst w2, #0x1
33 ; CHECK-NEXT: tst w2, #0x1
45 ; CHECK-NEXT: tst w2, #0x1
57 ; CHECK-NEXT: tst w2, #0x1
69 ; CHECK-NEXT: tst w2, #0x1
H A Darm64-ands-bad-peephole.ll2 ; Check that ANDS (tst) is not merged with ADD when the immediate
10 ; CHECK: tst [[REG]], #0x1
11 define void @tst1(i1 %tst, i32 %true) {
13 br i1 %tst, label %for.end, label %for.body
H A Dtbz-tbnz.ll137 ; CHECK: tst x0, x1
155 ; CHECK: tst x0, x1, lsl #63
164 ; CHECK: tst x0, x1, lsl #62
177 %tst = icmp slt i64 %val1, 0
178 br i1 %tst, label %if.then, label %if.end
193 %tst = icmp slt i64 %val1, 0
194 br i1 %tst, label %if.then, label %if.end
215 %tst = icmp slt i64 %val, 0
216 br i1 %tst, label %if.then, label %if.end
228 %tst = icmp slt i64 %val1, 0
[all …]
H A Darm64-vcmp.ll192 %tst = fcmp oeq <1 x double> %A, %B
193 %mask = sext <1 x i1> %tst to <1 x i64>
200 %tst = fcmp oge <1 x double> %A, %B
201 %mask = sext <1 x i1> %tst to <1 x i64>
208 %tst = fcmp ole <1 x double> %A, %B
209 %mask = sext <1 x i1> %tst to <1 x i64>
216 %tst = fcmp ogt <1 x double> %A, %B
217 %mask = sext <1 x i1> %tst to <1 x i64>
224 %tst = fcmp olt <1 x double> %A, %B
225 %mask = sext <1 x i1> %tst to <1 x i64>
[all …]
H A Dhoist-and-by-const-from-shl-in-eqcmp-zero.ll21 ; CHECK-NEXT: tst w8, #0x80
36 ; CHECK-NEXT: tst w8, #0x1
51 ; CHECK-NEXT: tst w8, #0x18
68 ; CHECK-NEXT: tst w8, #0x8000
83 ; CHECK-NEXT: tst w8, #0x1
98 ; CHECK-NEXT: tst w8, #0xff0
126 ; CHECK-NEXT: tst w8, #0x1
139 ; CHECK-NEXT: tst w8, #0xffff00
167 ; CHECK-NEXT: tst x8, #0x1
295 ; CHECK-NEXT: tst w8, #0x1
[all …]
H A Dregress-f128csel-flags.ll12 %tst = icmp ne i32 %lhs, 42
13 %val = select i1 %tst, fp128 %a, fp128 %b
18 %retval = select i1 %tst, double 4.0, double 5.0
H A Darm64-regress-f128csel-flags.ll12 %tst = icmp ne i32 %lhs, 42
13 %val = select i1 %tst, fp128 %a, fp128 %b
18 %retval = select i1 %tst, double %l, double %r
H A Dhoist-and-by-const-from-lshr-in-eqcmp-zero.ll20 ; CHECK-NEXT: tst w8, #0x80
34 ; CHECK-NEXT: tst w8, #0x1
48 ; CHECK-NEXT: tst w8, #0x18
64 ; CHECK-NEXT: tst w8, #0x8000
78 ; CHECK-NEXT: tst w8, #0x1
92 ; CHECK-NEXT: tst w8, #0xff0
107 ; CHECK-NEXT: tst w8, #0x80000000
120 ; CHECK-NEXT: tst w8, #0x1
133 ; CHECK-NEXT: tst w8, #0xffff00
161 ; CHECK-NEXT: tst x8, #0x1
[all …]
H A Dvecreduce-bool.ll40 ; CHECK-NEXT: tst w8, #0x1
57 ; CHECK-NEXT: tst w8, #0x1
72 ; CHECK-NEXT: tst w8, #0x1
87 ; CHECK-NEXT: tst w8, #0x1
103 ; CHECK-NEXT: tst w8, #0x1
134 ; CHECK-NEXT: tst w8, #0x1
151 ; CHECK-NEXT: tst w8, #0x1
166 ; CHECK-NEXT: tst w8, #0x1
181 ; CHECK-NEXT: tst w8, #0x1
197 ; CHECK-NEXT: tst w8, #0x1
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dfast-isel-select.ll11 ; ARM: tst r1, #1
16 ; THUMB: tst.w r1, #1
26 ; ARM: tst {{r[0-9]+}}, #1
29 ; THUMB: tst.w {{r[0-9]+}}, #1
39 ; ARM: tst r0, #1
43 ; THUMB: tst.w r0, #1
57 ; ARM: tst r1, #1
62 ; THUMB: tst.w r1, #1
72 ; ARM: tst {{r[0-9]+}}, #1
75 ; THUMB: tst.w {{r[0-9]+}}, #1
[all …]
H A Dconstant-islands.ll11 %tst = fcmp oeq float %in, 1234.5
13 %chain = zext i1 %tst to i32
15 br i1 %tst, label %true, label %false
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Darm64-aliases.s39 tst w1, #3
40 tst x1, #3
41 tst w1, w2
42 tst x1, x2
45 tst w3, w7, lsl #31
46 tst x2, x20, asr #0
48 ; CHECK: tst w1, #0x3 ; encoding: [0x3f,0x04,0x00,0x72]
49 ; CHECK: tst x1, #0x3 ; encoding: [0x3f,0x04,0x40,0xf2]
50 ; CHECK: tst w1, w2 ; encoding: [0x3f,0x00,0x02,0x6a]
51 ; CHECK: tst x1, x2 ; encoding: [0x3f,0x00,0x02,0xea]
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dthumb2-tst2.ll4 ; tst as 'mov.w r0, #0'.
8 ; CHECK: tst {{.*}}, r1
17 ; CHECK: tst {{.*}}, r1
26 ; CHECK: tst.w {{.*}}, r1, lsl #5
36 ; CHECK: tst.w {{.*}}, r1, lsr #6
46 ; CHECK: tst.w {{.*}}, r1, asr #7
56 ; CHECK: tst.w {{.*}}, {{.*}}, ror #8
H A Dthumb2-tst.ll4 ; tst as 'mov.w r0, #0'.
14 ; CHECK: tst.w {{.*}}, #187
24 ; CHECK: tst.w {{.*}}, #11141290
34 ; CHECK: tst.w {{.*}}, #-872363008
44 ; CHECK: tst.w {{.*}}, #-572662307
54 ; CHECK: tst.w {{.*}}, #1114112
/llvm-project-15.0.7/llvm/test/CodeGen/SPARC/
H A Danalyze-branch.ll15 %tst = icmp eq i32 %in, 42
16 br i1 %tst, label %true, label %false, !prof !0
38 %tst = icmp eq i32 %in, 42
39 br i1 %tst, label %true, label %false, !prof !1
/llvm-project-15.0.7/llvm/test/Transforms/EarlyCSE/
H A Dconst-speculation.ll10 ; gets to simplify the purely constant one (%tst). Since that icmp uses the
12 ; the %tst icmp and we don't want it to speculate about what happens if "i32 0"
34 %tst = icmp eq i32 1, 0
35 %sel = select i1 %tst, ptr null, ptr @var
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DREADME-Thumb.txt106 tst r2, r1
110 tst r2, r1
115 tst r2, r1
146 tst r1, #13
152 tst r1, #256
168 2. It is sinking the shift of "1 << i" into the tst, and using ands instead of
169 tst. This will probably require whole function isel.
171 tst r1, #256
175 tst r2, r1
/llvm-project-15.0.7/llvm/test/CodeGen/MSP430/
H A Dselectcc.ll27 ; CHECK-NEXT: tst r11
31 ; CHECK-NEXT: tst r11
37 ; CHECK-NEXT: tst r11

12345678